xref: /openbmc/linux/drivers/gpio/gpio-lp3943.c (revision e92a5c61)
10cc59b9dSMilo Kim /*
20cc59b9dSMilo Kim  * TI/National Semiconductor LP3943 GPIO driver
30cc59b9dSMilo Kim  *
40cc59b9dSMilo Kim  * Copyright 2013 Texas Instruments
50cc59b9dSMilo Kim  *
60cc59b9dSMilo Kim  * Author: Milo Kim <milo.kim@ti.com>
70cc59b9dSMilo Kim  *
80cc59b9dSMilo Kim  * This program is free software; you can redistribute it and/or modify
90cc59b9dSMilo Kim  * it under the terms of the GNU General Public License as published by
100cc59b9dSMilo Kim  * the Free Software Foundation; version 2.
110cc59b9dSMilo Kim  */
120cc59b9dSMilo Kim 
130cc59b9dSMilo Kim #include <linux/bitops.h>
140cc59b9dSMilo Kim #include <linux/err.h>
15e92a5c61SLinus Walleij #include <linux/gpio/driver.h>
160cc59b9dSMilo Kim #include <linux/i2c.h>
170cc59b9dSMilo Kim #include <linux/mfd/lp3943.h>
180cc59b9dSMilo Kim #include <linux/module.h>
190cc59b9dSMilo Kim #include <linux/platform_device.h>
200cc59b9dSMilo Kim #include <linux/slab.h>
210cc59b9dSMilo Kim 
220cc59b9dSMilo Kim enum lp3943_gpios {
230cc59b9dSMilo Kim 	LP3943_GPIO1,
240cc59b9dSMilo Kim 	LP3943_GPIO2,
250cc59b9dSMilo Kim 	LP3943_GPIO3,
260cc59b9dSMilo Kim 	LP3943_GPIO4,
270cc59b9dSMilo Kim 	LP3943_GPIO5,
280cc59b9dSMilo Kim 	LP3943_GPIO6,
290cc59b9dSMilo Kim 	LP3943_GPIO7,
300cc59b9dSMilo Kim 	LP3943_GPIO8,
310cc59b9dSMilo Kim 	LP3943_GPIO9,
320cc59b9dSMilo Kim 	LP3943_GPIO10,
330cc59b9dSMilo Kim 	LP3943_GPIO11,
340cc59b9dSMilo Kim 	LP3943_GPIO12,
350cc59b9dSMilo Kim 	LP3943_GPIO13,
360cc59b9dSMilo Kim 	LP3943_GPIO14,
370cc59b9dSMilo Kim 	LP3943_GPIO15,
380cc59b9dSMilo Kim 	LP3943_GPIO16,
390cc59b9dSMilo Kim 	LP3943_MAX_GPIO,
400cc59b9dSMilo Kim };
410cc59b9dSMilo Kim 
420cc59b9dSMilo Kim struct lp3943_gpio {
430cc59b9dSMilo Kim 	struct gpio_chip chip;
440cc59b9dSMilo Kim 	struct lp3943 *lp3943;
450cc59b9dSMilo Kim 	u16 input_mask;		/* 1 = GPIO is input direction, 0 = output */
460cc59b9dSMilo Kim };
470cc59b9dSMilo Kim 
4870aba44bSLinus Walleij static int lp3943_gpio_request(struct gpio_chip *chip, unsigned offset)
4970aba44bSLinus Walleij {
5070aba44bSLinus Walleij 	struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip);
5170aba44bSLinus Walleij 	struct lp3943 *lp3943 = lp3943_gpio->lp3943;
5270aba44bSLinus Walleij 
5370aba44bSLinus Walleij 	/* Return an error if the pin is already assigned */
5470aba44bSLinus Walleij 	if (test_and_set_bit(offset, &lp3943->pin_used))
5570aba44bSLinus Walleij 		return -EBUSY;
5670aba44bSLinus Walleij 
5770aba44bSLinus Walleij 	return 0;
5870aba44bSLinus Walleij }
5970aba44bSLinus Walleij 
6070aba44bSLinus Walleij static void lp3943_gpio_free(struct gpio_chip *chip, unsigned offset)
6170aba44bSLinus Walleij {
6270aba44bSLinus Walleij 	struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip);
6370aba44bSLinus Walleij 	struct lp3943 *lp3943 = lp3943_gpio->lp3943;
6470aba44bSLinus Walleij 
6570aba44bSLinus Walleij 	clear_bit(offset, &lp3943->pin_used);
6670aba44bSLinus Walleij }
6770aba44bSLinus Walleij 
680cc59b9dSMilo Kim static int lp3943_gpio_set_mode(struct lp3943_gpio *lp3943_gpio, u8 offset,
690cc59b9dSMilo Kim 				u8 val)
700cc59b9dSMilo Kim {
710cc59b9dSMilo Kim 	struct lp3943 *lp3943 = lp3943_gpio->lp3943;
720cc59b9dSMilo Kim 	const struct lp3943_reg_cfg *mux = lp3943->mux_cfg;
730cc59b9dSMilo Kim 
740cc59b9dSMilo Kim 	return lp3943_update_bits(lp3943, mux[offset].reg, mux[offset].mask,
750cc59b9dSMilo Kim 				  val << mux[offset].shift);
760cc59b9dSMilo Kim }
770cc59b9dSMilo Kim 
780cc59b9dSMilo Kim static int lp3943_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
790cc59b9dSMilo Kim {
80a2f33804SLinus Walleij 	struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip);
810cc59b9dSMilo Kim 
820cc59b9dSMilo Kim 	lp3943_gpio->input_mask |= BIT(offset);
830cc59b9dSMilo Kim 
840cc59b9dSMilo Kim 	return lp3943_gpio_set_mode(lp3943_gpio, offset, LP3943_GPIO_IN);
850cc59b9dSMilo Kim }
860cc59b9dSMilo Kim 
870cc59b9dSMilo Kim static int lp3943_get_gpio_in_status(struct lp3943_gpio *lp3943_gpio,
880cc59b9dSMilo Kim 				     struct gpio_chip *chip, unsigned offset)
890cc59b9dSMilo Kim {
900cc59b9dSMilo Kim 	u8 addr, read;
910cc59b9dSMilo Kim 	int err;
920cc59b9dSMilo Kim 
930cc59b9dSMilo Kim 	switch (offset) {
940cc59b9dSMilo Kim 	case LP3943_GPIO1 ... LP3943_GPIO8:
950cc59b9dSMilo Kim 		addr = LP3943_REG_GPIO_A;
960cc59b9dSMilo Kim 		break;
970cc59b9dSMilo Kim 	case LP3943_GPIO9 ... LP3943_GPIO16:
980cc59b9dSMilo Kim 		addr = LP3943_REG_GPIO_B;
990cc59b9dSMilo Kim 		offset = offset - 8;
1000cc59b9dSMilo Kim 		break;
1010cc59b9dSMilo Kim 	default:
1020cc59b9dSMilo Kim 		return -EINVAL;
1030cc59b9dSMilo Kim 	}
1040cc59b9dSMilo Kim 
1050cc59b9dSMilo Kim 	err = lp3943_read_byte(lp3943_gpio->lp3943, addr, &read);
1060cc59b9dSMilo Kim 	if (err)
1070cc59b9dSMilo Kim 		return err;
1080cc59b9dSMilo Kim 
1090cc59b9dSMilo Kim 	return !!(read & BIT(offset));
1100cc59b9dSMilo Kim }
1110cc59b9dSMilo Kim 
1120cc59b9dSMilo Kim static int lp3943_get_gpio_out_status(struct lp3943_gpio *lp3943_gpio,
1130cc59b9dSMilo Kim 				      struct gpio_chip *chip, unsigned offset)
1140cc59b9dSMilo Kim {
1150cc59b9dSMilo Kim 	struct lp3943 *lp3943 = lp3943_gpio->lp3943;
1160cc59b9dSMilo Kim 	const struct lp3943_reg_cfg *mux = lp3943->mux_cfg;
1170cc59b9dSMilo Kim 	u8 read;
1180cc59b9dSMilo Kim 	int err;
1190cc59b9dSMilo Kim 
1200cc59b9dSMilo Kim 	err = lp3943_read_byte(lp3943, mux[offset].reg, &read);
1210cc59b9dSMilo Kim 	if (err)
1220cc59b9dSMilo Kim 		return err;
1230cc59b9dSMilo Kim 
1240cc59b9dSMilo Kim 	read = (read & mux[offset].mask) >> mux[offset].shift;
1250cc59b9dSMilo Kim 
1260cc59b9dSMilo Kim 	if (read == LP3943_GPIO_OUT_HIGH)
1270cc59b9dSMilo Kim 		return 1;
1280cc59b9dSMilo Kim 	else if (read == LP3943_GPIO_OUT_LOW)
1290cc59b9dSMilo Kim 		return 0;
1300cc59b9dSMilo Kim 	else
1310cc59b9dSMilo Kim 		return -EINVAL;
1320cc59b9dSMilo Kim }
1330cc59b9dSMilo Kim 
1340cc59b9dSMilo Kim static int lp3943_gpio_get(struct gpio_chip *chip, unsigned offset)
1350cc59b9dSMilo Kim {
136a2f33804SLinus Walleij 	struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip);
1370cc59b9dSMilo Kim 
1380cc59b9dSMilo Kim 	/*
1390cc59b9dSMilo Kim 	 * Limitation:
1400cc59b9dSMilo Kim 	 *   LP3943 doesn't have the GPIO direction register. It provides
1410cc59b9dSMilo Kim 	 *   only input and output status registers.
1420cc59b9dSMilo Kim 	 *   So, direction info is required to handle the 'get' operation.
1430cc59b9dSMilo Kim 	 *   This variable is updated whenever the direction is changed and
1440cc59b9dSMilo Kim 	 *   it is used here.
1450cc59b9dSMilo Kim 	 */
1460cc59b9dSMilo Kim 
1470cc59b9dSMilo Kim 	if (lp3943_gpio->input_mask & BIT(offset))
1480cc59b9dSMilo Kim 		return lp3943_get_gpio_in_status(lp3943_gpio, chip, offset);
1490cc59b9dSMilo Kim 	else
1500cc59b9dSMilo Kim 		return lp3943_get_gpio_out_status(lp3943_gpio, chip, offset);
1510cc59b9dSMilo Kim }
1520cc59b9dSMilo Kim 
1530cc59b9dSMilo Kim static void lp3943_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
1540cc59b9dSMilo Kim {
155a2f33804SLinus Walleij 	struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip);
1560cc59b9dSMilo Kim 	u8 data;
1570cc59b9dSMilo Kim 
1580cc59b9dSMilo Kim 	if (value)
1590cc59b9dSMilo Kim 		data = LP3943_GPIO_OUT_HIGH;
1600cc59b9dSMilo Kim 	else
1610cc59b9dSMilo Kim 		data = LP3943_GPIO_OUT_LOW;
1620cc59b9dSMilo Kim 
1630cc59b9dSMilo Kim 	lp3943_gpio_set_mode(lp3943_gpio, offset, data);
1640cc59b9dSMilo Kim }
1650cc59b9dSMilo Kim 
1660cc59b9dSMilo Kim static int lp3943_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
1670cc59b9dSMilo Kim 					int value)
1680cc59b9dSMilo Kim {
169a2f33804SLinus Walleij 	struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip);
1700cc59b9dSMilo Kim 
1710cc59b9dSMilo Kim 	lp3943_gpio_set(chip, offset, value);
1720cc59b9dSMilo Kim 	lp3943_gpio->input_mask &= ~BIT(offset);
1730cc59b9dSMilo Kim 
1740cc59b9dSMilo Kim 	return 0;
1750cc59b9dSMilo Kim }
1760cc59b9dSMilo Kim 
1770cc59b9dSMilo Kim static const struct gpio_chip lp3943_gpio_chip = {
1780cc59b9dSMilo Kim 	.label			= "lp3943",
1790cc59b9dSMilo Kim 	.owner			= THIS_MODULE,
18070aba44bSLinus Walleij 	.request		= lp3943_gpio_request,
18170aba44bSLinus Walleij 	.free			= lp3943_gpio_free,
1820cc59b9dSMilo Kim 	.direction_input	= lp3943_gpio_direction_input,
1830cc59b9dSMilo Kim 	.get			= lp3943_gpio_get,
1840cc59b9dSMilo Kim 	.direction_output	= lp3943_gpio_direction_output,
1850cc59b9dSMilo Kim 	.set			= lp3943_gpio_set,
1860cc59b9dSMilo Kim 	.base			= -1,
1870cc59b9dSMilo Kim 	.ngpio			= LP3943_MAX_GPIO,
1880cc59b9dSMilo Kim 	.can_sleep		= 1,
1890cc59b9dSMilo Kim };
1900cc59b9dSMilo Kim 
1910cc59b9dSMilo Kim static int lp3943_gpio_probe(struct platform_device *pdev)
1920cc59b9dSMilo Kim {
1930cc59b9dSMilo Kim 	struct lp3943 *lp3943 = dev_get_drvdata(pdev->dev.parent);
1940cc59b9dSMilo Kim 	struct lp3943_gpio *lp3943_gpio;
1950cc59b9dSMilo Kim 
1960cc59b9dSMilo Kim 	lp3943_gpio = devm_kzalloc(&pdev->dev, sizeof(*lp3943_gpio),
1970cc59b9dSMilo Kim 				GFP_KERNEL);
1980cc59b9dSMilo Kim 	if (!lp3943_gpio)
1990cc59b9dSMilo Kim 		return -ENOMEM;
2000cc59b9dSMilo Kim 
2010cc59b9dSMilo Kim 	lp3943_gpio->lp3943 = lp3943;
2020cc59b9dSMilo Kim 	lp3943_gpio->chip = lp3943_gpio_chip;
20358383c78SLinus Walleij 	lp3943_gpio->chip.parent = &pdev->dev;
2040cc59b9dSMilo Kim 
2050cc59b9dSMilo Kim 	platform_set_drvdata(pdev, lp3943_gpio);
2060cc59b9dSMilo Kim 
2074ca75bfeSLaxman Dewangan 	return devm_gpiochip_add_data(&pdev->dev, &lp3943_gpio->chip,
2084ca75bfeSLaxman Dewangan 				      lp3943_gpio);
2090cc59b9dSMilo Kim }
2100cc59b9dSMilo Kim 
2110cc59b9dSMilo Kim static const struct of_device_id lp3943_gpio_of_match[] = {
2120cc59b9dSMilo Kim 	{ .compatible = "ti,lp3943-gpio", },
2130cc59b9dSMilo Kim 	{ }
2140cc59b9dSMilo Kim };
2150cc59b9dSMilo Kim MODULE_DEVICE_TABLE(of, lp3943_gpio_of_match);
2160cc59b9dSMilo Kim 
2170cc59b9dSMilo Kim static struct platform_driver lp3943_gpio_driver = {
2180cc59b9dSMilo Kim 	.probe = lp3943_gpio_probe,
2190cc59b9dSMilo Kim 	.driver = {
2200cc59b9dSMilo Kim 		.name = "lp3943-gpio",
2213b1ba0cbSSachin Kamat 		.of_match_table = lp3943_gpio_of_match,
2220cc59b9dSMilo Kim 	},
2230cc59b9dSMilo Kim };
2240cc59b9dSMilo Kim module_platform_driver(lp3943_gpio_driver);
2250cc59b9dSMilo Kim 
2260cc59b9dSMilo Kim MODULE_DESCRIPTION("LP3943 GPIO driver");
2270cc59b9dSMilo Kim MODULE_ALIAS("platform:lp3943-gpio");
2280cc59b9dSMilo Kim MODULE_AUTHOR("Milo Kim");
2290cc59b9dSMilo Kim MODULE_LICENSE("GPL");
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