xref: /openbmc/linux/drivers/gpio/gpio-htc-egpio.c (revision d2ba09c1) 
1 /*
2  * Support for the GPIO/IRQ expander chips present on several HTC phones.
3  * These are implemented in CPLD chips present on the board.
4  *
5  * Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net>
6  * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
7  *
8  * This file may be distributed under the terms of the GNU GPL license.
9  */
10 
11 #include <linux/kernel.h>
12 #include <linux/errno.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/io.h>
16 #include <linux/spinlock.h>
17 #include <linux/platform_data/gpio-htc-egpio.h>
18 #include <linux/platform_device.h>
19 #include <linux/slab.h>
20 #include <linux/init.h>
21 #include <linux/gpio/driver.h>
22 
23 struct egpio_chip {
24 	int              reg_start;
25 	int              cached_values;
26 	unsigned long    is_out;
27 	struct device    *dev;
28 	struct gpio_chip chip;
29 };
30 
31 struct egpio_info {
32 	spinlock_t        lock;
33 
34 	/* iomem info */
35 	void __iomem      *base_addr;
36 	int               bus_shift;	/* byte shift */
37 	int               reg_shift;	/* bit shift */
38 	int               reg_mask;
39 
40 	/* irq info */
41 	int               ack_register;
42 	int               ack_write;
43 	u16               irqs_enabled;
44 	uint              irq_start;
45 	int               nirqs;
46 	uint              chained_irq;
47 
48 	/* egpio info */
49 	struct egpio_chip *chip;
50 	int               nchips;
51 };
52 
53 static inline void egpio_writew(u16 value, struct egpio_info *ei, int reg)
54 {
55 	writew(value, ei->base_addr + (reg << ei->bus_shift));
56 }
57 
58 static inline u16 egpio_readw(struct egpio_info *ei, int reg)
59 {
60 	return readw(ei->base_addr + (reg << ei->bus_shift));
61 }
62 
63 /*
64  * IRQs
65  */
66 
67 static inline void ack_irqs(struct egpio_info *ei)
68 {
69 	egpio_writew(ei->ack_write, ei, ei->ack_register);
70 	pr_debug("EGPIO ack - write %x to base+%x\n",
71 			ei->ack_write, ei->ack_register << ei->bus_shift);
72 }
73 
74 static void egpio_ack(struct irq_data *data)
75 {
76 }
77 
78 /* There does not appear to be a way to proactively mask interrupts
79  * on the egpio chip itself.  So, we simply ignore interrupts that
80  * aren't desired. */
81 static void egpio_mask(struct irq_data *data)
82 {
83 	struct egpio_info *ei = irq_data_get_irq_chip_data(data);
84 	ei->irqs_enabled &= ~(1 << (data->irq - ei->irq_start));
85 	pr_debug("EGPIO mask %d %04x\n", data->irq, ei->irqs_enabled);
86 }
87 
88 static void egpio_unmask(struct irq_data *data)
89 {
90 	struct egpio_info *ei = irq_data_get_irq_chip_data(data);
91 	ei->irqs_enabled |= 1 << (data->irq - ei->irq_start);
92 	pr_debug("EGPIO unmask %d %04x\n", data->irq, ei->irqs_enabled);
93 }
94 
95 static struct irq_chip egpio_muxed_chip = {
96 	.name		= "htc-egpio",
97 	.irq_ack	= egpio_ack,
98 	.irq_mask	= egpio_mask,
99 	.irq_unmask	= egpio_unmask,
100 };
101 
102 static void egpio_handler(struct irq_desc *desc)
103 {
104 	struct egpio_info *ei = irq_desc_get_handler_data(desc);
105 	int irqpin;
106 
107 	/* Read current pins. */
108 	unsigned long readval = egpio_readw(ei, ei->ack_register);
109 	pr_debug("IRQ reg: %x\n", (unsigned int)readval);
110 	/* Ack/unmask interrupts. */
111 	ack_irqs(ei);
112 	/* Process all set pins. */
113 	readval &= ei->irqs_enabled;
114 	for_each_set_bit(irqpin, &readval, ei->nirqs) {
115 		/* Run irq handler */
116 		pr_debug("got IRQ %d\n", irqpin);
117 		generic_handle_irq(ei->irq_start + irqpin);
118 	}
119 }
120 
121 int htc_egpio_get_wakeup_irq(struct device *dev)
122 {
123 	struct egpio_info *ei = dev_get_drvdata(dev);
124 
125 	/* Read current pins. */
126 	u16 readval = egpio_readw(ei, ei->ack_register);
127 	/* Ack/unmask interrupts. */
128 	ack_irqs(ei);
129 	/* Return first set pin. */
130 	readval &= ei->irqs_enabled;
131 	return ei->irq_start + ffs(readval) - 1;
132 }
133 EXPORT_SYMBOL(htc_egpio_get_wakeup_irq);
134 
135 static inline int egpio_pos(struct egpio_info *ei, int bit)
136 {
137 	return bit >> ei->reg_shift;
138 }
139 
140 static inline int egpio_bit(struct egpio_info *ei, int bit)
141 {
142 	return 1 << (bit & ((1 << ei->reg_shift)-1));
143 }
144 
145 /*
146  * Input pins
147  */
148 
149 static int egpio_get(struct gpio_chip *chip, unsigned offset)
150 {
151 	struct egpio_chip *egpio;
152 	struct egpio_info *ei;
153 	unsigned           bit;
154 	int                reg;
155 	int                value;
156 
157 	pr_debug("egpio_get_value(%d)\n", chip->base + offset);
158 
159 	egpio = gpiochip_get_data(chip);
160 	ei    = dev_get_drvdata(egpio->dev);
161 	bit   = egpio_bit(ei, offset);
162 	reg   = egpio->reg_start + egpio_pos(ei, offset);
163 
164 	if (test_bit(offset, &egpio->is_out)) {
165 		return !!(egpio->cached_values & (1 << offset));
166 	} else {
167 		value = egpio_readw(ei, reg);
168 		pr_debug("readw(%p + %x) = %x\n",
169 			 ei->base_addr, reg << ei->bus_shift, value);
170 		return !!(value & bit);
171 	}
172 }
173 
174 static int egpio_direction_input(struct gpio_chip *chip, unsigned offset)
175 {
176 	struct egpio_chip *egpio;
177 
178 	egpio = gpiochip_get_data(chip);
179 	return test_bit(offset, &egpio->is_out) ? -EINVAL : 0;
180 }
181 
182 
183 /*
184  * Output pins
185  */
186 
187 static void egpio_set(struct gpio_chip *chip, unsigned offset, int value)
188 {
189 	unsigned long     flag;
190 	struct egpio_chip *egpio;
191 	struct egpio_info *ei;
192 	unsigned          bit;
193 	int               pos;
194 	int               reg;
195 	int               shift;
196 
197 	pr_debug("egpio_set(%s, %d(%d), %d)\n",
198 			chip->label, offset, offset+chip->base, value);
199 
200 	egpio = gpiochip_get_data(chip);
201 	ei    = dev_get_drvdata(egpio->dev);
202 	bit   = egpio_bit(ei, offset);
203 	pos   = egpio_pos(ei, offset);
204 	reg   = egpio->reg_start + pos;
205 	shift = pos << ei->reg_shift;
206 
207 	pr_debug("egpio %s: reg %d = 0x%04x\n", value ? "set" : "clear",
208 			reg, (egpio->cached_values >> shift) & ei->reg_mask);
209 
210 	spin_lock_irqsave(&ei->lock, flag);
211 	if (value)
212 		egpio->cached_values |= (1 << offset);
213 	else
214 		egpio->cached_values &= ~(1 << offset);
215 	egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);
216 	spin_unlock_irqrestore(&ei->lock, flag);
217 }
218 
219 static int egpio_direction_output(struct gpio_chip *chip,
220 					unsigned offset, int value)
221 {
222 	struct egpio_chip *egpio;
223 
224 	egpio = gpiochip_get_data(chip);
225 	if (test_bit(offset, &egpio->is_out)) {
226 		egpio_set(chip, offset, value);
227 		return 0;
228 	} else {
229 		return -EINVAL;
230 	}
231 }
232 
233 static int egpio_get_direction(struct gpio_chip *chip, unsigned offset)
234 {
235 	struct egpio_chip *egpio;
236 
237 	egpio = gpiochip_get_data(chip);
238 
239 	return !test_bit(offset, &egpio->is_out);
240 }
241 
242 static void egpio_write_cache(struct egpio_info *ei)
243 {
244 	int               i;
245 	struct egpio_chip *egpio;
246 	int               shift;
247 
248 	for (i = 0; i < ei->nchips; i++) {
249 		egpio = &(ei->chip[i]);
250 		if (!egpio->is_out)
251 			continue;
252 
253 		for (shift = 0; shift < egpio->chip.ngpio;
254 				shift += (1<<ei->reg_shift)) {
255 
256 			int reg = egpio->reg_start + egpio_pos(ei, shift);
257 
258 			if (!((egpio->is_out >> shift) & ei->reg_mask))
259 				continue;
260 
261 			pr_debug("EGPIO: setting %x to %x, was %x\n", reg,
262 				(egpio->cached_values >> shift) & ei->reg_mask,
263 				egpio_readw(ei, reg));
264 
265 			egpio_writew((egpio->cached_values >> shift)
266 					& ei->reg_mask, ei, reg);
267 		}
268 	}
269 }
270 
271 
272 /*
273  * Setup
274  */
275 
276 static int __init egpio_probe(struct platform_device *pdev)
277 {
278 	struct htc_egpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
279 	struct resource   *res;
280 	struct egpio_info *ei;
281 	struct gpio_chip  *chip;
282 	unsigned int      irq, irq_end;
283 	int               i;
284 	int               ret;
285 
286 	/* Initialize ei data structure. */
287 	ei = devm_kzalloc(&pdev->dev, sizeof(*ei), GFP_KERNEL);
288 	if (!ei)
289 		return -ENOMEM;
290 
291 	spin_lock_init(&ei->lock);
292 
293 	/* Find chained irq */
294 	ret = -EINVAL;
295 	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
296 	if (res)
297 		ei->chained_irq = res->start;
298 
299 	/* Map egpio chip into virtual address space. */
300 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
301 	if (!res)
302 		goto fail;
303 	ei->base_addr = devm_ioremap_nocache(&pdev->dev, res->start,
304 					     resource_size(res));
305 	if (!ei->base_addr)
306 		goto fail;
307 	pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr);
308 
309 	if ((pdata->bus_width != 16) && (pdata->bus_width != 32))
310 		goto fail;
311 	ei->bus_shift = fls(pdata->bus_width - 1) - 3;
312 	pr_debug("bus_shift = %d\n", ei->bus_shift);
313 
314 	if ((pdata->reg_width != 8) && (pdata->reg_width != 16))
315 		goto fail;
316 	ei->reg_shift = fls(pdata->reg_width - 1);
317 	pr_debug("reg_shift = %d\n", ei->reg_shift);
318 
319 	ei->reg_mask = (1 << pdata->reg_width) - 1;
320 
321 	platform_set_drvdata(pdev, ei);
322 
323 	ei->nchips = pdata->num_chips;
324 	ei->chip = devm_kzalloc(&pdev->dev,
325 				sizeof(struct egpio_chip) * ei->nchips,
326 				GFP_KERNEL);
327 	if (!ei->chip) {
328 		ret = -ENOMEM;
329 		goto fail;
330 	}
331 	for (i = 0; i < ei->nchips; i++) {
332 		ei->chip[i].reg_start = pdata->chip[i].reg_start;
333 		ei->chip[i].cached_values = pdata->chip[i].initial_values;
334 		ei->chip[i].is_out = pdata->chip[i].direction;
335 		ei->chip[i].dev = &(pdev->dev);
336 		chip = &(ei->chip[i].chip);
337 		chip->label           = "htc-egpio";
338 		chip->parent          = &pdev->dev;
339 		chip->owner           = THIS_MODULE;
340 		chip->get             = egpio_get;
341 		chip->set             = egpio_set;
342 		chip->direction_input = egpio_direction_input;
343 		chip->direction_output = egpio_direction_output;
344 		chip->get_direction   = egpio_get_direction;
345 		chip->base            = pdata->chip[i].gpio_base;
346 		chip->ngpio           = pdata->chip[i].num_gpios;
347 
348 		gpiochip_add_data(chip, &ei->chip[i]);
349 	}
350 
351 	/* Set initial pin values */
352 	egpio_write_cache(ei);
353 
354 	ei->irq_start = pdata->irq_base;
355 	ei->nirqs = pdata->num_irqs;
356 	ei->ack_register = pdata->ack_register;
357 
358 	if (ei->chained_irq) {
359 		/* Setup irq handlers */
360 		ei->ack_write = 0xFFFF;
361 		if (pdata->invert_acks)
362 			ei->ack_write = 0;
363 		irq_end = ei->irq_start + ei->nirqs;
364 		for (irq = ei->irq_start; irq < irq_end; irq++) {
365 			irq_set_chip_and_handler(irq, &egpio_muxed_chip,
366 						 handle_simple_irq);
367 			irq_set_chip_data(irq, ei);
368 			irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
369 		}
370 		irq_set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING);
371 		irq_set_chained_handler_and_data(ei->chained_irq,
372 						 egpio_handler, ei);
373 		ack_irqs(ei);
374 
375 		device_init_wakeup(&pdev->dev, 1);
376 	}
377 
378 	return 0;
379 
380 fail:
381 	printk(KERN_ERR "EGPIO failed to setup\n");
382 	return ret;
383 }
384 
385 #ifdef CONFIG_PM
386 static int egpio_suspend(struct platform_device *pdev, pm_message_t state)
387 {
388 	struct egpio_info *ei = platform_get_drvdata(pdev);
389 
390 	if (ei->chained_irq && device_may_wakeup(&pdev->dev))
391 		enable_irq_wake(ei->chained_irq);
392 	return 0;
393 }
394 
395 static int egpio_resume(struct platform_device *pdev)
396 {
397 	struct egpio_info *ei = platform_get_drvdata(pdev);
398 
399 	if (ei->chained_irq && device_may_wakeup(&pdev->dev))
400 		disable_irq_wake(ei->chained_irq);
401 
402 	/* Update registers from the cache, in case
403 	   the CPLD was powered off during suspend */
404 	egpio_write_cache(ei);
405 	return 0;
406 }
407 #else
408 #define egpio_suspend NULL
409 #define egpio_resume NULL
410 #endif
411 
412 
413 static struct platform_driver egpio_driver = {
414 	.driver = {
415 		.name = "htc-egpio",
416 		.suppress_bind_attrs = true,
417 	},
418 	.suspend      = egpio_suspend,
419 	.resume       = egpio_resume,
420 };
421 
422 static int __init egpio_init(void)
423 {
424 	return platform_driver_probe(&egpio_driver, egpio_probe);
425 }
426 /* start early for dependencies */
427 subsys_initcall(egpio_init);
428