1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2013 Altera Corporation 4 * Based on gpio-mpc8xxx.c 5 */ 6 7 #include <linux/io.h> 8 #include <linux/module.h> 9 #include <linux/gpio/driver.h> 10 #include <linux/of_gpio.h> /* For of_mm_gpio_chip */ 11 #include <linux/platform_device.h> 12 13 #define ALTERA_GPIO_MAX_NGPIO 32 14 #define ALTERA_GPIO_DATA 0x0 15 #define ALTERA_GPIO_DIR 0x4 16 #define ALTERA_GPIO_IRQ_MASK 0x8 17 #define ALTERA_GPIO_EDGE_CAP 0xc 18 19 /** 20 * struct altera_gpio_chip 21 * @mmchip : memory mapped chip structure. 22 * @gpio_lock : synchronization lock so that new irq/set/get requests 23 * will be blocked until the current one completes. 24 * @interrupt_trigger : specifies the hardware configured IRQ trigger type 25 * (rising, falling, both, high) 26 * @mapped_irq : kernel mapped irq number. 27 */ 28 struct altera_gpio_chip { 29 struct of_mm_gpio_chip mmchip; 30 raw_spinlock_t gpio_lock; 31 int interrupt_trigger; 32 int mapped_irq; 33 }; 34 35 static void altera_gpio_irq_unmask(struct irq_data *d) 36 { 37 struct altera_gpio_chip *altera_gc; 38 struct of_mm_gpio_chip *mm_gc; 39 unsigned long flags; 40 u32 intmask; 41 42 altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d)); 43 mm_gc = &altera_gc->mmchip; 44 45 raw_spin_lock_irqsave(&altera_gc->gpio_lock, flags); 46 intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); 47 /* Set ALTERA_GPIO_IRQ_MASK bit to unmask */ 48 intmask |= BIT(irqd_to_hwirq(d)); 49 writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK); 50 raw_spin_unlock_irqrestore(&altera_gc->gpio_lock, flags); 51 } 52 53 static void altera_gpio_irq_mask(struct irq_data *d) 54 { 55 struct altera_gpio_chip *altera_gc; 56 struct of_mm_gpio_chip *mm_gc; 57 unsigned long flags; 58 u32 intmask; 59 60 altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d)); 61 mm_gc = &altera_gc->mmchip; 62 63 raw_spin_lock_irqsave(&altera_gc->gpio_lock, flags); 64 intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); 65 /* Clear ALTERA_GPIO_IRQ_MASK bit to mask */ 66 intmask &= ~BIT(irqd_to_hwirq(d)); 67 writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK); 68 raw_spin_unlock_irqrestore(&altera_gc->gpio_lock, flags); 69 } 70 71 /** 72 * This controller's IRQ type is synthesized in hardware, so this function 73 * just checks if the requested set_type matches the synthesized IRQ type 74 */ 75 static int altera_gpio_irq_set_type(struct irq_data *d, 76 unsigned int type) 77 { 78 struct altera_gpio_chip *altera_gc; 79 80 altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d)); 81 82 if (type == IRQ_TYPE_NONE) { 83 irq_set_handler_locked(d, handle_bad_irq); 84 return 0; 85 } 86 if (type == altera_gc->interrupt_trigger) { 87 if (type == IRQ_TYPE_LEVEL_HIGH) 88 irq_set_handler_locked(d, handle_level_irq); 89 else 90 irq_set_handler_locked(d, handle_simple_irq); 91 return 0; 92 } 93 irq_set_handler_locked(d, handle_bad_irq); 94 return -EINVAL; 95 } 96 97 static unsigned int altera_gpio_irq_startup(struct irq_data *d) 98 { 99 altera_gpio_irq_unmask(d); 100 101 return 0; 102 } 103 104 static struct irq_chip altera_irq_chip = { 105 .name = "altera-gpio", 106 .irq_mask = altera_gpio_irq_mask, 107 .irq_unmask = altera_gpio_irq_unmask, 108 .irq_set_type = altera_gpio_irq_set_type, 109 .irq_startup = altera_gpio_irq_startup, 110 .irq_shutdown = altera_gpio_irq_mask, 111 }; 112 113 static int altera_gpio_get(struct gpio_chip *gc, unsigned offset) 114 { 115 struct of_mm_gpio_chip *mm_gc; 116 117 mm_gc = to_of_mm_gpio_chip(gc); 118 119 return !!(readl(mm_gc->regs + ALTERA_GPIO_DATA) & BIT(offset)); 120 } 121 122 static void altera_gpio_set(struct gpio_chip *gc, unsigned offset, int value) 123 { 124 struct of_mm_gpio_chip *mm_gc; 125 struct altera_gpio_chip *chip; 126 unsigned long flags; 127 unsigned int data_reg; 128 129 mm_gc = to_of_mm_gpio_chip(gc); 130 chip = gpiochip_get_data(gc); 131 132 raw_spin_lock_irqsave(&chip->gpio_lock, flags); 133 data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA); 134 if (value) 135 data_reg |= BIT(offset); 136 else 137 data_reg &= ~BIT(offset); 138 writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA); 139 raw_spin_unlock_irqrestore(&chip->gpio_lock, flags); 140 } 141 142 static int altera_gpio_direction_input(struct gpio_chip *gc, unsigned offset) 143 { 144 struct of_mm_gpio_chip *mm_gc; 145 struct altera_gpio_chip *chip; 146 unsigned long flags; 147 unsigned int gpio_ddr; 148 149 mm_gc = to_of_mm_gpio_chip(gc); 150 chip = gpiochip_get_data(gc); 151 152 raw_spin_lock_irqsave(&chip->gpio_lock, flags); 153 /* Set pin as input, assumes software controlled IP */ 154 gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR); 155 gpio_ddr &= ~BIT(offset); 156 writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR); 157 raw_spin_unlock_irqrestore(&chip->gpio_lock, flags); 158 159 return 0; 160 } 161 162 static int altera_gpio_direction_output(struct gpio_chip *gc, 163 unsigned offset, int value) 164 { 165 struct of_mm_gpio_chip *mm_gc; 166 struct altera_gpio_chip *chip; 167 unsigned long flags; 168 unsigned int data_reg, gpio_ddr; 169 170 mm_gc = to_of_mm_gpio_chip(gc); 171 chip = gpiochip_get_data(gc); 172 173 raw_spin_lock_irqsave(&chip->gpio_lock, flags); 174 /* Sets the GPIO value */ 175 data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA); 176 if (value) 177 data_reg |= BIT(offset); 178 else 179 data_reg &= ~BIT(offset); 180 writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA); 181 182 /* Set pin as output, assumes software controlled IP */ 183 gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR); 184 gpio_ddr |= BIT(offset); 185 writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR); 186 raw_spin_unlock_irqrestore(&chip->gpio_lock, flags); 187 188 return 0; 189 } 190 191 static void altera_gpio_irq_edge_handler(struct irq_desc *desc) 192 { 193 struct altera_gpio_chip *altera_gc; 194 struct irq_chip *chip; 195 struct of_mm_gpio_chip *mm_gc; 196 struct irq_domain *irqdomain; 197 unsigned long status; 198 int i; 199 200 altera_gc = gpiochip_get_data(irq_desc_get_handler_data(desc)); 201 chip = irq_desc_get_chip(desc); 202 mm_gc = &altera_gc->mmchip; 203 irqdomain = altera_gc->mmchip.gc.irq.domain; 204 205 chained_irq_enter(chip, desc); 206 207 while ((status = 208 (readl(mm_gc->regs + ALTERA_GPIO_EDGE_CAP) & 209 readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK)))) { 210 writel(status, mm_gc->regs + ALTERA_GPIO_EDGE_CAP); 211 for_each_set_bit(i, &status, mm_gc->gc.ngpio) { 212 generic_handle_irq(irq_find_mapping(irqdomain, i)); 213 } 214 } 215 216 chained_irq_exit(chip, desc); 217 } 218 219 static void altera_gpio_irq_leveL_high_handler(struct irq_desc *desc) 220 { 221 struct altera_gpio_chip *altera_gc; 222 struct irq_chip *chip; 223 struct of_mm_gpio_chip *mm_gc; 224 struct irq_domain *irqdomain; 225 unsigned long status; 226 int i; 227 228 altera_gc = gpiochip_get_data(irq_desc_get_handler_data(desc)); 229 chip = irq_desc_get_chip(desc); 230 mm_gc = &altera_gc->mmchip; 231 irqdomain = altera_gc->mmchip.gc.irq.domain; 232 233 chained_irq_enter(chip, desc); 234 235 status = readl(mm_gc->regs + ALTERA_GPIO_DATA); 236 status &= readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); 237 238 for_each_set_bit(i, &status, mm_gc->gc.ngpio) { 239 generic_handle_irq(irq_find_mapping(irqdomain, i)); 240 } 241 chained_irq_exit(chip, desc); 242 } 243 244 static int altera_gpio_probe(struct platform_device *pdev) 245 { 246 struct device_node *node = pdev->dev.of_node; 247 int reg, ret; 248 struct altera_gpio_chip *altera_gc; 249 250 altera_gc = devm_kzalloc(&pdev->dev, sizeof(*altera_gc), GFP_KERNEL); 251 if (!altera_gc) 252 return -ENOMEM; 253 254 raw_spin_lock_init(&altera_gc->gpio_lock); 255 256 if (of_property_read_u32(node, "altr,ngpio", ®)) 257 /* By default assume maximum ngpio */ 258 altera_gc->mmchip.gc.ngpio = ALTERA_GPIO_MAX_NGPIO; 259 else 260 altera_gc->mmchip.gc.ngpio = reg; 261 262 if (altera_gc->mmchip.gc.ngpio > ALTERA_GPIO_MAX_NGPIO) { 263 dev_warn(&pdev->dev, 264 "ngpio is greater than %d, defaulting to %d\n", 265 ALTERA_GPIO_MAX_NGPIO, ALTERA_GPIO_MAX_NGPIO); 266 altera_gc->mmchip.gc.ngpio = ALTERA_GPIO_MAX_NGPIO; 267 } 268 269 altera_gc->mmchip.gc.direction_input = altera_gpio_direction_input; 270 altera_gc->mmchip.gc.direction_output = altera_gpio_direction_output; 271 altera_gc->mmchip.gc.get = altera_gpio_get; 272 altera_gc->mmchip.gc.set = altera_gpio_set; 273 altera_gc->mmchip.gc.owner = THIS_MODULE; 274 altera_gc->mmchip.gc.parent = &pdev->dev; 275 276 ret = of_mm_gpiochip_add_data(node, &altera_gc->mmchip, altera_gc); 277 if (ret) { 278 dev_err(&pdev->dev, "Failed adding memory mapped gpiochip\n"); 279 return ret; 280 } 281 282 platform_set_drvdata(pdev, altera_gc); 283 284 altera_gc->mapped_irq = platform_get_irq(pdev, 0); 285 286 if (altera_gc->mapped_irq < 0) 287 goto skip_irq; 288 289 if (of_property_read_u32(node, "altr,interrupt-type", ®)) { 290 ret = -EINVAL; 291 dev_err(&pdev->dev, 292 "altr,interrupt-type value not set in device tree\n"); 293 goto teardown; 294 } 295 altera_gc->interrupt_trigger = reg; 296 297 ret = gpiochip_irqchip_add(&altera_gc->mmchip.gc, &altera_irq_chip, 0, 298 handle_bad_irq, IRQ_TYPE_NONE); 299 300 if (ret) { 301 dev_err(&pdev->dev, "could not add irqchip\n"); 302 goto teardown; 303 } 304 305 gpiochip_set_chained_irqchip(&altera_gc->mmchip.gc, 306 &altera_irq_chip, 307 altera_gc->mapped_irq, 308 altera_gc->interrupt_trigger == IRQ_TYPE_LEVEL_HIGH ? 309 altera_gpio_irq_leveL_high_handler : 310 altera_gpio_irq_edge_handler); 311 312 skip_irq: 313 return 0; 314 teardown: 315 of_mm_gpiochip_remove(&altera_gc->mmchip); 316 pr_err("%pOF: registration failed with status %d\n", 317 node, ret); 318 319 return ret; 320 } 321 322 static int altera_gpio_remove(struct platform_device *pdev) 323 { 324 struct altera_gpio_chip *altera_gc = platform_get_drvdata(pdev); 325 326 of_mm_gpiochip_remove(&altera_gc->mmchip); 327 328 return 0; 329 } 330 331 static const struct of_device_id altera_gpio_of_match[] = { 332 { .compatible = "altr,pio-1.0", }, 333 {}, 334 }; 335 MODULE_DEVICE_TABLE(of, altera_gpio_of_match); 336 337 static struct platform_driver altera_gpio_driver = { 338 .driver = { 339 .name = "altera_gpio", 340 .of_match_table = of_match_ptr(altera_gpio_of_match), 341 }, 342 .probe = altera_gpio_probe, 343 .remove = altera_gpio_remove, 344 }; 345 346 static int __init altera_gpio_init(void) 347 { 348 return platform_driver_register(&altera_gpio_driver); 349 } 350 subsys_initcall(altera_gpio_init); 351 352 static void __exit altera_gpio_exit(void) 353 { 354 platform_driver_unregister(&altera_gpio_driver); 355 } 356 module_exit(altera_gpio_exit); 357 358 MODULE_AUTHOR("Tien Hock Loh <thloh@altera.com>"); 359 MODULE_DESCRIPTION("Altera GPIO driver"); 360 MODULE_LICENSE("GPL"); 361