1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * GPIO driver for the ACCES 104-IDIO-16 family 4 * Copyright (C) 2015 William Breathitt Gray 5 * 6 * This driver supports the following ACCES devices: 104-IDIO-16, 7 * 104-IDIO-16E, 104-IDO-16, 104-IDIO-8, 104-IDIO-8E, and 104-IDO-8. 8 */ 9 #include <linux/bitmap.h> 10 #include <linux/device.h> 11 #include <linux/errno.h> 12 #include <linux/gpio/driver.h> 13 #include <linux/io.h> 14 #include <linux/ioport.h> 15 #include <linux/interrupt.h> 16 #include <linux/irqdesc.h> 17 #include <linux/isa.h> 18 #include <linux/kernel.h> 19 #include <linux/module.h> 20 #include <linux/moduleparam.h> 21 #include <linux/spinlock.h> 22 #include <linux/types.h> 23 24 #include "gpio-idio-16.h" 25 26 #define IDIO_16_EXTENT 8 27 #define MAX_NUM_IDIO_16 max_num_isa_dev(IDIO_16_EXTENT) 28 29 static unsigned int base[MAX_NUM_IDIO_16]; 30 static unsigned int num_idio_16; 31 module_param_hw_array(base, uint, ioport, &num_idio_16, 0); 32 MODULE_PARM_DESC(base, "ACCES 104-IDIO-16 base addresses"); 33 34 static unsigned int irq[MAX_NUM_IDIO_16]; 35 static unsigned int num_irq; 36 module_param_hw_array(irq, uint, irq, &num_irq, 0); 37 MODULE_PARM_DESC(irq, "ACCES 104-IDIO-16 interrupt line numbers"); 38 39 /** 40 * struct idio_16_gpio - GPIO device private data structure 41 * @chip: instance of the gpio_chip 42 * @lock: synchronization lock to prevent I/O race conditions 43 * @irq_mask: I/O bits affected by interrupts 44 * @reg: I/O address offset for the device registers 45 * @state: ACCES IDIO-16 device state 46 */ 47 struct idio_16_gpio { 48 struct gpio_chip chip; 49 raw_spinlock_t lock; 50 unsigned long irq_mask; 51 struct idio_16 __iomem *reg; 52 struct idio_16_state state; 53 }; 54 55 static int idio_16_gpio_get_direction(struct gpio_chip *chip, 56 unsigned int offset) 57 { 58 if (idio_16_get_direction(offset)) 59 return GPIO_LINE_DIRECTION_IN; 60 61 return GPIO_LINE_DIRECTION_OUT; 62 } 63 64 static int idio_16_gpio_direction_input(struct gpio_chip *chip, 65 unsigned int offset) 66 { 67 return 0; 68 } 69 70 static int idio_16_gpio_direction_output(struct gpio_chip *chip, 71 unsigned int offset, int value) 72 { 73 chip->set(chip, offset, value); 74 return 0; 75 } 76 77 static int idio_16_gpio_get(struct gpio_chip *chip, unsigned int offset) 78 { 79 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); 80 81 return idio_16_get(idio16gpio->reg, &idio16gpio->state, offset); 82 } 83 84 static int idio_16_gpio_get_multiple(struct gpio_chip *chip, 85 unsigned long *mask, unsigned long *bits) 86 { 87 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); 88 89 idio_16_get_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits); 90 91 return 0; 92 } 93 94 static void idio_16_gpio_set(struct gpio_chip *chip, unsigned int offset, 95 int value) 96 { 97 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); 98 99 idio_16_set(idio16gpio->reg, &idio16gpio->state, offset, value); 100 } 101 102 static void idio_16_gpio_set_multiple(struct gpio_chip *chip, 103 unsigned long *mask, unsigned long *bits) 104 { 105 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); 106 107 idio_16_set_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits); 108 } 109 110 static void idio_16_irq_ack(struct irq_data *data) 111 { 112 } 113 114 static void idio_16_irq_mask(struct irq_data *data) 115 { 116 struct gpio_chip *chip = irq_data_get_irq_chip_data(data); 117 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); 118 const unsigned long offset = irqd_to_hwirq(data); 119 unsigned long flags; 120 121 idio16gpio->irq_mask &= ~BIT(offset); 122 gpiochip_disable_irq(chip, offset); 123 124 if (!idio16gpio->irq_mask) { 125 raw_spin_lock_irqsave(&idio16gpio->lock, flags); 126 127 iowrite8(0, &idio16gpio->reg->irq_ctl); 128 129 raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); 130 } 131 } 132 133 static void idio_16_irq_unmask(struct irq_data *data) 134 { 135 struct gpio_chip *chip = irq_data_get_irq_chip_data(data); 136 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); 137 const unsigned long offset = irqd_to_hwirq(data); 138 const unsigned long prev_irq_mask = idio16gpio->irq_mask; 139 unsigned long flags; 140 141 gpiochip_enable_irq(chip, offset); 142 idio16gpio->irq_mask |= BIT(offset); 143 144 if (!prev_irq_mask) { 145 raw_spin_lock_irqsave(&idio16gpio->lock, flags); 146 147 ioread8(&idio16gpio->reg->irq_ctl); 148 149 raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); 150 } 151 } 152 153 static int idio_16_irq_set_type(struct irq_data *data, unsigned int flow_type) 154 { 155 /* The only valid irq types are none and both-edges */ 156 if (flow_type != IRQ_TYPE_NONE && 157 (flow_type & IRQ_TYPE_EDGE_BOTH) != IRQ_TYPE_EDGE_BOTH) 158 return -EINVAL; 159 160 return 0; 161 } 162 163 static const struct irq_chip idio_16_irqchip = { 164 .name = "104-idio-16", 165 .irq_ack = idio_16_irq_ack, 166 .irq_mask = idio_16_irq_mask, 167 .irq_unmask = idio_16_irq_unmask, 168 .irq_set_type = idio_16_irq_set_type, 169 .flags = IRQCHIP_IMMUTABLE, 170 GPIOCHIP_IRQ_RESOURCE_HELPERS, 171 }; 172 173 static irqreturn_t idio_16_irq_handler(int irq, void *dev_id) 174 { 175 struct idio_16_gpio *const idio16gpio = dev_id; 176 struct gpio_chip *const chip = &idio16gpio->chip; 177 int gpio; 178 179 for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio) 180 generic_handle_domain_irq(chip->irq.domain, gpio); 181 182 raw_spin_lock(&idio16gpio->lock); 183 184 iowrite8(0, &idio16gpio->reg->in0_7); 185 186 raw_spin_unlock(&idio16gpio->lock); 187 188 return IRQ_HANDLED; 189 } 190 191 #define IDIO_16_NGPIO 32 192 static const char *idio_16_names[IDIO_16_NGPIO] = { 193 "OUT0", "OUT1", "OUT2", "OUT3", "OUT4", "OUT5", "OUT6", "OUT7", 194 "OUT8", "OUT9", "OUT10", "OUT11", "OUT12", "OUT13", "OUT14", "OUT15", 195 "IIN0", "IIN1", "IIN2", "IIN3", "IIN4", "IIN5", "IIN6", "IIN7", 196 "IIN8", "IIN9", "IIN10", "IIN11", "IIN12", "IIN13", "IIN14", "IIN15" 197 }; 198 199 static int idio_16_irq_init_hw(struct gpio_chip *gc) 200 { 201 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(gc); 202 203 /* Disable IRQ by default */ 204 iowrite8(0, &idio16gpio->reg->irq_ctl); 205 iowrite8(0, &idio16gpio->reg->in0_7); 206 207 return 0; 208 } 209 210 static int idio_16_probe(struct device *dev, unsigned int id) 211 { 212 struct idio_16_gpio *idio16gpio; 213 const char *const name = dev_name(dev); 214 struct gpio_irq_chip *girq; 215 int err; 216 217 idio16gpio = devm_kzalloc(dev, sizeof(*idio16gpio), GFP_KERNEL); 218 if (!idio16gpio) 219 return -ENOMEM; 220 221 if (!devm_request_region(dev, base[id], IDIO_16_EXTENT, name)) { 222 dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n", 223 base[id], base[id] + IDIO_16_EXTENT); 224 return -EBUSY; 225 } 226 227 idio16gpio->reg = devm_ioport_map(dev, base[id], IDIO_16_EXTENT); 228 if (!idio16gpio->reg) 229 return -ENOMEM; 230 231 idio16gpio->chip.label = name; 232 idio16gpio->chip.parent = dev; 233 idio16gpio->chip.owner = THIS_MODULE; 234 idio16gpio->chip.base = -1; 235 idio16gpio->chip.ngpio = IDIO_16_NGPIO; 236 idio16gpio->chip.names = idio_16_names; 237 idio16gpio->chip.get_direction = idio_16_gpio_get_direction; 238 idio16gpio->chip.direction_input = idio_16_gpio_direction_input; 239 idio16gpio->chip.direction_output = idio_16_gpio_direction_output; 240 idio16gpio->chip.get = idio_16_gpio_get; 241 idio16gpio->chip.get_multiple = idio_16_gpio_get_multiple; 242 idio16gpio->chip.set = idio_16_gpio_set; 243 idio16gpio->chip.set_multiple = idio_16_gpio_set_multiple; 244 245 idio_16_state_init(&idio16gpio->state); 246 /* FET off states are represented by bit values of "1" */ 247 bitmap_fill(idio16gpio->state.out_state, IDIO_16_NOUT); 248 249 girq = &idio16gpio->chip.irq; 250 gpio_irq_chip_set_chip(girq, &idio_16_irqchip); 251 /* This will let us handle the parent IRQ in the driver */ 252 girq->parent_handler = NULL; 253 girq->num_parents = 0; 254 girq->parents = NULL; 255 girq->default_type = IRQ_TYPE_NONE; 256 girq->handler = handle_edge_irq; 257 girq->init_hw = idio_16_irq_init_hw; 258 259 raw_spin_lock_init(&idio16gpio->lock); 260 261 err = devm_gpiochip_add_data(dev, &idio16gpio->chip, idio16gpio); 262 if (err) { 263 dev_err(dev, "GPIO registering failed (%d)\n", err); 264 return err; 265 } 266 267 err = devm_request_irq(dev, irq[id], idio_16_irq_handler, 0, name, 268 idio16gpio); 269 if (err) { 270 dev_err(dev, "IRQ handler registering failed (%d)\n", err); 271 return err; 272 } 273 274 return 0; 275 } 276 277 static struct isa_driver idio_16_driver = { 278 .probe = idio_16_probe, 279 .driver = { 280 .name = "104-idio-16" 281 }, 282 }; 283 284 module_isa_driver_with_irq(idio_16_driver, num_idio_16, num_irq); 285 286 MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>"); 287 MODULE_DESCRIPTION("ACCES 104-IDIO-16 GPIO driver"); 288 MODULE_LICENSE("GPL v2"); 289 MODULE_IMPORT_NS(GPIO_IDIO_16); 290