1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * GPIO driver for the ACCES 104-DIO-48E series
4  * Copyright (C) 2016 William Breathitt Gray
5  *
6  * This driver supports the following ACCES devices: 104-DIO-48E and
7  * 104-DIO-24E.
8  */
9 #include <linux/bits.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/ioport.h>
13 #include <linux/irq.h>
14 #include <linux/isa.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/regmap.h>
19 #include <linux/types.h>
20 
21 #include "gpio-i8255.h"
22 
23 MODULE_IMPORT_NS(I8255);
24 
25 #define DIO48E_EXTENT 16
26 #define MAX_NUM_DIO48E max_num_isa_dev(DIO48E_EXTENT)
27 
28 static unsigned int base[MAX_NUM_DIO48E];
29 static unsigned int num_dio48e;
30 module_param_hw_array(base, uint, ioport, &num_dio48e, 0);
31 MODULE_PARM_DESC(base, "ACCES 104-DIO-48E base addresses");
32 
33 static unsigned int irq[MAX_NUM_DIO48E];
34 static unsigned int num_irq;
35 module_param_hw_array(irq, uint, irq, &num_irq, 0);
36 MODULE_PARM_DESC(irq, "ACCES 104-DIO-48E interrupt line numbers");
37 
38 #define DIO48E_ENABLE_INTERRUPT 0xB
39 #define DIO48E_DISABLE_INTERRUPT DIO48E_ENABLE_INTERRUPT
40 #define DIO48E_CLEAR_INTERRUPT 0xF
41 
42 #define DIO48E_NUM_PPI 2
43 
44 static const struct regmap_range dio48e_wr_ranges[] = {
45 	regmap_reg_range(0x0, 0x9), regmap_reg_range(0xB, 0xB),
46 	regmap_reg_range(0xD, 0xD), regmap_reg_range(0xF, 0xF),
47 };
48 static const struct regmap_range dio48e_rd_ranges[] = {
49 	regmap_reg_range(0x0, 0x2), regmap_reg_range(0x4, 0x6),
50 	regmap_reg_range(0xB, 0xB), regmap_reg_range(0xD, 0xD),
51 	regmap_reg_range(0xF, 0xF),
52 };
53 static const struct regmap_range dio48e_volatile_ranges[] = {
54 	i8255_volatile_regmap_range(0x0), i8255_volatile_regmap_range(0x4),
55 	regmap_reg_range(0xB, 0xB), regmap_reg_range(0xD, 0xD),
56 	regmap_reg_range(0xF, 0xF),
57 };
58 static const struct regmap_range dio48e_precious_ranges[] = {
59 	regmap_reg_range(0xB, 0xB), regmap_reg_range(0xD, 0xD),
60 	regmap_reg_range(0xF, 0xF),
61 };
62 static const struct regmap_access_table dio48e_wr_table = {
63 	.yes_ranges = dio48e_wr_ranges,
64 	.n_yes_ranges = ARRAY_SIZE(dio48e_wr_ranges),
65 };
66 static const struct regmap_access_table dio48e_rd_table = {
67 	.yes_ranges = dio48e_rd_ranges,
68 	.n_yes_ranges = ARRAY_SIZE(dio48e_rd_ranges),
69 };
70 static const struct regmap_access_table dio48e_volatile_table = {
71 	.yes_ranges = dio48e_volatile_ranges,
72 	.n_yes_ranges = ARRAY_SIZE(dio48e_volatile_ranges),
73 };
74 static const struct regmap_access_table dio48e_precious_table = {
75 	.yes_ranges = dio48e_precious_ranges,
76 	.n_yes_ranges = ARRAY_SIZE(dio48e_precious_ranges),
77 };
78 static const struct regmap_config dio48e_regmap_config = {
79 	.reg_bits = 8,
80 	.reg_stride = 1,
81 	.val_bits = 8,
82 	.io_port = true,
83 	.max_register = 0xF,
84 	.wr_table = &dio48e_wr_table,
85 	.rd_table = &dio48e_rd_table,
86 	.volatile_table = &dio48e_volatile_table,
87 	.precious_table = &dio48e_precious_table,
88 	.cache_type = REGCACHE_FLAT,
89 	.use_raw_spinlock = true,
90 };
91 
92 /* only bit 3 on each respective Port C supports interrupts */
93 #define DIO48E_REGMAP_IRQ(_ppi)						\
94 	[19 + (_ppi) * 24] = {						\
95 		.mask = BIT(_ppi),					\
96 		.type = { .types_supported = IRQ_TYPE_EDGE_RISING },	\
97 	}
98 
99 static const struct regmap_irq dio48e_regmap_irqs[] = {
100 	DIO48E_REGMAP_IRQ(0), DIO48E_REGMAP_IRQ(1),
101 };
102 
103 /**
104  * struct dio48e_gpio - GPIO device private data structure
105  * @map:	Regmap for the device
106  * @irq_mask:	Current IRQ mask state on the device
107  */
108 struct dio48e_gpio {
109 	struct regmap *map;
110 	unsigned int irq_mask;
111 };
112 
113 static int dio48e_handle_mask_sync(const int index,
114 				   const unsigned int mask_buf_def,
115 				   const unsigned int mask_buf,
116 				   void *const irq_drv_data)
117 {
118 	struct dio48e_gpio *const dio48egpio = irq_drv_data;
119 	const unsigned int prev_mask = dio48egpio->irq_mask;
120 	int err;
121 	unsigned int val;
122 
123 	/* exit early if no change since the previous mask */
124 	if (mask_buf == prev_mask)
125 		return 0;
126 
127 	/* remember the current mask for the next mask sync */
128 	dio48egpio->irq_mask = mask_buf;
129 
130 	/* if all previously masked, enable interrupts when unmasking */
131 	if (prev_mask == mask_buf_def) {
132 		err = regmap_write(dio48egpio->map, DIO48E_CLEAR_INTERRUPT, 0x00);
133 		if (err)
134 			return err;
135 		return regmap_write(dio48egpio->map, DIO48E_ENABLE_INTERRUPT, 0x00);
136 	}
137 
138 	/* if all are currently masked, disable interrupts */
139 	if (mask_buf == mask_buf_def)
140 		return regmap_read(dio48egpio->map, DIO48E_DISABLE_INTERRUPT, &val);
141 
142 	return 0;
143 }
144 
145 #define DIO48E_NGPIO 48
146 static const char *dio48e_names[DIO48E_NGPIO] = {
147 	"PPI Group 0 Port A 0", "PPI Group 0 Port A 1", "PPI Group 0 Port A 2",
148 	"PPI Group 0 Port A 3", "PPI Group 0 Port A 4", "PPI Group 0 Port A 5",
149 	"PPI Group 0 Port A 6", "PPI Group 0 Port A 7",	"PPI Group 0 Port B 0",
150 	"PPI Group 0 Port B 1", "PPI Group 0 Port B 2", "PPI Group 0 Port B 3",
151 	"PPI Group 0 Port B 4", "PPI Group 0 Port B 5", "PPI Group 0 Port B 6",
152 	"PPI Group 0 Port B 7", "PPI Group 0 Port C 0", "PPI Group 0 Port C 1",
153 	"PPI Group 0 Port C 2", "PPI Group 0 Port C 3", "PPI Group 0 Port C 4",
154 	"PPI Group 0 Port C 5", "PPI Group 0 Port C 6", "PPI Group 0 Port C 7",
155 	"PPI Group 1 Port A 0", "PPI Group 1 Port A 1", "PPI Group 1 Port A 2",
156 	"PPI Group 1 Port A 3", "PPI Group 1 Port A 4", "PPI Group 1 Port A 5",
157 	"PPI Group 1 Port A 6", "PPI Group 1 Port A 7",	"PPI Group 1 Port B 0",
158 	"PPI Group 1 Port B 1", "PPI Group 1 Port B 2", "PPI Group 1 Port B 3",
159 	"PPI Group 1 Port B 4", "PPI Group 1 Port B 5", "PPI Group 1 Port B 6",
160 	"PPI Group 1 Port B 7", "PPI Group 1 Port C 0", "PPI Group 1 Port C 1",
161 	"PPI Group 1 Port C 2", "PPI Group 1 Port C 3", "PPI Group 1 Port C 4",
162 	"PPI Group 1 Port C 5", "PPI Group 1 Port C 6", "PPI Group 1 Port C 7"
163 };
164 
165 static int dio48e_irq_init_hw(struct regmap *const map)
166 {
167 	unsigned int val;
168 
169 	/* Disable IRQ by default */
170 	return regmap_read(map, DIO48E_DISABLE_INTERRUPT, &val);
171 }
172 
173 static int dio48e_probe(struct device *dev, unsigned int id)
174 {
175 	const char *const name = dev_name(dev);
176 	struct i8255_regmap_config config = {};
177 	void __iomem *regs;
178 	struct regmap *map;
179 	int err;
180 	struct regmap_irq_chip *chip;
181 	struct dio48e_gpio *dio48egpio;
182 	struct regmap_irq_chip_data *chip_data;
183 
184 	if (!devm_request_region(dev, base[id], DIO48E_EXTENT, name)) {
185 		dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
186 			base[id], base[id] + DIO48E_EXTENT);
187 		return -EBUSY;
188 	}
189 
190 	regs = devm_ioport_map(dev, base[id], DIO48E_EXTENT);
191 	if (!regs)
192 		return -ENOMEM;
193 
194 	map = devm_regmap_init_mmio(dev, regs, &dio48e_regmap_config);
195 	if (IS_ERR(map))
196 		return dev_err_probe(dev, PTR_ERR(map),
197 				     "Unable to initialize register map\n");
198 
199 	dio48egpio = devm_kzalloc(dev, sizeof(*dio48egpio), GFP_KERNEL);
200 	if (!dio48egpio)
201 		return -ENOMEM;
202 
203 	dio48egpio->map = map;
204 
205 	chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
206 	if (!chip)
207 		return -ENOMEM;
208 
209 	chip->name = name;
210 	chip->mask_base = DIO48E_ENABLE_INTERRUPT;
211 	chip->ack_base = DIO48E_CLEAR_INTERRUPT;
212 	chip->no_status = true;
213 	chip->num_regs = 1;
214 	chip->irqs = dio48e_regmap_irqs;
215 	chip->num_irqs = ARRAY_SIZE(dio48e_regmap_irqs);
216 	chip->handle_mask_sync = dio48e_handle_mask_sync;
217 	chip->irq_drv_data = dio48egpio;
218 
219 	/* Initialize to prevent spurious interrupts before we're ready */
220 	err = dio48e_irq_init_hw(map);
221 	if (err)
222 		return err;
223 
224 	err = devm_regmap_add_irq_chip(dev, map, irq[id], 0, 0, chip, &chip_data);
225 	if (err)
226 		return dev_err_probe(dev, err, "IRQ registration failed\n");
227 
228 	config.parent = dev;
229 	config.map = map;
230 	config.num_ppi = DIO48E_NUM_PPI;
231 	config.names = dio48e_names;
232 	config.domain = regmap_irq_get_domain(chip_data);
233 
234 	return devm_i8255_regmap_register(dev, &config);
235 }
236 
237 static struct isa_driver dio48e_driver = {
238 	.probe = dio48e_probe,
239 	.driver = {
240 		.name = "104-dio-48e"
241 	},
242 };
243 module_isa_driver_with_irq(dio48e_driver, num_dio48e, num_irq);
244 
245 MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
246 MODULE_DESCRIPTION("ACCES 104-DIO-48E GPIO driver");
247 MODULE_LICENSE("GPL v2");
248