1 /* 2 * FSI hub master driver 3 * 4 * Copyright (C) IBM Corporation 2016 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16 #include <linux/delay.h> 17 #include <linux/fsi.h> 18 #include <linux/module.h> 19 #include <linux/of.h> 20 #include <linux/slab.h> 21 22 #include "fsi-master.h" 23 24 /* Control Registers */ 25 #define FSI_MMODE 0x0 /* R/W: mode */ 26 #define FSI_MDLYR 0x4 /* R/W: delay */ 27 #define FSI_MCRSP 0x8 /* R/W: clock rate */ 28 #define FSI_MENP0 0x10 /* R/W: enable */ 29 #define FSI_MLEVP0 0x18 /* R: plug detect */ 30 #define FSI_MSENP0 0x18 /* S: Set enable */ 31 #define FSI_MCENP0 0x20 /* C: Clear enable */ 32 #define FSI_MAEB 0x70 /* R: Error address */ 33 #define FSI_MVER 0x74 /* R: master version/type */ 34 #define FSI_MRESP0 0xd0 /* W: Port reset */ 35 #define FSI_MESRB0 0x1d0 /* R: Master error status */ 36 #define FSI_MRESB0 0x1d0 /* W: Reset bridge */ 37 #define FSI_MECTRL 0x2e0 /* W: Error control */ 38 39 /* MMODE: Mode control */ 40 #define FSI_MMODE_EIP 0x80000000 /* Enable interrupt polling */ 41 #define FSI_MMODE_ECRC 0x40000000 /* Enable error recovery */ 42 #define FSI_MMODE_EPC 0x10000000 /* Enable parity checking */ 43 #define FSI_MMODE_P8_TO_LSB 0x00000010 /* Timeout value LSB */ 44 /* MSB=1, LSB=0 is 0.8 ms */ 45 /* MSB=0, LSB=1 is 0.9 ms */ 46 #define FSI_MMODE_CRS0SHFT 18 /* Clk rate selection 0 shift */ 47 #define FSI_MMODE_CRS0MASK 0x3ff /* Clk rate selection 0 mask */ 48 #define FSI_MMODE_CRS1SHFT 8 /* Clk rate selection 1 shift */ 49 #define FSI_MMODE_CRS1MASK 0x3ff /* Clk rate selection 1 mask */ 50 51 /* MRESB: Reset brindge */ 52 #define FSI_MRESB_RST_GEN 0x80000000 /* General reset */ 53 #define FSI_MRESB_RST_ERR 0x40000000 /* Error Reset */ 54 55 /* MRESB: Reset port */ 56 #define FSI_MRESP_RST_ALL_MASTER 0x20000000 /* Reset all FSI masters */ 57 #define FSI_MRESP_RST_ALL_LINK 0x10000000 /* Reset all FSI port contr. */ 58 #define FSI_MRESP_RST_MCR 0x08000000 /* Reset FSI master reg. */ 59 #define FSI_MRESP_RST_PYE 0x04000000 /* Reset FSI parity error */ 60 #define FSI_MRESP_RST_ALL 0xfc000000 /* Reset any error */ 61 62 /* MECTRL: Error control */ 63 #define FSI_MECTRL_EOAE 0x8000 /* Enable machine check when */ 64 /* master 0 in error */ 65 #define FSI_MECTRL_P8_AUTO_TERM 0x4000 /* Auto terminate */ 66 67 #define FSI_ENGID_HUB_MASTER 0x1c 68 #define FSI_HUB_LINK_OFFSET 0x80000 69 #define FSI_HUB_LINK_SIZE 0x80000 70 #define FSI_HUB_MASTER_MAX_LINKS 8 71 72 #define FSI_LINK_ENABLE_SETUP_TIME 10 /* in mS */ 73 74 /* 75 * FSI hub master support 76 * 77 * A hub master increases the number of potential target devices that the 78 * primary FSI master can access. For each link a primary master supports, 79 * each of those links can in turn be chained to a hub master with multiple 80 * links of its own. 81 * 82 * The hub is controlled by a set of control registers exposed as a regular fsi 83 * device (the hub->upstream device), and provides access to the downstream FSI 84 * bus as through an address range on the slave itself (->addr and ->size). 85 * 86 * [This differs from "cascaded" masters, which expose the entire downstream 87 * bus entirely through the fsi device address range, and so have a smaller 88 * accessible address space.] 89 */ 90 struct fsi_master_hub { 91 struct fsi_master master; 92 struct fsi_device *upstream; 93 uint32_t addr, size; /* slave-relative addr of */ 94 /* master address space */ 95 }; 96 97 #define to_fsi_master_hub(m) container_of(m, struct fsi_master_hub, master) 98 99 static int hub_master_read(struct fsi_master *master, int link, 100 uint8_t id, uint32_t addr, void *val, size_t size) 101 { 102 struct fsi_master_hub *hub = to_fsi_master_hub(master); 103 104 if (id != 0) 105 return -EINVAL; 106 107 addr += hub->addr + (link * FSI_HUB_LINK_SIZE); 108 return fsi_slave_read(hub->upstream->slave, addr, val, size); 109 } 110 111 static int hub_master_write(struct fsi_master *master, int link, 112 uint8_t id, uint32_t addr, const void *val, size_t size) 113 { 114 struct fsi_master_hub *hub = to_fsi_master_hub(master); 115 116 if (id != 0) 117 return -EINVAL; 118 119 addr += hub->addr + (link * FSI_HUB_LINK_SIZE); 120 return fsi_slave_write(hub->upstream->slave, addr, val, size); 121 } 122 123 static int hub_master_break(struct fsi_master *master, int link) 124 { 125 uint32_t addr, cmd; 126 127 addr = 0x4; 128 cmd = cpu_to_be32(0xc0de0000); 129 130 return hub_master_write(master, link, 0, addr, &cmd, sizeof(cmd)); 131 } 132 133 static int hub_master_link_enable(struct fsi_master *master, int link) 134 { 135 struct fsi_master_hub *hub = to_fsi_master_hub(master); 136 int idx, bit; 137 __be32 reg; 138 int rc; 139 140 idx = link / 32; 141 bit = link % 32; 142 143 reg = cpu_to_be32(0x80000000 >> bit); 144 145 rc = fsi_device_write(hub->upstream, FSI_MSENP0 + (4 * idx), ®, 4); 146 147 mdelay(FSI_LINK_ENABLE_SETUP_TIME); 148 149 fsi_device_read(hub->upstream, FSI_MENP0 + (4 * idx), ®, 4); 150 151 return rc; 152 } 153 154 static void hub_master_release(struct device *dev) 155 { 156 struct fsi_master_hub *hub = to_fsi_master_hub(dev_to_fsi_master(dev)); 157 158 kfree(hub); 159 } 160 161 /* mmode encoders */ 162 static inline u32 fsi_mmode_crs0(u32 x) 163 { 164 return (x & FSI_MMODE_CRS0MASK) << FSI_MMODE_CRS0SHFT; 165 } 166 167 static inline u32 fsi_mmode_crs1(u32 x) 168 { 169 return (x & FSI_MMODE_CRS1MASK) << FSI_MMODE_CRS1SHFT; 170 } 171 172 static int hub_master_init(struct fsi_master_hub *hub) 173 { 174 struct fsi_device *dev = hub->upstream; 175 __be32 reg; 176 int rc; 177 178 reg = cpu_to_be32(FSI_MRESP_RST_ALL_MASTER | FSI_MRESP_RST_ALL_LINK 179 | FSI_MRESP_RST_MCR | FSI_MRESP_RST_PYE); 180 rc = fsi_device_write(dev, FSI_MRESP0, ®, sizeof(reg)); 181 if (rc) 182 return rc; 183 184 /* Initialize the MFSI (hub master) engine */ 185 reg = cpu_to_be32(FSI_MRESP_RST_ALL_MASTER | FSI_MRESP_RST_ALL_LINK 186 | FSI_MRESP_RST_MCR | FSI_MRESP_RST_PYE); 187 rc = fsi_device_write(dev, FSI_MRESP0, ®, sizeof(reg)); 188 if (rc) 189 return rc; 190 191 reg = cpu_to_be32(FSI_MECTRL_EOAE | FSI_MECTRL_P8_AUTO_TERM); 192 rc = fsi_device_write(dev, FSI_MECTRL, ®, sizeof(reg)); 193 if (rc) 194 return rc; 195 196 reg = cpu_to_be32(FSI_MMODE_EIP | FSI_MMODE_ECRC | FSI_MMODE_EPC 197 | fsi_mmode_crs0(1) | fsi_mmode_crs1(1) 198 | FSI_MMODE_P8_TO_LSB); 199 rc = fsi_device_write(dev, FSI_MMODE, ®, sizeof(reg)); 200 if (rc) 201 return rc; 202 203 reg = cpu_to_be32(0xffff0000); 204 rc = fsi_device_write(dev, FSI_MDLYR, ®, sizeof(reg)); 205 if (rc) 206 return rc; 207 208 reg = ~0; 209 rc = fsi_device_write(dev, FSI_MSENP0, ®, sizeof(reg)); 210 if (rc) 211 return rc; 212 213 /* Leave enabled long enough for master logic to set up */ 214 mdelay(FSI_LINK_ENABLE_SETUP_TIME); 215 216 rc = fsi_device_write(dev, FSI_MCENP0, ®, sizeof(reg)); 217 if (rc) 218 return rc; 219 220 rc = fsi_device_read(dev, FSI_MAEB, ®, sizeof(reg)); 221 if (rc) 222 return rc; 223 224 reg = cpu_to_be32(FSI_MRESP_RST_ALL_MASTER | FSI_MRESP_RST_ALL_LINK); 225 rc = fsi_device_write(dev, FSI_MRESP0, ®, sizeof(reg)); 226 if (rc) 227 return rc; 228 229 rc = fsi_device_read(dev, FSI_MLEVP0, ®, sizeof(reg)); 230 if (rc) 231 return rc; 232 233 /* Reset the master bridge */ 234 reg = cpu_to_be32(FSI_MRESB_RST_GEN); 235 rc = fsi_device_write(dev, FSI_MRESB0, ®, sizeof(reg)); 236 if (rc) 237 return rc; 238 239 reg = cpu_to_be32(FSI_MRESB_RST_ERR); 240 return fsi_device_write(dev, FSI_MRESB0, ®, sizeof(reg)); 241 } 242 243 static int hub_master_probe(struct device *dev) 244 { 245 struct fsi_device *fsi_dev = to_fsi_dev(dev); 246 struct fsi_master_hub *hub; 247 uint32_t reg, links; 248 __be32 __reg; 249 int rc; 250 251 rc = fsi_device_read(fsi_dev, FSI_MVER, &__reg, sizeof(__reg)); 252 if (rc) 253 return rc; 254 255 reg = be32_to_cpu(__reg); 256 links = (reg >> 8) & 0xff; 257 dev_dbg(dev, "hub version %08x (%d links)\n", reg, links); 258 259 rc = fsi_slave_claim_range(fsi_dev->slave, FSI_HUB_LINK_OFFSET, 260 FSI_HUB_LINK_SIZE * links); 261 if (rc) { 262 dev_err(dev, "can't claim slave address range for links"); 263 return rc; 264 } 265 266 hub = kzalloc(sizeof(*hub), GFP_KERNEL); 267 if (!hub) { 268 rc = -ENOMEM; 269 goto err_release; 270 } 271 272 hub->addr = FSI_HUB_LINK_OFFSET; 273 hub->size = FSI_HUB_LINK_SIZE * links; 274 hub->upstream = fsi_dev; 275 276 hub->master.dev.parent = dev; 277 hub->master.dev.release = hub_master_release; 278 hub->master.dev.of_node = of_node_get(dev_of_node(dev)); 279 280 hub->master.n_links = links; 281 hub->master.read = hub_master_read; 282 hub->master.write = hub_master_write; 283 hub->master.send_break = hub_master_break; 284 hub->master.link_enable = hub_master_link_enable; 285 286 dev_set_drvdata(dev, hub); 287 288 hub_master_init(hub); 289 290 rc = fsi_master_register(&hub->master); 291 if (rc) 292 goto err_release; 293 294 /* At this point, fsi_master_register performs the device_initialize(), 295 * and holds the sole reference on master.dev. This means the device 296 * will be freed (via ->release) during any subsequent call to 297 * fsi_master_unregister. We add our own reference to it here, so we 298 * can perform cleanup (in _remove()) without it being freed before 299 * we're ready. 300 */ 301 get_device(&hub->master.dev); 302 return 0; 303 304 err_release: 305 fsi_slave_release_range(fsi_dev->slave, FSI_HUB_LINK_OFFSET, 306 FSI_HUB_LINK_SIZE * links); 307 return rc; 308 } 309 310 static int hub_master_remove(struct device *dev) 311 { 312 struct fsi_master_hub *hub = dev_get_drvdata(dev); 313 314 fsi_master_unregister(&hub->master); 315 fsi_slave_release_range(hub->upstream->slave, hub->addr, hub->size); 316 of_node_put(hub->master.dev.of_node); 317 318 /* 319 * master.dev will likely be ->release()ed after this, which free()s 320 * the hub 321 */ 322 put_device(&hub->master.dev); 323 324 return 0; 325 } 326 327 static struct fsi_device_id hub_master_ids[] = { 328 { 329 .engine_type = FSI_ENGID_HUB_MASTER, 330 .version = FSI_VERSION_ANY, 331 }, 332 { 0 } 333 }; 334 335 static struct fsi_driver hub_master_driver = { 336 .id_table = hub_master_ids, 337 .drv = { 338 .name = "fsi-master-hub", 339 .bus = &fsi_bus_type, 340 .probe = hub_master_probe, 341 .remove = hub_master_remove, 342 } 343 }; 344 345 module_fsi_driver(hub_master_driver); 346 MODULE_LICENSE("GPL"); 347