1 /* 2 * A FSI master controller, using a simple GPIO bit-banging interface 3 */ 4 5 #include <linux/crc4.h> 6 #include <linux/delay.h> 7 #include <linux/device.h> 8 #include <linux/fsi.h> 9 #include <linux/gpio/consumer.h> 10 #include <linux/io.h> 11 #include <linux/irqflags.h> 12 #include <linux/module.h> 13 #include <linux/of.h> 14 #include <linux/platform_device.h> 15 #include <linux/slab.h> 16 17 #include "fsi-master.h" 18 19 #define FSI_GPIO_STD_DLY 1 /* Standard pin delay in nS */ 20 #define FSI_ECHO_DELAY_CLOCKS 16 /* Number clocks for echo delay */ 21 #define FSI_PRE_BREAK_CLOCKS 50 /* Number clocks to prep for break */ 22 #define FSI_BREAK_CLOCKS 256 /* Number of clocks to issue break */ 23 #define FSI_POST_BREAK_CLOCKS 16000 /* Number clocks to set up cfam */ 24 #define FSI_INIT_CLOCKS 5000 /* Clock out any old data */ 25 #define FSI_GPIO_DPOLL_CLOCKS 50 /* < 21 will cause slave to hang */ 26 #define FSI_GPIO_EPOLL_CLOCKS 50 /* Number of clocks for E_POLL retry */ 27 #define FSI_GPIO_STD_DELAY 10 /* Standard GPIO delay in nS */ 28 /* todo: adjust down as low as */ 29 /* possible or eliminate */ 30 #define FSI_CRC_ERR_RETRIES 10 31 32 #define FSI_GPIO_CMD_DPOLL 0x2 33 #define FSI_GPIO_CMD_EPOLL 0x3 34 #define FSI_GPIO_CMD_TERM 0x3f 35 #define FSI_GPIO_CMD_ABS_AR 0x4 36 #define FSI_GPIO_CMD_REL_AR 0x5 37 #define FSI_GPIO_CMD_SAME_AR 0x3 /* but only a 2-bit opcode... */ 38 39 /* Slave responses */ 40 #define FSI_GPIO_RESP_ACK 0 /* Success */ 41 #define FSI_GPIO_RESP_BUSY 1 /* Slave busy */ 42 #define FSI_GPIO_RESP_ERRA 2 /* Any (misc) Error */ 43 #define FSI_GPIO_RESP_ERRC 3 /* Slave reports master CRC error */ 44 45 #define FSI_GPIO_MAX_BUSY 200 46 #define FSI_GPIO_MTOE_COUNT 1000 47 #define FSI_GPIO_DRAIN_BITS 20 48 #define FSI_GPIO_CRC_SIZE 4 49 #define FSI_GPIO_MSG_ID_SIZE 2 50 #define FSI_GPIO_MSG_RESPID_SIZE 2 51 #define FSI_GPIO_PRIME_SLAVE_CLOCKS 20 52 53 #define LAST_ADDR_INVALID 0x1 54 55 struct fsi_master_gpio { 56 struct fsi_master master; 57 struct device *dev; 58 struct mutex cmd_lock; /* mutex for command ordering */ 59 struct gpio_desc *gpio_clk; 60 struct gpio_desc *gpio_data; 61 struct gpio_desc *gpio_trans; /* Voltage translator */ 62 struct gpio_desc *gpio_enable; /* FSI enable */ 63 struct gpio_desc *gpio_mux; /* Mux control */ 64 bool external_mode; 65 bool no_delays; 66 uint32_t last_addr; 67 }; 68 69 #define CREATE_TRACE_POINTS 70 #include <trace/events/fsi_master_gpio.h> 71 72 #define to_fsi_master_gpio(m) container_of(m, struct fsi_master_gpio, master) 73 74 struct fsi_gpio_msg { 75 uint64_t msg; 76 uint8_t bits; 77 }; 78 79 static void clock_toggle(struct fsi_master_gpio *master, int count) 80 { 81 int i; 82 83 for (i = 0; i < count; i++) { 84 if (!master->no_delays) 85 ndelay(FSI_GPIO_STD_DLY); 86 gpiod_set_value(master->gpio_clk, 0); 87 if (!master->no_delays) 88 ndelay(FSI_GPIO_STD_DLY); 89 gpiod_set_value(master->gpio_clk, 1); 90 } 91 } 92 93 static int sda_clock_in(struct fsi_master_gpio *master) 94 { 95 int in; 96 97 if (!master->no_delays) 98 ndelay(FSI_GPIO_STD_DLY); 99 gpiod_set_value(master->gpio_clk, 0); 100 101 /* Dummy read to feed the synchronizers */ 102 gpiod_get_value(master->gpio_data); 103 104 /* Actual data read */ 105 in = gpiod_get_value(master->gpio_data); 106 if (!master->no_delays) 107 ndelay(FSI_GPIO_STD_DLY); 108 gpiod_set_value(master->gpio_clk, 1); 109 return in ? 1 : 0; 110 } 111 112 static void sda_out(struct fsi_master_gpio *master, int value) 113 { 114 gpiod_set_value(master->gpio_data, value); 115 } 116 117 static void set_sda_input(struct fsi_master_gpio *master) 118 { 119 gpiod_direction_input(master->gpio_data); 120 gpiod_set_value(master->gpio_trans, 0); 121 } 122 123 static void set_sda_output(struct fsi_master_gpio *master, int value) 124 { 125 gpiod_set_value(master->gpio_trans, 1); 126 gpiod_direction_output(master->gpio_data, value); 127 } 128 129 static void clock_zeros(struct fsi_master_gpio *master, int count) 130 { 131 set_sda_output(master, 1); 132 clock_toggle(master, count); 133 } 134 135 static void serial_in(struct fsi_master_gpio *master, struct fsi_gpio_msg *msg, 136 uint8_t num_bits) 137 { 138 uint8_t bit, in_bit; 139 140 set_sda_input(master); 141 142 for (bit = 0; bit < num_bits; bit++) { 143 in_bit = sda_clock_in(master); 144 msg->msg <<= 1; 145 msg->msg |= ~in_bit & 0x1; /* Data is active low */ 146 } 147 msg->bits += num_bits; 148 149 trace_fsi_master_gpio_in(master, num_bits, msg->msg); 150 } 151 152 static void serial_out(struct fsi_master_gpio *master, 153 const struct fsi_gpio_msg *cmd) 154 { 155 uint8_t bit; 156 uint64_t msg = ~cmd->msg; /* Data is active low */ 157 uint64_t sda_mask = 0x1ULL << (cmd->bits - 1); 158 uint64_t last_bit = ~0; 159 int next_bit; 160 161 trace_fsi_master_gpio_out(master, cmd->bits, cmd->msg); 162 163 if (!cmd->bits) { 164 dev_warn(master->dev, "trying to output 0 bits\n"); 165 return; 166 } 167 set_sda_output(master, 0); 168 169 /* Send the start bit */ 170 sda_out(master, 0); 171 clock_toggle(master, 1); 172 173 /* Send the message */ 174 for (bit = 0; bit < cmd->bits; bit++) { 175 next_bit = (msg & sda_mask) >> (cmd->bits - 1); 176 if (last_bit ^ next_bit) { 177 sda_out(master, next_bit); 178 last_bit = next_bit; 179 } 180 clock_toggle(master, 1); 181 msg <<= 1; 182 } 183 } 184 185 static void msg_push_bits(struct fsi_gpio_msg *msg, uint64_t data, int bits) 186 { 187 msg->msg <<= bits; 188 msg->msg |= data & ((1ull << bits) - 1); 189 msg->bits += bits; 190 } 191 192 static void msg_push_crc(struct fsi_gpio_msg *msg) 193 { 194 uint8_t crc; 195 int top; 196 197 top = msg->bits & 0x3; 198 199 /* start bit, and any non-aligned top bits */ 200 crc = crc4(0, 1 << top | msg->msg >> (msg->bits - top), top + 1); 201 202 /* aligned bits */ 203 crc = crc4(crc, msg->msg, msg->bits - top); 204 205 msg_push_bits(msg, crc, 4); 206 } 207 208 static bool check_same_address(struct fsi_master_gpio *master, int id, 209 uint32_t addr) 210 { 211 /* this will also handle LAST_ADDR_INVALID */ 212 return master->last_addr == (((id & 0x3) << 21) | (addr & ~0x3)); 213 } 214 215 static bool check_relative_address(struct fsi_master_gpio *master, int id, 216 uint32_t addr, uint32_t *rel_addrp) 217 { 218 uint32_t last_addr = master->last_addr; 219 int32_t rel_addr; 220 221 if (last_addr == LAST_ADDR_INVALID) 222 return false; 223 224 /* We may be in 23-bit addressing mode, which uses the id as the 225 * top two address bits. So, if we're referencing a different ID, 226 * use absolute addresses. 227 */ 228 if (((last_addr >> 21) & 0x3) != id) 229 return false; 230 231 /* remove the top two bits from any 23-bit addressing */ 232 last_addr &= (1 << 21) - 1; 233 234 /* We know that the addresses are limited to 21 bits, so this won't 235 * overflow the signed rel_addr */ 236 rel_addr = addr - last_addr; 237 if (rel_addr > 255 || rel_addr < -256) 238 return false; 239 240 *rel_addrp = (uint32_t)rel_addr; 241 242 return true; 243 } 244 245 static void last_address_update(struct fsi_master_gpio *master, 246 int id, bool valid, uint32_t addr) 247 { 248 if (!valid) 249 master->last_addr = LAST_ADDR_INVALID; 250 else 251 master->last_addr = ((id & 0x3) << 21) | (addr & ~0x3); 252 } 253 254 /* 255 * Encode an Absolute/Relative/Same Address command 256 */ 257 static void build_ar_command(struct fsi_master_gpio *master, 258 struct fsi_gpio_msg *cmd, uint8_t id, 259 uint32_t addr, size_t size, const void *data) 260 { 261 int i, addr_bits, opcode_bits; 262 bool write = !!data; 263 uint8_t ds, opcode; 264 uint32_t rel_addr; 265 266 cmd->bits = 0; 267 cmd->msg = 0; 268 269 /* we have 21 bits of address max */ 270 addr &= ((1 << 21) - 1); 271 272 /* cmd opcodes are variable length - SAME_AR is only two bits */ 273 opcode_bits = 3; 274 275 if (check_same_address(master, id, addr)) { 276 /* we still address the byte offset within the word */ 277 addr_bits = 2; 278 opcode_bits = 2; 279 opcode = FSI_GPIO_CMD_SAME_AR; 280 281 } else if (check_relative_address(master, id, addr, &rel_addr)) { 282 /* 8 bits plus sign */ 283 addr_bits = 9; 284 addr = rel_addr; 285 opcode = FSI_GPIO_CMD_REL_AR; 286 287 } else { 288 addr_bits = 21; 289 opcode = FSI_GPIO_CMD_ABS_AR; 290 } 291 292 /* 293 * The read/write size is encoded in the lower bits of the address 294 * (as it must be naturally-aligned), and the following ds bit. 295 * 296 * size addr:1 addr:0 ds 297 * 1 x x 0 298 * 2 x 0 1 299 * 4 0 1 1 300 * 301 */ 302 ds = size > 1 ? 1 : 0; 303 addr &= ~(size - 1); 304 if (size == 4) 305 addr |= 1; 306 307 msg_push_bits(cmd, id, 2); 308 msg_push_bits(cmd, opcode, opcode_bits); 309 msg_push_bits(cmd, write ? 0 : 1, 1); 310 msg_push_bits(cmd, addr, addr_bits); 311 msg_push_bits(cmd, ds, 1); 312 for (i = 0; write && i < size; i++) 313 msg_push_bits(cmd, ((uint8_t *)data)[i], 8); 314 315 msg_push_crc(cmd); 316 } 317 318 static void build_dpoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id) 319 { 320 cmd->bits = 0; 321 cmd->msg = 0; 322 323 msg_push_bits(cmd, slave_id, 2); 324 msg_push_bits(cmd, FSI_GPIO_CMD_DPOLL, 3); 325 msg_push_crc(cmd); 326 } 327 328 static void build_epoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id) 329 { 330 cmd->bits = 0; 331 cmd->msg = 0; 332 333 msg_push_bits(cmd, slave_id, 2); 334 msg_push_bits(cmd, FSI_GPIO_CMD_EPOLL, 3); 335 msg_push_crc(cmd); 336 } 337 338 static void echo_delay(struct fsi_master_gpio *master) 339 { 340 set_sda_output(master, 1); 341 clock_toggle(master, FSI_ECHO_DELAY_CLOCKS); 342 } 343 344 static void build_term_command(struct fsi_gpio_msg *cmd, uint8_t slave_id) 345 { 346 cmd->bits = 0; 347 cmd->msg = 0; 348 349 msg_push_bits(cmd, slave_id, 2); 350 msg_push_bits(cmd, FSI_GPIO_CMD_TERM, 6); 351 msg_push_crc(cmd); 352 } 353 354 /* 355 * Note: callers rely specifically on this returning -EAGAIN for 356 * a CRC error detected in the response. Use other error code 357 * for other situations. It will be converted to something else 358 * higher up the stack before it reaches userspace. 359 */ 360 static int read_one_response(struct fsi_master_gpio *master, 361 uint8_t data_size, struct fsi_gpio_msg *msgp, uint8_t *tagp) 362 { 363 struct fsi_gpio_msg msg; 364 unsigned long flags; 365 uint32_t crc; 366 uint8_t tag; 367 int i; 368 369 local_irq_save(flags); 370 371 /* wait for the start bit */ 372 for (i = 0; i < FSI_GPIO_MTOE_COUNT; i++) { 373 msg.bits = 0; 374 msg.msg = 0; 375 serial_in(master, &msg, 1); 376 if (msg.msg) 377 break; 378 } 379 if (i == FSI_GPIO_MTOE_COUNT) { 380 dev_dbg(master->dev, 381 "Master time out waiting for response\n"); 382 local_irq_restore(flags); 383 return -ETIMEDOUT; 384 } 385 386 msg.bits = 0; 387 msg.msg = 0; 388 389 /* Read slave ID & response tag */ 390 serial_in(master, &msg, 4); 391 392 tag = msg.msg & 0x3; 393 394 /* If we have an ACK and we're expecting data, clock the data in too */ 395 if (tag == FSI_GPIO_RESP_ACK && data_size) 396 serial_in(master, &msg, data_size * 8); 397 398 /* read CRC */ 399 serial_in(master, &msg, FSI_GPIO_CRC_SIZE); 400 401 local_irq_restore(flags); 402 403 /* we have a whole message now; check CRC */ 404 crc = crc4(0, 1, 1); 405 crc = crc4(crc, msg.msg, msg.bits); 406 if (crc) { 407 /* Check if it's all 1's, that probably means the host is off */ 408 if (((~msg.msg) & ((1ull << msg.bits) - 1)) == 0) 409 return -ENODEV; 410 dev_dbg(master->dev, "ERR response CRC msg: 0x%016llx (%d bits)\n", 411 msg.msg, msg.bits); 412 return -EAGAIN; 413 } 414 415 if (msgp) 416 *msgp = msg; 417 if (tagp) 418 *tagp = tag; 419 420 return 0; 421 } 422 423 static int issue_term(struct fsi_master_gpio *master, uint8_t slave) 424 { 425 struct fsi_gpio_msg cmd; 426 unsigned long flags; 427 uint8_t tag; 428 int rc; 429 430 build_term_command(&cmd, slave); 431 432 local_irq_save(flags); 433 serial_out(master, &cmd); 434 echo_delay(master); 435 local_irq_restore(flags); 436 437 rc = read_one_response(master, 0, NULL, &tag); 438 if (rc < 0) { 439 dev_err(master->dev, 440 "TERM failed; lost communication with slave\n"); 441 return -EIO; 442 } else if (tag != FSI_GPIO_RESP_ACK) { 443 dev_err(master->dev, "TERM failed; response %d\n", tag); 444 return -EIO; 445 } 446 447 return 0; 448 } 449 450 static int poll_for_response(struct fsi_master_gpio *master, 451 uint8_t slave, uint8_t size, void *data) 452 { 453 struct fsi_gpio_msg response, cmd; 454 int busy_count = 0, rc, i; 455 unsigned long flags; 456 uint8_t tag; 457 uint8_t *data_byte = data; 458 int crc_err_retries = 0; 459 retry: 460 rc = read_one_response(master, size, &response, &tag); 461 462 /* Handle retries on CRC errors */ 463 if (rc == -EAGAIN) { 464 /* Too many retries ? */ 465 if (crc_err_retries++ > FSI_CRC_ERR_RETRIES) { 466 /* 467 * Pass it up as a -EIO otherwise upper level will retry 468 * the whole command which isn't what we want here. 469 */ 470 rc = -EIO; 471 goto fail; 472 } 473 dev_dbg(master->dev, 474 "CRC error retry %d\n", crc_err_retries); 475 trace_fsi_master_gpio_crc_rsp_error(master); 476 build_epoll_command(&cmd, slave); 477 local_irq_save(flags); 478 clock_zeros(master, FSI_GPIO_EPOLL_CLOCKS); 479 serial_out(master, &cmd); 480 echo_delay(master); 481 local_irq_restore(flags); 482 goto retry; 483 } else if (rc) 484 goto fail; 485 486 switch (tag) { 487 case FSI_GPIO_RESP_ACK: 488 if (size && data) { 489 uint64_t val = response.msg; 490 /* clear crc & mask */ 491 val >>= 4; 492 val &= (1ull << (size * 8)) - 1; 493 494 for (i = 0; i < size; i++) { 495 data_byte[size-i-1] = val; 496 val >>= 8; 497 } 498 } 499 break; 500 case FSI_GPIO_RESP_BUSY: 501 /* 502 * Its necessary to clock slave before issuing 503 * d-poll, not indicated in the hardware protocol 504 * spec. < 20 clocks causes slave to hang, 21 ok. 505 */ 506 if (busy_count++ < FSI_GPIO_MAX_BUSY) { 507 build_dpoll_command(&cmd, slave); 508 local_irq_save(flags); 509 clock_zeros(master, FSI_GPIO_DPOLL_CLOCKS); 510 serial_out(master, &cmd); 511 echo_delay(master); 512 local_irq_restore(flags); 513 goto retry; 514 } 515 dev_warn(master->dev, 516 "ERR slave is stuck in busy state, issuing TERM\n"); 517 local_irq_save(flags); 518 clock_zeros(master, FSI_GPIO_DPOLL_CLOCKS); 519 local_irq_restore(flags); 520 issue_term(master, slave); 521 rc = -EIO; 522 break; 523 524 case FSI_GPIO_RESP_ERRA: 525 dev_dbg(master->dev, "ERRA received: 0x%x\n", (int)response.msg); 526 rc = -EIO; 527 break; 528 case FSI_GPIO_RESP_ERRC: 529 dev_dbg(master->dev, "ERRC received: 0x%x\n", (int)response.msg); 530 trace_fsi_master_gpio_crc_cmd_error(master); 531 rc = -EAGAIN; 532 break; 533 } 534 535 if (busy_count > 0) 536 trace_fsi_master_gpio_poll_response_busy(master, busy_count); 537 fail: 538 /* Clock the slave enough to be ready for next operation */ 539 local_irq_save(flags); 540 clock_zeros(master, FSI_GPIO_PRIME_SLAVE_CLOCKS); 541 local_irq_restore(flags); 542 543 return rc; 544 } 545 546 static int send_request(struct fsi_master_gpio *master, 547 struct fsi_gpio_msg *cmd) 548 { 549 unsigned long flags; 550 551 if (master->external_mode) 552 return -EBUSY; 553 554 local_irq_save(flags); 555 serial_out(master, cmd); 556 echo_delay(master); 557 local_irq_restore(flags); 558 559 return 0; 560 } 561 562 static int fsi_master_gpio_xfer(struct fsi_master_gpio *master, uint8_t slave, 563 struct fsi_gpio_msg *cmd, size_t resp_len, void *resp) 564 { 565 int rc = -EAGAIN, retries = 0; 566 567 while ((retries++) < FSI_CRC_ERR_RETRIES) { 568 rc = send_request(master, cmd); 569 if (rc) 570 break; 571 rc = poll_for_response(master, slave, resp_len, resp); 572 if (rc != -EAGAIN) 573 break; 574 rc = -EIO; 575 dev_warn(master->dev, "ECRC retry %d\n", retries); 576 577 /* Pace it a bit before retry */ 578 msleep(1); 579 } 580 581 return rc; 582 } 583 584 static int fsi_master_gpio_read(struct fsi_master *_master, int link, 585 uint8_t id, uint32_t addr, void *val, size_t size) 586 { 587 struct fsi_master_gpio *master = to_fsi_master_gpio(_master); 588 struct fsi_gpio_msg cmd; 589 int rc; 590 591 if (link != 0) 592 return -ENODEV; 593 594 mutex_lock(&master->cmd_lock); 595 build_ar_command(master, &cmd, id, addr, size, NULL); 596 rc = fsi_master_gpio_xfer(master, id, &cmd, size, val); 597 last_address_update(master, id, rc == 0, addr); 598 mutex_unlock(&master->cmd_lock); 599 600 return rc; 601 } 602 603 static int fsi_master_gpio_write(struct fsi_master *_master, int link, 604 uint8_t id, uint32_t addr, const void *val, size_t size) 605 { 606 struct fsi_master_gpio *master = to_fsi_master_gpio(_master); 607 struct fsi_gpio_msg cmd; 608 int rc; 609 610 if (link != 0) 611 return -ENODEV; 612 613 mutex_lock(&master->cmd_lock); 614 build_ar_command(master, &cmd, id, addr, size, val); 615 rc = fsi_master_gpio_xfer(master, id, &cmd, 0, NULL); 616 last_address_update(master, id, rc == 0, addr); 617 mutex_unlock(&master->cmd_lock); 618 619 return rc; 620 } 621 622 static int fsi_master_gpio_term(struct fsi_master *_master, 623 int link, uint8_t id) 624 { 625 struct fsi_master_gpio *master = to_fsi_master_gpio(_master); 626 struct fsi_gpio_msg cmd; 627 int rc; 628 629 if (link != 0) 630 return -ENODEV; 631 632 mutex_lock(&master->cmd_lock); 633 build_term_command(&cmd, id); 634 rc = fsi_master_gpio_xfer(master, id, &cmd, 0, NULL); 635 last_address_update(master, id, false, 0); 636 mutex_unlock(&master->cmd_lock); 637 638 return rc; 639 } 640 641 static int fsi_master_gpio_break(struct fsi_master *_master, int link) 642 { 643 struct fsi_master_gpio *master = to_fsi_master_gpio(_master); 644 unsigned long flags; 645 646 if (link != 0) 647 return -ENODEV; 648 649 trace_fsi_master_gpio_break(master); 650 651 mutex_lock(&master->cmd_lock); 652 if (master->external_mode) { 653 mutex_unlock(&master->cmd_lock); 654 return -EBUSY; 655 } 656 657 local_irq_save(flags); 658 659 set_sda_output(master, 1); 660 sda_out(master, 1); 661 clock_toggle(master, FSI_PRE_BREAK_CLOCKS); 662 sda_out(master, 0); 663 clock_toggle(master, FSI_BREAK_CLOCKS); 664 echo_delay(master); 665 sda_out(master, 1); 666 clock_toggle(master, FSI_POST_BREAK_CLOCKS); 667 668 local_irq_restore(flags); 669 670 last_address_update(master, 0, false, 0); 671 mutex_unlock(&master->cmd_lock); 672 673 /* Wait for logic reset to take effect */ 674 udelay(200); 675 676 return 0; 677 } 678 679 static void fsi_master_gpio_init(struct fsi_master_gpio *master) 680 { 681 unsigned long flags; 682 683 gpiod_direction_output(master->gpio_mux, 1); 684 gpiod_direction_output(master->gpio_trans, 1); 685 gpiod_direction_output(master->gpio_enable, 1); 686 gpiod_direction_output(master->gpio_clk, 1); 687 gpiod_direction_output(master->gpio_data, 1); 688 689 /* todo: evaluate if clocks can be reduced */ 690 local_irq_save(flags); 691 clock_zeros(master, FSI_INIT_CLOCKS); 692 local_irq_restore(flags); 693 } 694 695 static void fsi_master_gpio_init_external(struct fsi_master_gpio *master) 696 { 697 gpiod_direction_output(master->gpio_mux, 0); 698 gpiod_direction_output(master->gpio_trans, 0); 699 gpiod_direction_output(master->gpio_enable, 1); 700 gpiod_direction_input(master->gpio_clk); 701 gpiod_direction_input(master->gpio_data); 702 } 703 704 static int fsi_master_gpio_link_enable(struct fsi_master *_master, int link) 705 { 706 struct fsi_master_gpio *master = to_fsi_master_gpio(_master); 707 int rc = -EBUSY; 708 709 if (link != 0) 710 return -ENODEV; 711 712 mutex_lock(&master->cmd_lock); 713 if (!master->external_mode) { 714 gpiod_set_value(master->gpio_enable, 1); 715 rc = 0; 716 } 717 mutex_unlock(&master->cmd_lock); 718 719 return rc; 720 } 721 722 static ssize_t external_mode_show(struct device *dev, 723 struct device_attribute *attr, char *buf) 724 { 725 struct fsi_master_gpio *master = dev_get_drvdata(dev); 726 727 return snprintf(buf, PAGE_SIZE - 1, "%u\n", 728 master->external_mode ? 1 : 0); 729 } 730 731 static ssize_t external_mode_store(struct device *dev, 732 struct device_attribute *attr, const char *buf, size_t count) 733 { 734 struct fsi_master_gpio *master = dev_get_drvdata(dev); 735 unsigned long val; 736 bool external_mode; 737 int err; 738 739 err = kstrtoul(buf, 0, &val); 740 if (err) 741 return err; 742 743 external_mode = !!val; 744 745 mutex_lock(&master->cmd_lock); 746 747 if (external_mode == master->external_mode) { 748 mutex_unlock(&master->cmd_lock); 749 return count; 750 } 751 752 master->external_mode = external_mode; 753 if (master->external_mode) 754 fsi_master_gpio_init_external(master); 755 else 756 fsi_master_gpio_init(master); 757 758 mutex_unlock(&master->cmd_lock); 759 760 fsi_master_rescan(&master->master); 761 762 return count; 763 } 764 765 static DEVICE_ATTR(external_mode, 0664, 766 external_mode_show, external_mode_store); 767 768 static int fsi_master_gpio_probe(struct platform_device *pdev) 769 { 770 struct fsi_master_gpio *master; 771 struct gpio_desc *gpio; 772 int rc; 773 774 master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL); 775 if (!master) 776 return -ENOMEM; 777 778 master->dev = &pdev->dev; 779 master->master.dev.parent = master->dev; 780 master->master.dev.of_node = of_node_get(dev_of_node(master->dev)); 781 master->last_addr = LAST_ADDR_INVALID; 782 783 gpio = devm_gpiod_get(&pdev->dev, "clock", 0); 784 if (IS_ERR(gpio)) { 785 dev_err(&pdev->dev, "failed to get clock gpio\n"); 786 return PTR_ERR(gpio); 787 } 788 master->gpio_clk = gpio; 789 790 gpio = devm_gpiod_get(&pdev->dev, "data", 0); 791 if (IS_ERR(gpio)) { 792 dev_err(&pdev->dev, "failed to get data gpio\n"); 793 return PTR_ERR(gpio); 794 } 795 master->gpio_data = gpio; 796 797 /* Optional GPIOs */ 798 gpio = devm_gpiod_get_optional(&pdev->dev, "trans", 0); 799 if (IS_ERR(gpio)) { 800 dev_err(&pdev->dev, "failed to get trans gpio\n"); 801 return PTR_ERR(gpio); 802 } 803 master->gpio_trans = gpio; 804 805 gpio = devm_gpiod_get_optional(&pdev->dev, "enable", 0); 806 if (IS_ERR(gpio)) { 807 dev_err(&pdev->dev, "failed to get enable gpio\n"); 808 return PTR_ERR(gpio); 809 } 810 master->gpio_enable = gpio; 811 812 gpio = devm_gpiod_get_optional(&pdev->dev, "mux", 0); 813 if (IS_ERR(gpio)) { 814 dev_err(&pdev->dev, "failed to get mux gpio\n"); 815 return PTR_ERR(gpio); 816 } 817 master->gpio_mux = gpio; 818 819 /* 820 * Check if GPIO block is slow enought that no extra delays 821 * are necessary. This improves performance on ast2500 by 822 * an order of magnitude. 823 */ 824 master->no_delays = device_property_present(&pdev->dev, "no-gpio-delays"); 825 826 master->master.n_links = 1; 827 master->master.flags = FSI_MASTER_FLAG_SWCLOCK; 828 master->master.read = fsi_master_gpio_read; 829 master->master.write = fsi_master_gpio_write; 830 master->master.term = fsi_master_gpio_term; 831 master->master.send_break = fsi_master_gpio_break; 832 master->master.link_enable = fsi_master_gpio_link_enable; 833 platform_set_drvdata(pdev, master); 834 mutex_init(&master->cmd_lock); 835 836 fsi_master_gpio_init(master); 837 838 rc = device_create_file(&pdev->dev, &dev_attr_external_mode); 839 if (rc) 840 return rc; 841 842 return fsi_master_register(&master->master); 843 } 844 845 846 static int fsi_master_gpio_remove(struct platform_device *pdev) 847 { 848 struct fsi_master_gpio *master = platform_get_drvdata(pdev); 849 850 devm_gpiod_put(&pdev->dev, master->gpio_clk); 851 devm_gpiod_put(&pdev->dev, master->gpio_data); 852 if (master->gpio_trans) 853 devm_gpiod_put(&pdev->dev, master->gpio_trans); 854 if (master->gpio_enable) 855 devm_gpiod_put(&pdev->dev, master->gpio_enable); 856 if (master->gpio_mux) 857 devm_gpiod_put(&pdev->dev, master->gpio_mux); 858 fsi_master_unregister(&master->master); 859 860 of_node_put(master->master.dev.of_node); 861 862 return 0; 863 } 864 865 static const struct of_device_id fsi_master_gpio_match[] = { 866 { .compatible = "fsi-master-gpio" }, 867 { }, 868 }; 869 870 static struct platform_driver fsi_master_gpio_driver = { 871 .driver = { 872 .name = "fsi-master-gpio", 873 .of_match_table = fsi_master_gpio_match, 874 }, 875 .probe = fsi_master_gpio_probe, 876 .remove = fsi_master_gpio_remove, 877 }; 878 879 module_platform_driver(fsi_master_gpio_driver); 880 MODULE_LICENSE("GPL"); 881