1473f01f7SAlan Tull // SPDX-License-Identifier: GPL-2.0
2ef3acdd8SAlan Tull /*
3ef3acdd8SAlan Tull * FPGA Region - Device Tree support for FPGA programming under Linux
4ef3acdd8SAlan Tull *
5ef3acdd8SAlan Tull * Copyright (C) 2013-2016 Altera Corporation
6ef3acdd8SAlan Tull * Copyright (C) 2017 Intel Corporation
7ef3acdd8SAlan Tull */
8ef3acdd8SAlan Tull #include <linux/fpga/fpga-bridge.h>
9ef3acdd8SAlan Tull #include <linux/fpga/fpga-mgr.h>
10ef3acdd8SAlan Tull #include <linux/fpga/fpga-region.h>
11ef3acdd8SAlan Tull #include <linux/idr.h>
12ef3acdd8SAlan Tull #include <linux/kernel.h>
13ef3acdd8SAlan Tull #include <linux/list.h>
14ef3acdd8SAlan Tull #include <linux/module.h>
15*84020839SRob Herring #include <linux/of.h>
16ef3acdd8SAlan Tull #include <linux/of_platform.h>
17*84020839SRob Herring #include <linux/platform_device.h>
18ef3acdd8SAlan Tull #include <linux/slab.h>
19ef3acdd8SAlan Tull #include <linux/spinlock.h>
20ef3acdd8SAlan Tull
21ef3acdd8SAlan Tull static const struct of_device_id fpga_region_of_match[] = {
22ef3acdd8SAlan Tull { .compatible = "fpga-region", },
23ef3acdd8SAlan Tull {},
24ef3acdd8SAlan Tull };
25ef3acdd8SAlan Tull MODULE_DEVICE_TABLE(of, fpga_region_of_match);
26ef3acdd8SAlan Tull
27ef3acdd8SAlan Tull /**
28ef3acdd8SAlan Tull * of_fpga_region_find - find FPGA region
29ef3acdd8SAlan Tull * @np: device node of FPGA Region
30ef3acdd8SAlan Tull *
31ef3acdd8SAlan Tull * Caller will need to put_device(®ion->dev) when done.
32ef3acdd8SAlan Tull *
33838a8438SNava kishore Manne * Return: FPGA Region struct or NULL
34ef3acdd8SAlan Tull */
of_fpga_region_find(struct device_node * np)35ef3acdd8SAlan Tull static struct fpga_region *of_fpga_region_find(struct device_node *np)
36ef3acdd8SAlan Tull {
3765b66682SSuzuki K Poulose return fpga_region_class_find(NULL, np, device_match_of_node);
38ef3acdd8SAlan Tull }
39ef3acdd8SAlan Tull
40ef3acdd8SAlan Tull /**
41ef3acdd8SAlan Tull * of_fpga_region_get_mgr - get reference for FPGA manager
42ef3acdd8SAlan Tull * @np: device node of FPGA region
43ef3acdd8SAlan Tull *
44ef3acdd8SAlan Tull * Get FPGA Manager from "fpga-mgr" property or from ancestor region.
45ef3acdd8SAlan Tull *
46ef3acdd8SAlan Tull * Caller should call fpga_mgr_put() when done with manager.
47ef3acdd8SAlan Tull *
48ef3acdd8SAlan Tull * Return: fpga manager struct or IS_ERR() condition containing error code.
49ef3acdd8SAlan Tull */
of_fpga_region_get_mgr(struct device_node * np)50ef3acdd8SAlan Tull static struct fpga_manager *of_fpga_region_get_mgr(struct device_node *np)
51ef3acdd8SAlan Tull {
52ef3acdd8SAlan Tull struct device_node *mgr_node;
53ef3acdd8SAlan Tull struct fpga_manager *mgr;
54ef3acdd8SAlan Tull
55ef3acdd8SAlan Tull of_node_get(np);
56ef3acdd8SAlan Tull while (np) {
57ef3acdd8SAlan Tull if (of_device_is_compatible(np, "fpga-region")) {
58ef3acdd8SAlan Tull mgr_node = of_parse_phandle(np, "fpga-mgr", 0);
59ef3acdd8SAlan Tull if (mgr_node) {
60ef3acdd8SAlan Tull mgr = of_fpga_mgr_get(mgr_node);
610f5eb154SIan Abbott of_node_put(mgr_node);
62ef3acdd8SAlan Tull of_node_put(np);
63ef3acdd8SAlan Tull return mgr;
64ef3acdd8SAlan Tull }
65ef3acdd8SAlan Tull }
66ef3acdd8SAlan Tull np = of_get_next_parent(np);
67ef3acdd8SAlan Tull }
68ef3acdd8SAlan Tull of_node_put(np);
69ef3acdd8SAlan Tull
70ef3acdd8SAlan Tull return ERR_PTR(-EINVAL);
71ef3acdd8SAlan Tull }
72ef3acdd8SAlan Tull
73ef3acdd8SAlan Tull /**
74ef3acdd8SAlan Tull * of_fpga_region_get_bridges - create a list of bridges
75ef3acdd8SAlan Tull * @region: FPGA region
76ef3acdd8SAlan Tull *
77ef3acdd8SAlan Tull * Create a list of bridges including the parent bridge and the bridges
78ef3acdd8SAlan Tull * specified by "fpga-bridges" property. Note that the
79ef3acdd8SAlan Tull * fpga_bridges_enable/disable/put functions are all fine with an empty list
80ef3acdd8SAlan Tull * if that happens.
81ef3acdd8SAlan Tull *
82ef3acdd8SAlan Tull * Caller should call fpga_bridges_put(®ion->bridge_list) when
83ef3acdd8SAlan Tull * done with the bridges.
84ef3acdd8SAlan Tull *
85838a8438SNava kishore Manne * Return: 0 for success (even if there are no bridges specified)
86ef3acdd8SAlan Tull * or -EBUSY if any of the bridges are in use.
87ef3acdd8SAlan Tull */
of_fpga_region_get_bridges(struct fpga_region * region)88ef3acdd8SAlan Tull static int of_fpga_region_get_bridges(struct fpga_region *region)
89ef3acdd8SAlan Tull {
90ef3acdd8SAlan Tull struct device *dev = ®ion->dev;
91ef3acdd8SAlan Tull struct device_node *region_np = dev->of_node;
92ef3acdd8SAlan Tull struct fpga_image_info *info = region->info;
93ef3acdd8SAlan Tull struct device_node *br, *np, *parent_br = NULL;
94ef3acdd8SAlan Tull int i, ret;
95ef3acdd8SAlan Tull
96ef3acdd8SAlan Tull /* If parent is a bridge, add to list */
97ef3acdd8SAlan Tull ret = of_fpga_bridge_get_to_list(region_np->parent, info,
98ef3acdd8SAlan Tull ®ion->bridge_list);
99ef3acdd8SAlan Tull
100ef3acdd8SAlan Tull /* -EBUSY means parent is a bridge that is under use. Give up. */
101ef3acdd8SAlan Tull if (ret == -EBUSY)
102ef3acdd8SAlan Tull return ret;
103ef3acdd8SAlan Tull
104ef3acdd8SAlan Tull /* Zero return code means parent was a bridge and was added to list. */
105ef3acdd8SAlan Tull if (!ret)
106ef3acdd8SAlan Tull parent_br = region_np->parent;
107ef3acdd8SAlan Tull
108ef3acdd8SAlan Tull /* If overlay has a list of bridges, use it. */
1090f5eb154SIan Abbott br = of_parse_phandle(info->overlay, "fpga-bridges", 0);
1100f5eb154SIan Abbott if (br) {
1110f5eb154SIan Abbott of_node_put(br);
112ef3acdd8SAlan Tull np = info->overlay;
1130f5eb154SIan Abbott } else {
114ef3acdd8SAlan Tull np = region_np;
1150f5eb154SIan Abbott }
116ef3acdd8SAlan Tull
117ef3acdd8SAlan Tull for (i = 0; ; i++) {
118ef3acdd8SAlan Tull br = of_parse_phandle(np, "fpga-bridges", i);
119ef3acdd8SAlan Tull if (!br)
120ef3acdd8SAlan Tull break;
121ef3acdd8SAlan Tull
122ef3acdd8SAlan Tull /* If parent bridge is in list, skip it. */
1230f5eb154SIan Abbott if (br == parent_br) {
1240f5eb154SIan Abbott of_node_put(br);
125ef3acdd8SAlan Tull continue;
1260f5eb154SIan Abbott }
127ef3acdd8SAlan Tull
128ef3acdd8SAlan Tull /* If node is a bridge, get it and add to list */
129ef3acdd8SAlan Tull ret = of_fpga_bridge_get_to_list(br, info,
130ef3acdd8SAlan Tull ®ion->bridge_list);
1310f5eb154SIan Abbott of_node_put(br);
132ef3acdd8SAlan Tull
133ef3acdd8SAlan Tull /* If any of the bridges are in use, give up */
134ef3acdd8SAlan Tull if (ret == -EBUSY) {
135ef3acdd8SAlan Tull fpga_bridges_put(®ion->bridge_list);
136ef3acdd8SAlan Tull return -EBUSY;
137ef3acdd8SAlan Tull }
138ef3acdd8SAlan Tull }
139ef3acdd8SAlan Tull
140ef3acdd8SAlan Tull return 0;
141ef3acdd8SAlan Tull }
142ef3acdd8SAlan Tull
143ef3acdd8SAlan Tull /**
144838a8438SNava kishore Manne * child_regions_with_firmware - Used to check the child region info.
145ef3acdd8SAlan Tull * @overlay: device node of the overlay
146ef3acdd8SAlan Tull *
147ef3acdd8SAlan Tull * If the overlay adds child FPGA regions, they are not allowed to have
148ef3acdd8SAlan Tull * firmware-name property.
149ef3acdd8SAlan Tull *
150838a8438SNava kishore Manne * Return: 0 for OK or -EINVAL if child FPGA region adds firmware-name.
151ef3acdd8SAlan Tull */
child_regions_with_firmware(struct device_node * overlay)152ef3acdd8SAlan Tull static int child_regions_with_firmware(struct device_node *overlay)
153ef3acdd8SAlan Tull {
154ef3acdd8SAlan Tull struct device_node *child_region;
155ef3acdd8SAlan Tull const char *child_firmware_name;
156ef3acdd8SAlan Tull int ret = 0;
157ef3acdd8SAlan Tull
158ef3acdd8SAlan Tull of_node_get(overlay);
159ef3acdd8SAlan Tull
160ef3acdd8SAlan Tull child_region = of_find_matching_node(overlay, fpga_region_of_match);
161ef3acdd8SAlan Tull while (child_region) {
162ef3acdd8SAlan Tull if (!of_property_read_string(child_region, "firmware-name",
163ef3acdd8SAlan Tull &child_firmware_name)) {
164ef3acdd8SAlan Tull ret = -EINVAL;
165ef3acdd8SAlan Tull break;
166ef3acdd8SAlan Tull }
167ef3acdd8SAlan Tull child_region = of_find_matching_node(child_region,
168ef3acdd8SAlan Tull fpga_region_of_match);
169ef3acdd8SAlan Tull }
170ef3acdd8SAlan Tull
171ef3acdd8SAlan Tull of_node_put(child_region);
172ef3acdd8SAlan Tull
173ef3acdd8SAlan Tull if (ret)
174ef3acdd8SAlan Tull pr_err("firmware-name not allowed in child FPGA region: %pOF",
175ef3acdd8SAlan Tull child_region);
176ef3acdd8SAlan Tull
177ef3acdd8SAlan Tull return ret;
178ef3acdd8SAlan Tull }
179ef3acdd8SAlan Tull
180ef3acdd8SAlan Tull /**
181ef3acdd8SAlan Tull * of_fpga_region_parse_ov - parse and check overlay applied to region
182ef3acdd8SAlan Tull *
183ef3acdd8SAlan Tull * @region: FPGA region
184ef3acdd8SAlan Tull * @overlay: overlay applied to the FPGA region
185ef3acdd8SAlan Tull *
18625feb31dSTom Rix * Given an overlay applied to an FPGA region, parse the FPGA image specific
187ef3acdd8SAlan Tull * info in the overlay and do some checking.
188ef3acdd8SAlan Tull *
189838a8438SNava kishore Manne * Return:
190ef3acdd8SAlan Tull * NULL if overlay doesn't direct us to program the FPGA.
191ef3acdd8SAlan Tull * fpga_image_info struct if there is an image to program.
192ef3acdd8SAlan Tull * error code for invalid overlay.
193ef3acdd8SAlan Tull */
19457ce2e40SNava kishore Manne static struct fpga_image_info *
of_fpga_region_parse_ov(struct fpga_region * region,struct device_node * overlay)19557ce2e40SNava kishore Manne of_fpga_region_parse_ov(struct fpga_region *region,
196ef3acdd8SAlan Tull struct device_node *overlay)
197ef3acdd8SAlan Tull {
198ef3acdd8SAlan Tull struct device *dev = ®ion->dev;
199ef3acdd8SAlan Tull struct fpga_image_info *info;
200ef3acdd8SAlan Tull const char *firmware_name;
201ef3acdd8SAlan Tull int ret;
202ef3acdd8SAlan Tull
203ef3acdd8SAlan Tull if (region->info) {
204ef3acdd8SAlan Tull dev_err(dev, "Region already has overlay applied.\n");
205ef3acdd8SAlan Tull return ERR_PTR(-EINVAL);
206ef3acdd8SAlan Tull }
207ef3acdd8SAlan Tull
208ef3acdd8SAlan Tull /*
209ef3acdd8SAlan Tull * Reject overlay if child FPGA Regions added in the overlay have
210ef3acdd8SAlan Tull * firmware-name property (would mean that an FPGA region that has
211ef3acdd8SAlan Tull * not been added to the live tree yet is doing FPGA programming).
212ef3acdd8SAlan Tull */
213ef3acdd8SAlan Tull ret = child_regions_with_firmware(overlay);
214ef3acdd8SAlan Tull if (ret)
215ef3acdd8SAlan Tull return ERR_PTR(ret);
216ef3acdd8SAlan Tull
217ef3acdd8SAlan Tull info = fpga_image_info_alloc(dev);
218ef3acdd8SAlan Tull if (!info)
219ef3acdd8SAlan Tull return ERR_PTR(-ENOMEM);
220ef3acdd8SAlan Tull
221ef3acdd8SAlan Tull info->overlay = overlay;
222ef3acdd8SAlan Tull
223ef3acdd8SAlan Tull /* Read FPGA region properties from the overlay */
224ef3acdd8SAlan Tull if (of_property_read_bool(overlay, "partial-fpga-config"))
225ef3acdd8SAlan Tull info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
226ef3acdd8SAlan Tull
227ef3acdd8SAlan Tull if (of_property_read_bool(overlay, "external-fpga-config"))
228ef3acdd8SAlan Tull info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
229ef3acdd8SAlan Tull
230ef3acdd8SAlan Tull if (of_property_read_bool(overlay, "encrypted-fpga-config"))
231ef3acdd8SAlan Tull info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
232ef3acdd8SAlan Tull
233ef3acdd8SAlan Tull if (!of_property_read_string(overlay, "firmware-name",
234ef3acdd8SAlan Tull &firmware_name)) {
235ef3acdd8SAlan Tull info->firmware_name = devm_kstrdup(dev, firmware_name,
236ef3acdd8SAlan Tull GFP_KERNEL);
237ef3acdd8SAlan Tull if (!info->firmware_name)
238ef3acdd8SAlan Tull return ERR_PTR(-ENOMEM);
239ef3acdd8SAlan Tull }
240ef3acdd8SAlan Tull
241ef3acdd8SAlan Tull of_property_read_u32(overlay, "region-unfreeze-timeout-us",
242ef3acdd8SAlan Tull &info->enable_timeout_us);
243ef3acdd8SAlan Tull
244ef3acdd8SAlan Tull of_property_read_u32(overlay, "region-freeze-timeout-us",
245ef3acdd8SAlan Tull &info->disable_timeout_us);
246ef3acdd8SAlan Tull
247ef3acdd8SAlan Tull of_property_read_u32(overlay, "config-complete-timeout-us",
248ef3acdd8SAlan Tull &info->config_complete_timeout_us);
249ef3acdd8SAlan Tull
250ef3acdd8SAlan Tull /* If overlay is not programming the FPGA, don't need FPGA image info */
251ef3acdd8SAlan Tull if (!info->firmware_name) {
252ef3acdd8SAlan Tull ret = 0;
253ef3acdd8SAlan Tull goto ret_no_info;
254ef3acdd8SAlan Tull }
255ef3acdd8SAlan Tull
256ef3acdd8SAlan Tull /*
257ef3acdd8SAlan Tull * If overlay informs us FPGA was externally programmed, specifying
258ef3acdd8SAlan Tull * firmware here would be ambiguous.
259ef3acdd8SAlan Tull */
260ef3acdd8SAlan Tull if (info->flags & FPGA_MGR_EXTERNAL_CONFIG) {
261ef3acdd8SAlan Tull dev_err(dev, "error: specified firmware and external-fpga-config");
262ef3acdd8SAlan Tull ret = -EINVAL;
263ef3acdd8SAlan Tull goto ret_no_info;
264ef3acdd8SAlan Tull }
265ef3acdd8SAlan Tull
266ef3acdd8SAlan Tull return info;
267ef3acdd8SAlan Tull ret_no_info:
268ef3acdd8SAlan Tull fpga_image_info_free(info);
269ef3acdd8SAlan Tull return ERR_PTR(ret);
270ef3acdd8SAlan Tull }
271ef3acdd8SAlan Tull
272ef3acdd8SAlan Tull /**
273ef3acdd8SAlan Tull * of_fpga_region_notify_pre_apply - pre-apply overlay notification
274ef3acdd8SAlan Tull *
275ef3acdd8SAlan Tull * @region: FPGA region that the overlay was applied to
276ef3acdd8SAlan Tull * @nd: overlay notification data
277ef3acdd8SAlan Tull *
27825feb31dSTom Rix * Called when an overlay targeted to an FPGA Region is about to be applied.
279ef3acdd8SAlan Tull * Parses the overlay for properties that influence how the FPGA will be
280ef3acdd8SAlan Tull * programmed and does some checking. If the checks pass, programs the FPGA.
281ef3acdd8SAlan Tull * If the checks fail, overlay is rejected and does not get added to the
282ef3acdd8SAlan Tull * live tree.
283ef3acdd8SAlan Tull *
284838a8438SNava kishore Manne * Return: 0 for success or negative error code for failure.
285ef3acdd8SAlan Tull */
of_fpga_region_notify_pre_apply(struct fpga_region * region,struct of_overlay_notify_data * nd)286ef3acdd8SAlan Tull static int of_fpga_region_notify_pre_apply(struct fpga_region *region,
287ef3acdd8SAlan Tull struct of_overlay_notify_data *nd)
288ef3acdd8SAlan Tull {
289ef3acdd8SAlan Tull struct device *dev = ®ion->dev;
290ef3acdd8SAlan Tull struct fpga_image_info *info;
291ef3acdd8SAlan Tull int ret;
292ef3acdd8SAlan Tull
293ef3acdd8SAlan Tull info = of_fpga_region_parse_ov(region, nd->overlay);
294ef3acdd8SAlan Tull if (IS_ERR(info))
295ef3acdd8SAlan Tull return PTR_ERR(info);
296ef3acdd8SAlan Tull
2978a541679SAlan Tull /* If overlay doesn't program the FPGA, accept it anyway. */
298ef3acdd8SAlan Tull if (!info)
299ef3acdd8SAlan Tull return 0;
300ef3acdd8SAlan Tull
3018a541679SAlan Tull if (region->info) {
3028a541679SAlan Tull dev_err(dev, "Region already has overlay applied.\n");
3038a541679SAlan Tull return -EINVAL;
3048a541679SAlan Tull }
3058a541679SAlan Tull
306ef3acdd8SAlan Tull region->info = info;
307ef3acdd8SAlan Tull ret = fpga_region_program_fpga(region);
308ef3acdd8SAlan Tull if (ret) {
309ef3acdd8SAlan Tull /* error; reject overlay */
310ef3acdd8SAlan Tull fpga_image_info_free(info);
311ef3acdd8SAlan Tull region->info = NULL;
312ef3acdd8SAlan Tull }
313ef3acdd8SAlan Tull
314ef3acdd8SAlan Tull return ret;
315ef3acdd8SAlan Tull }
316ef3acdd8SAlan Tull
317ef3acdd8SAlan Tull /**
318ef3acdd8SAlan Tull * of_fpga_region_notify_post_remove - post-remove overlay notification
319ef3acdd8SAlan Tull *
320ef3acdd8SAlan Tull * @region: FPGA region that was targeted by the overlay that was removed
321ef3acdd8SAlan Tull * @nd: overlay notification data
322ef3acdd8SAlan Tull *
323ef3acdd8SAlan Tull * Called after an overlay has been removed if the overlay's target was a
324ef3acdd8SAlan Tull * FPGA region.
325ef3acdd8SAlan Tull */
of_fpga_region_notify_post_remove(struct fpga_region * region,struct of_overlay_notify_data * nd)326ef3acdd8SAlan Tull static void of_fpga_region_notify_post_remove(struct fpga_region *region,
327ef3acdd8SAlan Tull struct of_overlay_notify_data *nd)
328ef3acdd8SAlan Tull {
329ef3acdd8SAlan Tull fpga_bridges_disable(®ion->bridge_list);
330ef3acdd8SAlan Tull fpga_bridges_put(®ion->bridge_list);
331ef3acdd8SAlan Tull fpga_image_info_free(region->info);
332ef3acdd8SAlan Tull region->info = NULL;
333ef3acdd8SAlan Tull }
334ef3acdd8SAlan Tull
335ef3acdd8SAlan Tull /**
336ef3acdd8SAlan Tull * of_fpga_region_notify - reconfig notifier for dynamic DT changes
337ef3acdd8SAlan Tull * @nb: notifier block
338ef3acdd8SAlan Tull * @action: notifier action
339ef3acdd8SAlan Tull * @arg: reconfig data
340ef3acdd8SAlan Tull *
34125feb31dSTom Rix * This notifier handles programming an FPGA when a "firmware-name" property is
34225feb31dSTom Rix * added to an fpga-region.
343ef3acdd8SAlan Tull *
344838a8438SNava kishore Manne * Return: NOTIFY_OK or error if FPGA programming fails.
345ef3acdd8SAlan Tull */
of_fpga_region_notify(struct notifier_block * nb,unsigned long action,void * arg)346ef3acdd8SAlan Tull static int of_fpga_region_notify(struct notifier_block *nb,
347ef3acdd8SAlan Tull unsigned long action, void *arg)
348ef3acdd8SAlan Tull {
349ef3acdd8SAlan Tull struct of_overlay_notify_data *nd = arg;
350ef3acdd8SAlan Tull struct fpga_region *region;
351ef3acdd8SAlan Tull int ret;
352ef3acdd8SAlan Tull
353ef3acdd8SAlan Tull switch (action) {
354ef3acdd8SAlan Tull case OF_OVERLAY_PRE_APPLY:
355ef3acdd8SAlan Tull pr_debug("%s OF_OVERLAY_PRE_APPLY\n", __func__);
356ef3acdd8SAlan Tull break;
357ef3acdd8SAlan Tull case OF_OVERLAY_POST_APPLY:
358ef3acdd8SAlan Tull pr_debug("%s OF_OVERLAY_POST_APPLY\n", __func__);
359ef3acdd8SAlan Tull return NOTIFY_OK; /* not for us */
360ef3acdd8SAlan Tull case OF_OVERLAY_PRE_REMOVE:
361ef3acdd8SAlan Tull pr_debug("%s OF_OVERLAY_PRE_REMOVE\n", __func__);
362ef3acdd8SAlan Tull return NOTIFY_OK; /* not for us */
363ef3acdd8SAlan Tull case OF_OVERLAY_POST_REMOVE:
364ef3acdd8SAlan Tull pr_debug("%s OF_OVERLAY_POST_REMOVE\n", __func__);
365ef3acdd8SAlan Tull break;
366ef3acdd8SAlan Tull default: /* should not happen */
367ef3acdd8SAlan Tull return NOTIFY_OK;
368ef3acdd8SAlan Tull }
369ef3acdd8SAlan Tull
370ef3acdd8SAlan Tull region = of_fpga_region_find(nd->target);
371ef3acdd8SAlan Tull if (!region)
372ef3acdd8SAlan Tull return NOTIFY_OK;
373ef3acdd8SAlan Tull
374ef3acdd8SAlan Tull ret = 0;
375ef3acdd8SAlan Tull switch (action) {
376ef3acdd8SAlan Tull case OF_OVERLAY_PRE_APPLY:
377ef3acdd8SAlan Tull ret = of_fpga_region_notify_pre_apply(region, nd);
378ef3acdd8SAlan Tull break;
379ef3acdd8SAlan Tull
380ef3acdd8SAlan Tull case OF_OVERLAY_POST_REMOVE:
381ef3acdd8SAlan Tull of_fpga_region_notify_post_remove(region, nd);
382ef3acdd8SAlan Tull break;
383ef3acdd8SAlan Tull }
384ef3acdd8SAlan Tull
385ef3acdd8SAlan Tull put_device(®ion->dev);
386ef3acdd8SAlan Tull
387ef3acdd8SAlan Tull if (ret)
388ef3acdd8SAlan Tull return notifier_from_errno(ret);
389ef3acdd8SAlan Tull
390ef3acdd8SAlan Tull return NOTIFY_OK;
391ef3acdd8SAlan Tull }
392ef3acdd8SAlan Tull
393ef3acdd8SAlan Tull static struct notifier_block fpga_region_of_nb = {
394ef3acdd8SAlan Tull .notifier_call = of_fpga_region_notify,
395ef3acdd8SAlan Tull };
396ef3acdd8SAlan Tull
of_fpga_region_probe(struct platform_device * pdev)397ef3acdd8SAlan Tull static int of_fpga_region_probe(struct platform_device *pdev)
398ef3acdd8SAlan Tull {
399ef3acdd8SAlan Tull struct device *dev = &pdev->dev;
400ef3acdd8SAlan Tull struct device_node *np = dev->of_node;
401ef3acdd8SAlan Tull struct fpga_region *region;
402ef3acdd8SAlan Tull struct fpga_manager *mgr;
403ef3acdd8SAlan Tull int ret;
404ef3acdd8SAlan Tull
405ef3acdd8SAlan Tull /* Find the FPGA mgr specified by region or parent region. */
406ef3acdd8SAlan Tull mgr = of_fpga_region_get_mgr(np);
407ef3acdd8SAlan Tull if (IS_ERR(mgr))
408ef3acdd8SAlan Tull return -EPROBE_DEFER;
409ef3acdd8SAlan Tull
4108886a579SRuss Weight region = fpga_region_register(dev, mgr, of_fpga_region_get_bridges);
4118886a579SRuss Weight if (IS_ERR(region)) {
4128886a579SRuss Weight ret = PTR_ERR(region);
413ef3acdd8SAlan Tull goto eprobe_mgr_put;
414ef3acdd8SAlan Tull }
415ef3acdd8SAlan Tull
416ef3acdd8SAlan Tull of_platform_populate(np, fpga_region_of_match, NULL, ®ion->dev);
417488d040eSMoritz Fischer platform_set_drvdata(pdev, region);
418ef3acdd8SAlan Tull
419ef3acdd8SAlan Tull dev_info(dev, "FPGA Region probed\n");
420ef3acdd8SAlan Tull
421ef3acdd8SAlan Tull return 0;
422ef3acdd8SAlan Tull
423ef3acdd8SAlan Tull eprobe_mgr_put:
424ef3acdd8SAlan Tull fpga_mgr_put(mgr);
425ef3acdd8SAlan Tull return ret;
426ef3acdd8SAlan Tull }
427ef3acdd8SAlan Tull
of_fpga_region_remove(struct platform_device * pdev)428ef3acdd8SAlan Tull static int of_fpga_region_remove(struct platform_device *pdev)
429ef3acdd8SAlan Tull {
430ef3acdd8SAlan Tull struct fpga_region *region = platform_get_drvdata(pdev);
43134bd2833SAlan Tull struct fpga_manager *mgr = region->mgr;
432ef3acdd8SAlan Tull
433ef3acdd8SAlan Tull fpga_region_unregister(region);
43434bd2833SAlan Tull fpga_mgr_put(mgr);
435ef3acdd8SAlan Tull
436ef3acdd8SAlan Tull return 0;
437ef3acdd8SAlan Tull }
438ef3acdd8SAlan Tull
439ef3acdd8SAlan Tull static struct platform_driver of_fpga_region_driver = {
440ef3acdd8SAlan Tull .probe = of_fpga_region_probe,
441ef3acdd8SAlan Tull .remove = of_fpga_region_remove,
442ef3acdd8SAlan Tull .driver = {
443ef3acdd8SAlan Tull .name = "of-fpga-region",
444ef3acdd8SAlan Tull .of_match_table = of_match_ptr(fpga_region_of_match),
445ef3acdd8SAlan Tull },
446ef3acdd8SAlan Tull };
447ef3acdd8SAlan Tull
448ef3acdd8SAlan Tull /**
44998ceca2fSYang Li * of_fpga_region_init - init function for fpga_region class
450ef3acdd8SAlan Tull * Creates the fpga_region class and registers a reconfig notifier.
451838a8438SNava kishore Manne *
452838a8438SNava kishore Manne * Return: 0 on success, negative error code otherwise.
453ef3acdd8SAlan Tull */
of_fpga_region_init(void)454ef3acdd8SAlan Tull static int __init of_fpga_region_init(void)
455ef3acdd8SAlan Tull {
456ef3acdd8SAlan Tull int ret;
457ef3acdd8SAlan Tull
458ef3acdd8SAlan Tull ret = of_overlay_notifier_register(&fpga_region_of_nb);
459ef3acdd8SAlan Tull if (ret)
460ef3acdd8SAlan Tull return ret;
461ef3acdd8SAlan Tull
462ef3acdd8SAlan Tull ret = platform_driver_register(&of_fpga_region_driver);
463ef3acdd8SAlan Tull if (ret)
464ef3acdd8SAlan Tull goto err_plat;
465ef3acdd8SAlan Tull
466ef3acdd8SAlan Tull return 0;
467ef3acdd8SAlan Tull
468ef3acdd8SAlan Tull err_plat:
469ef3acdd8SAlan Tull of_overlay_notifier_unregister(&fpga_region_of_nb);
470ef3acdd8SAlan Tull return ret;
471ef3acdd8SAlan Tull }
472ef3acdd8SAlan Tull
of_fpga_region_exit(void)473ef3acdd8SAlan Tull static void __exit of_fpga_region_exit(void)
474ef3acdd8SAlan Tull {
475ef3acdd8SAlan Tull platform_driver_unregister(&of_fpga_region_driver);
476ef3acdd8SAlan Tull of_overlay_notifier_unregister(&fpga_region_of_nb);
477ef3acdd8SAlan Tull }
478ef3acdd8SAlan Tull
479ef3acdd8SAlan Tull subsys_initcall(of_fpga_region_init);
480ef3acdd8SAlan Tull module_exit(of_fpga_region_exit);
481ef3acdd8SAlan Tull
482ef3acdd8SAlan Tull MODULE_DESCRIPTION("FPGA Region");
483ef3acdd8SAlan Tull MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
484ef3acdd8SAlan Tull MODULE_LICENSE("GPL v2");
485