xref: /openbmc/linux/drivers/fpga/fpga-mgr.c (revision 34fa67e7)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * FPGA Manager Core
4  *
5  *  Copyright (C) 2013-2015 Altera Corporation
6  *  Copyright (C) 2017 Intel Corporation
7  *
8  * With code from the mailing list:
9  * Copyright (C) 2013 Xilinx, Inc.
10  */
11 #include <linux/firmware.h>
12 #include <linux/fpga/fpga-mgr.h>
13 #include <linux/idr.h>
14 #include <linux/module.h>
15 #include <linux/of.h>
16 #include <linux/mutex.h>
17 #include <linux/slab.h>
18 #include <linux/scatterlist.h>
19 #include <linux/highmem.h>
20 
21 static DEFINE_IDA(fpga_mgr_ida);
22 static struct class *fpga_mgr_class;
23 
24 struct fpga_mgr_devres {
25 	struct fpga_manager *mgr;
26 };
27 
28 static inline void fpga_mgr_fpga_remove(struct fpga_manager *mgr)
29 {
30 	if (mgr->mops->fpga_remove)
31 		mgr->mops->fpga_remove(mgr);
32 }
33 
34 static inline enum fpga_mgr_states fpga_mgr_state(struct fpga_manager *mgr)
35 {
36 	if (mgr->mops->state)
37 		return  mgr->mops->state(mgr);
38 	return FPGA_MGR_STATE_UNKNOWN;
39 }
40 
41 static inline u64 fpga_mgr_status(struct fpga_manager *mgr)
42 {
43 	if (mgr->mops->status)
44 		return mgr->mops->status(mgr);
45 	return 0;
46 }
47 
48 static inline int fpga_mgr_write(struct fpga_manager *mgr, const char *buf, size_t count)
49 {
50 	if (mgr->mops->write)
51 		return  mgr->mops->write(mgr, buf, count);
52 	return -EOPNOTSUPP;
53 }
54 
55 /*
56  * After all the FPGA image has been written, do the device specific steps to
57  * finish and set the FPGA into operating mode.
58  */
59 static inline int fpga_mgr_write_complete(struct fpga_manager *mgr,
60 					  struct fpga_image_info *info)
61 {
62 	int ret = 0;
63 
64 	mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
65 	if (mgr->mops->write_complete)
66 		ret = mgr->mops->write_complete(mgr, info);
67 	if (ret) {
68 		dev_err(&mgr->dev, "Error after writing image data to FPGA\n");
69 		mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
70 		return ret;
71 	}
72 	mgr->state = FPGA_MGR_STATE_OPERATING;
73 
74 	return 0;
75 }
76 
77 static inline int fpga_mgr_write_init(struct fpga_manager *mgr,
78 				      struct fpga_image_info *info,
79 				      const char *buf, size_t count)
80 {
81 	if (mgr->mops->write_init)
82 		return  mgr->mops->write_init(mgr, info, buf, count);
83 	return 0;
84 }
85 
86 static inline int fpga_mgr_write_sg(struct fpga_manager *mgr,
87 				    struct sg_table *sgt)
88 {
89 	if (mgr->mops->write_sg)
90 		return  mgr->mops->write_sg(mgr, sgt);
91 	return -EOPNOTSUPP;
92 }
93 
94 /**
95  * fpga_image_info_alloc - Allocate an FPGA image info struct
96  * @dev: owning device
97  *
98  * Return: struct fpga_image_info or NULL
99  */
100 struct fpga_image_info *fpga_image_info_alloc(struct device *dev)
101 {
102 	struct fpga_image_info *info;
103 
104 	get_device(dev);
105 
106 	info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
107 	if (!info) {
108 		put_device(dev);
109 		return NULL;
110 	}
111 
112 	info->dev = dev;
113 
114 	return info;
115 }
116 EXPORT_SYMBOL_GPL(fpga_image_info_alloc);
117 
118 /**
119  * fpga_image_info_free - Free an FPGA image info struct
120  * @info: FPGA image info struct to free
121  */
122 void fpga_image_info_free(struct fpga_image_info *info)
123 {
124 	struct device *dev;
125 
126 	if (!info)
127 		return;
128 
129 	dev = info->dev;
130 	if (info->firmware_name)
131 		devm_kfree(dev, info->firmware_name);
132 
133 	devm_kfree(dev, info);
134 	put_device(dev);
135 }
136 EXPORT_SYMBOL_GPL(fpga_image_info_free);
137 
138 /*
139  * Call the low level driver's write_init function.  This will do the
140  * device-specific things to get the FPGA into the state where it is ready to
141  * receive an FPGA image. The low level driver only gets to see the first
142  * initial_header_size bytes in the buffer.
143  */
144 static int fpga_mgr_write_init_buf(struct fpga_manager *mgr,
145 				   struct fpga_image_info *info,
146 				   const char *buf, size_t count)
147 {
148 	int ret;
149 
150 	mgr->state = FPGA_MGR_STATE_WRITE_INIT;
151 	if (!mgr->mops->initial_header_size)
152 		ret = fpga_mgr_write_init(mgr, info, NULL, 0);
153 	else
154 		ret = fpga_mgr_write_init(
155 		    mgr, info, buf, min(mgr->mops->initial_header_size, count));
156 
157 	if (ret) {
158 		dev_err(&mgr->dev, "Error preparing FPGA for writing\n");
159 		mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
160 		return ret;
161 	}
162 
163 	return 0;
164 }
165 
166 static int fpga_mgr_write_init_sg(struct fpga_manager *mgr,
167 				  struct fpga_image_info *info,
168 				  struct sg_table *sgt)
169 {
170 	struct sg_mapping_iter miter;
171 	size_t len;
172 	char *buf;
173 	int ret;
174 
175 	if (!mgr->mops->initial_header_size)
176 		return fpga_mgr_write_init_buf(mgr, info, NULL, 0);
177 
178 	/*
179 	 * First try to use miter to map the first fragment to access the
180 	 * header, this is the typical path.
181 	 */
182 	sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
183 	if (sg_miter_next(&miter) &&
184 	    miter.length >= mgr->mops->initial_header_size) {
185 		ret = fpga_mgr_write_init_buf(mgr, info, miter.addr,
186 					      miter.length);
187 		sg_miter_stop(&miter);
188 		return ret;
189 	}
190 	sg_miter_stop(&miter);
191 
192 	/* Otherwise copy the fragments into temporary memory. */
193 	buf = kmalloc(mgr->mops->initial_header_size, GFP_KERNEL);
194 	if (!buf)
195 		return -ENOMEM;
196 
197 	len = sg_copy_to_buffer(sgt->sgl, sgt->nents, buf,
198 				mgr->mops->initial_header_size);
199 	ret = fpga_mgr_write_init_buf(mgr, info, buf, len);
200 
201 	kfree(buf);
202 
203 	return ret;
204 }
205 
206 /**
207  * fpga_mgr_buf_load_sg - load fpga from image in buffer from a scatter list
208  * @mgr:	fpga manager
209  * @info:	fpga image specific information
210  * @sgt:	scatterlist table
211  *
212  * Step the low level fpga manager through the device-specific steps of getting
213  * an FPGA ready to be configured, writing the image to it, then doing whatever
214  * post-configuration steps necessary.  This code assumes the caller got the
215  * mgr pointer from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is
216  * not an error code.
217  *
218  * This is the preferred entry point for FPGA programming, it does not require
219  * any contiguous kernel memory.
220  *
221  * Return: 0 on success, negative error code otherwise.
222  */
223 static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr,
224 				struct fpga_image_info *info,
225 				struct sg_table *sgt)
226 {
227 	int ret;
228 
229 	ret = fpga_mgr_write_init_sg(mgr, info, sgt);
230 	if (ret)
231 		return ret;
232 
233 	/* Write the FPGA image to the FPGA. */
234 	mgr->state = FPGA_MGR_STATE_WRITE;
235 	if (mgr->mops->write_sg) {
236 		ret = fpga_mgr_write_sg(mgr, sgt);
237 	} else {
238 		struct sg_mapping_iter miter;
239 
240 		sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
241 		while (sg_miter_next(&miter)) {
242 			ret = fpga_mgr_write(mgr, miter.addr, miter.length);
243 			if (ret)
244 				break;
245 		}
246 		sg_miter_stop(&miter);
247 	}
248 
249 	if (ret) {
250 		dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
251 		mgr->state = FPGA_MGR_STATE_WRITE_ERR;
252 		return ret;
253 	}
254 
255 	return fpga_mgr_write_complete(mgr, info);
256 }
257 
258 static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr,
259 				    struct fpga_image_info *info,
260 				    const char *buf, size_t count)
261 {
262 	int ret;
263 
264 	ret = fpga_mgr_write_init_buf(mgr, info, buf, count);
265 	if (ret)
266 		return ret;
267 
268 	/*
269 	 * Write the FPGA image to the FPGA.
270 	 */
271 	mgr->state = FPGA_MGR_STATE_WRITE;
272 	ret = fpga_mgr_write(mgr, buf, count);
273 	if (ret) {
274 		dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
275 		mgr->state = FPGA_MGR_STATE_WRITE_ERR;
276 		return ret;
277 	}
278 
279 	return fpga_mgr_write_complete(mgr, info);
280 }
281 
282 /**
283  * fpga_mgr_buf_load - load fpga from image in buffer
284  * @mgr:	fpga manager
285  * @info:	fpga image info
286  * @buf:	buffer contain fpga image
287  * @count:	byte count of buf
288  *
289  * Step the low level fpga manager through the device-specific steps of getting
290  * an FPGA ready to be configured, writing the image to it, then doing whatever
291  * post-configuration steps necessary.  This code assumes the caller got the
292  * mgr pointer from of_fpga_mgr_get() and checked that it is not an error code.
293  *
294  * Return: 0 on success, negative error code otherwise.
295  */
296 static int fpga_mgr_buf_load(struct fpga_manager *mgr,
297 			     struct fpga_image_info *info,
298 			     const char *buf, size_t count)
299 {
300 	struct page **pages;
301 	struct sg_table sgt;
302 	const void *p;
303 	int nr_pages;
304 	int index;
305 	int rc;
306 
307 	/*
308 	 * This is just a fast path if the caller has already created a
309 	 * contiguous kernel buffer and the driver doesn't require SG, non-SG
310 	 * drivers will still work on the slow path.
311 	 */
312 	if (mgr->mops->write)
313 		return fpga_mgr_buf_load_mapped(mgr, info, buf, count);
314 
315 	/*
316 	 * Convert the linear kernel pointer into a sg_table of pages for use
317 	 * by the driver.
318 	 */
319 	nr_pages = DIV_ROUND_UP((unsigned long)buf + count, PAGE_SIZE) -
320 		   (unsigned long)buf / PAGE_SIZE;
321 	pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL);
322 	if (!pages)
323 		return -ENOMEM;
324 
325 	p = buf - offset_in_page(buf);
326 	for (index = 0; index < nr_pages; index++) {
327 		if (is_vmalloc_addr(p))
328 			pages[index] = vmalloc_to_page(p);
329 		else
330 			pages[index] = kmap_to_page((void *)p);
331 		if (!pages[index]) {
332 			kfree(pages);
333 			return -EFAULT;
334 		}
335 		p += PAGE_SIZE;
336 	}
337 
338 	/*
339 	 * The temporary pages list is used to code share the merging algorithm
340 	 * in sg_alloc_table_from_pages
341 	 */
342 	rc = sg_alloc_table_from_pages(&sgt, pages, index, offset_in_page(buf),
343 				       count, GFP_KERNEL);
344 	kfree(pages);
345 	if (rc)
346 		return rc;
347 
348 	rc = fpga_mgr_buf_load_sg(mgr, info, &sgt);
349 	sg_free_table(&sgt);
350 
351 	return rc;
352 }
353 
354 /**
355  * fpga_mgr_firmware_load - request firmware and load to fpga
356  * @mgr:	fpga manager
357  * @info:	fpga image specific information
358  * @image_name:	name of image file on the firmware search path
359  *
360  * Request an FPGA image using the firmware class, then write out to the FPGA.
361  * Update the state before each step to provide info on what step failed if
362  * there is a failure.  This code assumes the caller got the mgr pointer
363  * from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is not an error
364  * code.
365  *
366  * Return: 0 on success, negative error code otherwise.
367  */
368 static int fpga_mgr_firmware_load(struct fpga_manager *mgr,
369 				  struct fpga_image_info *info,
370 				  const char *image_name)
371 {
372 	struct device *dev = &mgr->dev;
373 	const struct firmware *fw;
374 	int ret;
375 
376 	dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
377 
378 	mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
379 
380 	ret = request_firmware(&fw, image_name, dev);
381 	if (ret) {
382 		mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
383 		dev_err(dev, "Error requesting firmware %s\n", image_name);
384 		return ret;
385 	}
386 
387 	ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size);
388 
389 	release_firmware(fw);
390 
391 	return ret;
392 }
393 
394 /**
395  * fpga_mgr_load - load FPGA from scatter/gather table, buffer, or firmware
396  * @mgr:	fpga manager
397  * @info:	fpga image information.
398  *
399  * Load the FPGA from an image which is indicated in @info.  If successful, the
400  * FPGA ends up in operating mode.
401  *
402  * Return: 0 on success, negative error code otherwise.
403  */
404 int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info)
405 {
406 	if (info->sgt)
407 		return fpga_mgr_buf_load_sg(mgr, info, info->sgt);
408 	if (info->buf && info->count)
409 		return fpga_mgr_buf_load(mgr, info, info->buf, info->count);
410 	if (info->firmware_name)
411 		return fpga_mgr_firmware_load(mgr, info, info->firmware_name);
412 	return -EINVAL;
413 }
414 EXPORT_SYMBOL_GPL(fpga_mgr_load);
415 
416 static const char * const state_str[] = {
417 	[FPGA_MGR_STATE_UNKNOWN] =		"unknown",
418 	[FPGA_MGR_STATE_POWER_OFF] =		"power off",
419 	[FPGA_MGR_STATE_POWER_UP] =		"power up",
420 	[FPGA_MGR_STATE_RESET] =		"reset",
421 
422 	/* requesting FPGA image from firmware */
423 	[FPGA_MGR_STATE_FIRMWARE_REQ] =		"firmware request",
424 	[FPGA_MGR_STATE_FIRMWARE_REQ_ERR] =	"firmware request error",
425 
426 	/* Preparing FPGA to receive image */
427 	[FPGA_MGR_STATE_WRITE_INIT] =		"write init",
428 	[FPGA_MGR_STATE_WRITE_INIT_ERR] =	"write init error",
429 
430 	/* Writing image to FPGA */
431 	[FPGA_MGR_STATE_WRITE] =		"write",
432 	[FPGA_MGR_STATE_WRITE_ERR] =		"write error",
433 
434 	/* Finishing configuration after image has been written */
435 	[FPGA_MGR_STATE_WRITE_COMPLETE] =	"write complete",
436 	[FPGA_MGR_STATE_WRITE_COMPLETE_ERR] =	"write complete error",
437 
438 	/* FPGA reports to be in normal operating mode */
439 	[FPGA_MGR_STATE_OPERATING] =		"operating",
440 };
441 
442 static ssize_t name_show(struct device *dev,
443 			 struct device_attribute *attr, char *buf)
444 {
445 	struct fpga_manager *mgr = to_fpga_manager(dev);
446 
447 	return sprintf(buf, "%s\n", mgr->name);
448 }
449 
450 static ssize_t state_show(struct device *dev,
451 			  struct device_attribute *attr, char *buf)
452 {
453 	struct fpga_manager *mgr = to_fpga_manager(dev);
454 
455 	return sprintf(buf, "%s\n", state_str[mgr->state]);
456 }
457 
458 static ssize_t status_show(struct device *dev,
459 			   struct device_attribute *attr, char *buf)
460 {
461 	struct fpga_manager *mgr = to_fpga_manager(dev);
462 	u64 status;
463 	int len = 0;
464 
465 	status = fpga_mgr_status(mgr);
466 
467 	if (status & FPGA_MGR_STATUS_OPERATION_ERR)
468 		len += sprintf(buf + len, "reconfig operation error\n");
469 	if (status & FPGA_MGR_STATUS_CRC_ERR)
470 		len += sprintf(buf + len, "reconfig CRC error\n");
471 	if (status & FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR)
472 		len += sprintf(buf + len, "reconfig incompatible image\n");
473 	if (status & FPGA_MGR_STATUS_IP_PROTOCOL_ERR)
474 		len += sprintf(buf + len, "reconfig IP protocol error\n");
475 	if (status & FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR)
476 		len += sprintf(buf + len, "reconfig fifo overflow error\n");
477 
478 	return len;
479 }
480 
481 static DEVICE_ATTR_RO(name);
482 static DEVICE_ATTR_RO(state);
483 static DEVICE_ATTR_RO(status);
484 
485 static struct attribute *fpga_mgr_attrs[] = {
486 	&dev_attr_name.attr,
487 	&dev_attr_state.attr,
488 	&dev_attr_status.attr,
489 	NULL,
490 };
491 ATTRIBUTE_GROUPS(fpga_mgr);
492 
493 static struct fpga_manager *__fpga_mgr_get(struct device *dev)
494 {
495 	struct fpga_manager *mgr;
496 
497 	mgr = to_fpga_manager(dev);
498 
499 	if (!try_module_get(dev->parent->driver->owner))
500 		goto err_dev;
501 
502 	return mgr;
503 
504 err_dev:
505 	put_device(dev);
506 	return ERR_PTR(-ENODEV);
507 }
508 
509 static int fpga_mgr_dev_match(struct device *dev, const void *data)
510 {
511 	return dev->parent == data;
512 }
513 
514 /**
515  * fpga_mgr_get - Given a device, get a reference to an fpga mgr.
516  * @dev:	parent device that fpga mgr was registered with
517  *
518  * Return: fpga manager struct or IS_ERR() condition containing error code.
519  */
520 struct fpga_manager *fpga_mgr_get(struct device *dev)
521 {
522 	struct device *mgr_dev = class_find_device(fpga_mgr_class, NULL, dev,
523 						   fpga_mgr_dev_match);
524 	if (!mgr_dev)
525 		return ERR_PTR(-ENODEV);
526 
527 	return __fpga_mgr_get(mgr_dev);
528 }
529 EXPORT_SYMBOL_GPL(fpga_mgr_get);
530 
531 /**
532  * of_fpga_mgr_get - Given a device node, get a reference to an fpga mgr.
533  *
534  * @node:	device node
535  *
536  * Return: fpga manager struct or IS_ERR() condition containing error code.
537  */
538 struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
539 {
540 	struct device *dev;
541 
542 	dev = class_find_device_by_of_node(fpga_mgr_class, node);
543 	if (!dev)
544 		return ERR_PTR(-ENODEV);
545 
546 	return __fpga_mgr_get(dev);
547 }
548 EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
549 
550 /**
551  * fpga_mgr_put - release a reference to an fpga manager
552  * @mgr:	fpga manager structure
553  */
554 void fpga_mgr_put(struct fpga_manager *mgr)
555 {
556 	module_put(mgr->dev.parent->driver->owner);
557 	put_device(&mgr->dev);
558 }
559 EXPORT_SYMBOL_GPL(fpga_mgr_put);
560 
561 /**
562  * fpga_mgr_lock - Lock FPGA manager for exclusive use
563  * @mgr:	fpga manager
564  *
565  * Given a pointer to FPGA Manager (from fpga_mgr_get() or
566  * of_fpga_mgr_put()) attempt to get the mutex. The user should call
567  * fpga_mgr_lock() and verify that it returns 0 before attempting to
568  * program the FPGA.  Likewise, the user should call fpga_mgr_unlock
569  * when done programming the FPGA.
570  *
571  * Return: 0 for success or -EBUSY
572  */
573 int fpga_mgr_lock(struct fpga_manager *mgr)
574 {
575 	if (!mutex_trylock(&mgr->ref_mutex)) {
576 		dev_err(&mgr->dev, "FPGA manager is in use.\n");
577 		return -EBUSY;
578 	}
579 
580 	return 0;
581 }
582 EXPORT_SYMBOL_GPL(fpga_mgr_lock);
583 
584 /**
585  * fpga_mgr_unlock - Unlock FPGA manager after done programming
586  * @mgr:	fpga manager
587  */
588 void fpga_mgr_unlock(struct fpga_manager *mgr)
589 {
590 	mutex_unlock(&mgr->ref_mutex);
591 }
592 EXPORT_SYMBOL_GPL(fpga_mgr_unlock);
593 
594 /**
595  * fpga_mgr_register_full - create and register an FPGA Manager device
596  * @parent:	fpga manager device from pdev
597  * @info:	parameters for fpga manager
598  *
599  * The caller of this function is responsible for calling fpga_mgr_unregister().
600  * Using devm_fpga_mgr_register_full() instead is recommended.
601  *
602  * Return: pointer to struct fpga_manager pointer or ERR_PTR()
603  */
604 struct fpga_manager *
605 fpga_mgr_register_full(struct device *parent, const struct fpga_manager_info *info)
606 {
607 	const struct fpga_manager_ops *mops = info->mops;
608 	struct fpga_manager *mgr;
609 	int id, ret;
610 
611 	if (!mops) {
612 		dev_err(parent, "Attempt to register without fpga_manager_ops\n");
613 		return ERR_PTR(-EINVAL);
614 	}
615 
616 	if (!info->name || !strlen(info->name)) {
617 		dev_err(parent, "Attempt to register with no name!\n");
618 		return ERR_PTR(-EINVAL);
619 	}
620 
621 	mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
622 	if (!mgr)
623 		return ERR_PTR(-ENOMEM);
624 
625 	id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
626 	if (id < 0) {
627 		ret = id;
628 		goto error_kfree;
629 	}
630 
631 	mutex_init(&mgr->ref_mutex);
632 
633 	mgr->name = info->name;
634 	mgr->mops = info->mops;
635 	mgr->priv = info->priv;
636 	mgr->compat_id = info->compat_id;
637 
638 	mgr->dev.class = fpga_mgr_class;
639 	mgr->dev.groups = mops->groups;
640 	mgr->dev.parent = parent;
641 	mgr->dev.of_node = parent->of_node;
642 	mgr->dev.id = id;
643 
644 	ret = dev_set_name(&mgr->dev, "fpga%d", id);
645 	if (ret)
646 		goto error_device;
647 
648 	/*
649 	 * Initialize framework state by requesting low level driver read state
650 	 * from device.  FPGA may be in reset mode or may have been programmed
651 	 * by bootloader or EEPROM.
652 	 */
653 	mgr->state = fpga_mgr_state(mgr);
654 
655 	ret = device_register(&mgr->dev);
656 	if (ret) {
657 		put_device(&mgr->dev);
658 		return ERR_PTR(ret);
659 	}
660 
661 	return mgr;
662 
663 error_device:
664 	ida_simple_remove(&fpga_mgr_ida, id);
665 error_kfree:
666 	kfree(mgr);
667 
668 	return ERR_PTR(ret);
669 }
670 EXPORT_SYMBOL_GPL(fpga_mgr_register_full);
671 
672 /**
673  * fpga_mgr_register - create and register an FPGA Manager device
674  * @parent:	fpga manager device from pdev
675  * @name:	fpga manager name
676  * @mops:	pointer to structure of fpga manager ops
677  * @priv:	fpga manager private data
678  *
679  * The caller of this function is responsible for calling fpga_mgr_unregister().
680  * Using devm_fpga_mgr_register() instead is recommended. This simple
681  * version of the register function should be sufficient for most users. The
682  * fpga_mgr_register_full() function is available for users that need to pass
683  * additional, optional parameters.
684  *
685  * Return: pointer to struct fpga_manager pointer or ERR_PTR()
686  */
687 struct fpga_manager *
688 fpga_mgr_register(struct device *parent, const char *name,
689 		  const struct fpga_manager_ops *mops, void *priv)
690 {
691 	struct fpga_manager_info info = { 0 };
692 
693 	info.name = name;
694 	info.mops = mops;
695 	info.priv = priv;
696 
697 	return fpga_mgr_register_full(parent, &info);
698 }
699 EXPORT_SYMBOL_GPL(fpga_mgr_register);
700 
701 /**
702  * fpga_mgr_unregister - unregister an FPGA manager
703  * @mgr: fpga manager struct
704  *
705  * This function is intended for use in an FPGA manager driver's remove function.
706  */
707 void fpga_mgr_unregister(struct fpga_manager *mgr)
708 {
709 	dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
710 
711 	/*
712 	 * If the low level driver provides a method for putting fpga into
713 	 * a desired state upon unregister, do it.
714 	 */
715 	fpga_mgr_fpga_remove(mgr);
716 
717 	device_unregister(&mgr->dev);
718 }
719 EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
720 
721 static void devm_fpga_mgr_unregister(struct device *dev, void *res)
722 {
723 	struct fpga_mgr_devres *dr = res;
724 
725 	fpga_mgr_unregister(dr->mgr);
726 }
727 
728 /**
729  * devm_fpga_mgr_register_full - resource managed variant of fpga_mgr_register()
730  * @parent:	fpga manager device from pdev
731  * @info:	parameters for fpga manager
732  *
733  * This is the devres variant of fpga_mgr_register_full() for which the unregister
734  * function will be called automatically when the managing device is detached.
735  */
736 struct fpga_manager *
737 devm_fpga_mgr_register_full(struct device *parent, const struct fpga_manager_info *info)
738 {
739 	struct fpga_mgr_devres *dr;
740 	struct fpga_manager *mgr;
741 
742 	dr = devres_alloc(devm_fpga_mgr_unregister, sizeof(*dr), GFP_KERNEL);
743 	if (!dr)
744 		return ERR_PTR(-ENOMEM);
745 
746 	mgr = fpga_mgr_register_full(parent, info);
747 	if (IS_ERR(mgr)) {
748 		devres_free(dr);
749 		return mgr;
750 	}
751 
752 	dr->mgr = mgr;
753 	devres_add(parent, dr);
754 
755 	return mgr;
756 }
757 EXPORT_SYMBOL_GPL(devm_fpga_mgr_register_full);
758 
759 /**
760  * devm_fpga_mgr_register - resource managed variant of fpga_mgr_register()
761  * @parent:	fpga manager device from pdev
762  * @name:	fpga manager name
763  * @mops:	pointer to structure of fpga manager ops
764  * @priv:	fpga manager private data
765  *
766  * This is the devres variant of fpga_mgr_register() for which the
767  * unregister function will be called automatically when the managing
768  * device is detached.
769  */
770 struct fpga_manager *
771 devm_fpga_mgr_register(struct device *parent, const char *name,
772 		       const struct fpga_manager_ops *mops, void *priv)
773 {
774 	struct fpga_manager_info info = { 0 };
775 
776 	info.name = name;
777 	info.mops = mops;
778 	info.priv = priv;
779 
780 	return devm_fpga_mgr_register_full(parent, &info);
781 }
782 EXPORT_SYMBOL_GPL(devm_fpga_mgr_register);
783 
784 static void fpga_mgr_dev_release(struct device *dev)
785 {
786 	struct fpga_manager *mgr = to_fpga_manager(dev);
787 
788 	ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
789 	kfree(mgr);
790 }
791 
792 static int __init fpga_mgr_class_init(void)
793 {
794 	pr_info("FPGA manager framework\n");
795 
796 	fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
797 	if (IS_ERR(fpga_mgr_class))
798 		return PTR_ERR(fpga_mgr_class);
799 
800 	fpga_mgr_class->dev_groups = fpga_mgr_groups;
801 	fpga_mgr_class->dev_release = fpga_mgr_dev_release;
802 
803 	return 0;
804 }
805 
806 static void __exit fpga_mgr_class_exit(void)
807 {
808 	class_destroy(fpga_mgr_class);
809 	ida_destroy(&fpga_mgr_ida);
810 }
811 
812 MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
813 MODULE_DESCRIPTION("FPGA manager framework");
814 MODULE_LICENSE("GPL v2");
815 
816 subsys_initcall(fpga_mgr_class_init);
817 module_exit(fpga_mgr_class_exit);
818