1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * FPGA Region Driver for FPGA Management Engine (FME) 4 * 5 * Copyright (C) 2017-2018 Intel Corporation, Inc. 6 * 7 * Authors: 8 * Wu Hao <hao.wu@intel.com> 9 * Joseph Grecco <joe.grecco@intel.com> 10 * Enno Luebbers <enno.luebbers@intel.com> 11 * Tim Whisonant <tim.whisonant@intel.com> 12 * Ananda Ravuri <ananda.ravuri@intel.com> 13 * Henry Mitchel <henry.mitchel@intel.com> 14 */ 15 16 #include <linux/module.h> 17 #include <linux/fpga/fpga-region.h> 18 19 #include "dfl-fme-pr.h" 20 21 static int fme_region_get_bridges(struct fpga_region *region) 22 { 23 struct dfl_fme_region_pdata *pdata = region->priv; 24 struct device *dev = &pdata->br->dev; 25 26 return fpga_bridge_get_to_list(dev, region->info, ®ion->bridge_list); 27 } 28 29 static int fme_region_probe(struct platform_device *pdev) 30 { 31 struct dfl_fme_region_pdata *pdata = dev_get_platdata(&pdev->dev); 32 struct device *dev = &pdev->dev; 33 struct fpga_region *region; 34 struct fpga_manager *mgr; 35 int ret; 36 37 mgr = fpga_mgr_get(&pdata->mgr->dev); 38 if (IS_ERR(mgr)) 39 return -EPROBE_DEFER; 40 41 region = fpga_region_create(dev, mgr, fme_region_get_bridges); 42 if (!region) { 43 ret = -ENOMEM; 44 goto eprobe_mgr_put; 45 } 46 47 region->priv = pdata; 48 region->compat_id = mgr->compat_id; 49 platform_set_drvdata(pdev, region); 50 51 ret = fpga_region_register(region); 52 if (ret) 53 goto region_free; 54 55 dev_dbg(dev, "DFL FME FPGA Region probed\n"); 56 57 return 0; 58 59 region_free: 60 fpga_region_free(region); 61 eprobe_mgr_put: 62 fpga_mgr_put(mgr); 63 return ret; 64 } 65 66 static int fme_region_remove(struct platform_device *pdev) 67 { 68 struct fpga_region *region = dev_get_drvdata(&pdev->dev); 69 70 fpga_region_unregister(region); 71 fpga_mgr_put(region->mgr); 72 73 return 0; 74 } 75 76 static struct platform_driver fme_region_driver = { 77 .driver = { 78 .name = DFL_FPGA_FME_REGION, 79 }, 80 .probe = fme_region_probe, 81 .remove = fme_region_remove, 82 }; 83 84 module_platform_driver(fme_region_driver); 85 86 MODULE_DESCRIPTION("FPGA Region for DFL FPGA Management Engine"); 87 MODULE_AUTHOR("Intel Corporation"); 88 MODULE_LICENSE("GPL v2"); 89 MODULE_ALIAS("platform:dfl-fme-region"); 90