1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Header file for FPGA Accelerated Function Unit (AFU) Driver 4 * 5 * Copyright (C) 2017-2018 Intel Corporation, Inc. 6 * 7 * Authors: 8 * Wu Hao <hao.wu@intel.com> 9 * Xiao Guangrong <guangrong.xiao@linux.intel.com> 10 * Joseph Grecco <joe.grecco@intel.com> 11 * Enno Luebbers <enno.luebbers@intel.com> 12 * Tim Whisonant <tim.whisonant@intel.com> 13 * Ananda Ravuri <ananda.ravuri@intel.com> 14 * Henry Mitchel <henry.mitchel@intel.com> 15 */ 16 17 #ifndef __DFL_AFU_H 18 #define __DFL_AFU_H 19 20 #include <linux/mm.h> 21 22 #include "dfl.h" 23 24 /** 25 * struct dfl_afu_mmio_region - afu mmio region data structure 26 * 27 * @index: region index. 28 * @flags: region flags (access permission). 29 * @size: region size. 30 * @offset: region offset from start of the device fd. 31 * @phys: region's physical address. 32 * @node: node to add to afu feature dev's region list. 33 */ 34 struct dfl_afu_mmio_region { 35 u32 index; 36 u32 flags; 37 u64 size; 38 u64 offset; 39 u64 phys; 40 struct list_head node; 41 }; 42 43 /** 44 * struct fpga_afu_dma_region - afu DMA region data structure 45 * 46 * @user_addr: region userspace virtual address. 47 * @length: region length. 48 * @iova: region IO virtual address. 49 * @pages: ptr to pages of this region. 50 * @node: rb tree node. 51 * @in_use: flag to indicate if this region is in_use. 52 */ 53 struct dfl_afu_dma_region { 54 u64 user_addr; 55 u64 length; 56 u64 iova; 57 struct page **pages; 58 struct rb_node node; 59 bool in_use; 60 }; 61 62 /** 63 * struct dfl_afu - afu device data structure 64 * 65 * @region_cur_offset: current region offset from start to the device fd. 66 * @num_regions: num of mmio regions. 67 * @regions: the mmio region linked list of this afu feature device. 68 * @dma_regions: root of dma regions rb tree. 69 * @num_umsgs: num of umsgs. 70 * @pdata: afu platform device's pdata. 71 */ 72 struct dfl_afu { 73 u64 region_cur_offset; 74 int num_regions; 75 u8 num_umsgs; 76 struct list_head regions; 77 struct rb_root dma_regions; 78 79 struct dfl_feature_platform_data *pdata; 80 }; 81 82 void afu_mmio_region_init(struct dfl_feature_platform_data *pdata); 83 int afu_mmio_region_add(struct dfl_feature_platform_data *pdata, 84 u32 region_index, u64 region_size, u64 phys, u32 flags); 85 void afu_mmio_region_destroy(struct dfl_feature_platform_data *pdata); 86 int afu_mmio_region_get_by_index(struct dfl_feature_platform_data *pdata, 87 u32 region_index, 88 struct dfl_afu_mmio_region *pregion); 89 int afu_mmio_region_get_by_offset(struct dfl_feature_platform_data *pdata, 90 u64 offset, u64 size, 91 struct dfl_afu_mmio_region *pregion); 92 void afu_dma_region_init(struct dfl_feature_platform_data *pdata); 93 void afu_dma_region_destroy(struct dfl_feature_platform_data *pdata); 94 int afu_dma_map_region(struct dfl_feature_platform_data *pdata, 95 u64 user_addr, u64 length, u64 *iova); 96 int afu_dma_unmap_region(struct dfl_feature_platform_data *pdata, u64 iova); 97 struct dfl_afu_dma_region * 98 afu_dma_region_find(struct dfl_feature_platform_data *pdata, 99 u64 iova, u64 size); 100 #endif /* __DFL_AFU_H */ 101