xref: /openbmc/linux/drivers/fpga/Makefile (revision 01c54e62)
1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0
26a8c3be7SAlan Tull#
36a8c3be7SAlan Tull# Makefile for the fpga framework and fpga manager drivers.
46a8c3be7SAlan Tull#
56a8c3be7SAlan Tull
66a8c3be7SAlan Tull# Core FPGA Manager Framework
76a8c3be7SAlan Tullobj-$(CONFIG_FPGA)			+= fpga-mgr.o
86a8c3be7SAlan Tull
96a8c3be7SAlan Tull# FPGA Manager Drivers
1034d1dc17SAnatolij Gustschinobj-$(CONFIG_FPGA_MGR_ALTERA_CVP)	+= altera-cvp.o
115692fae0SJoshua Claytonobj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI)	+= altera-ps-spi.o
1221f8ba2eSJoel Holdsworthobj-$(CONFIG_FPGA_MGR_ICE40_SPI)	+= ice40-spi.o
1388fb3a00SPaolo Pisatiobj-$(CONFIG_FPGA_MGR_MACHXO2_SPI)	+= machxo2-spi.o
14fab6266eSAlan Tullobj-$(CONFIG_FPGA_MGR_SOCFPGA)		+= socfpga.o
15acbb910aSAlan Tullobj-$(CONFIG_FPGA_MGR_SOCFPGA_A10)	+= socfpga-a10.o
16e7eef1d7SAlan Tullobj-$(CONFIG_FPGA_MGR_STRATIX10_SOC)	+= stratix10-soc.o
174348f7e2SFlorian Fainelliobj-$(CONFIG_FPGA_MGR_TS73XX)		+= ts73xx-fpga.o
18061c97d1SAnatolij Gustschinobj-$(CONFIG_FPGA_MGR_XILINX_SPI)	+= xilinx-spi.o
1937784706SMoritz Fischerobj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA)	+= zynq-fpga.o
20c09f7471SNava kishore Manneobj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA)	+= zynqmp-fpga.o
21*01c54e62SNava kishore Manneobj-$(CONFIG_FPGA_MGR_VERSAL_FPGA)      += versal-fpga.o
22d201cc17SMatthew Gerlachobj-$(CONFIG_ALTERA_PR_IP_CORE)         += altera-pr-ip-core.o
235b73cb5bSMatthew Gerlachobj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT)    += altera-pr-ip-core-plat.o
2421aeda95SAlan Tull
2521aeda95SAlan Tull# FPGA Bridge Drivers
2621aeda95SAlan Tullobj-$(CONFIG_FPGA_BRIDGE)		+= fpga-bridge.o
27e5f8efa5SAlan Tullobj-$(CONFIG_SOCFPGA_FPGA_BRIDGE)	+= altera-hps2fpga.o altera-fpga2sdram.o
28ca24a648SAlan Tullobj-$(CONFIG_ALTERA_FREEZE_BRIDGE)	+= altera-freeze-bridge.o
297e961c12SMoritz Fischerobj-$(CONFIG_XILINX_PR_DECOUPLER)	+= xilinx-pr-decoupler.o
300fa20cdfSAlan Tull
310fa20cdfSAlan Tull# High Level Interfaces
320fa20cdfSAlan Tullobj-$(CONFIG_FPGA_REGION)		+= fpga-region.o
33ef3acdd8SAlan Tullobj-$(CONFIG_OF_FPGA_REGION)		+= of-fpga-region.o
34543be3d8SWu Hao
35543be3d8SWu Hao# FPGA Device Feature List Support
36543be3d8SWu Haoobj-$(CONFIG_FPGA_DFL)			+= dfl.o
37322ddebeSKang Luweiobj-$(CONFIG_FPGA_DFL_FME)		+= dfl-fme.o
38af275ec6SWu Haoobj-$(CONFIG_FPGA_DFL_FME_MGR)		+= dfl-fme-mgr.o
39de892dffSWu Haoobj-$(CONFIG_FPGA_DFL_FME_BRIDGE)	+= dfl-fme-br.o
40bb61b9beSWu Haoobj-$(CONFIG_FPGA_DFL_FME_REGION)	+= dfl-fme-region.o
411a1527cfSWu Haoobj-$(CONFIG_FPGA_DFL_AFU)		+= dfl-afu.o
42322ddebeSKang Luwei
43cb3c2c47SWu Haodfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o dfl-fme-error.o
44724142f8SWu Haodfl-fme-objs += dfl-fme-perf.o
45fa8dda1eSWu Haodfl-afu-objs := dfl-afu-main.o dfl-afu-region.o dfl-afu-dma-region.o
4644d24753SWu Haodfl-afu-objs += dfl-afu-error.o
4772ddd9f3SZhang Yi
4856172ab3SXu Yilunobj-$(CONFIG_FPGA_DFL_NIOS_INTEL_PAC_N3000)	+= dfl-n3000-nios.o
4956172ab3SXu Yilun
5072ddd9f3SZhang Yi# Drivers for FPGAs which implement DFL
5172ddd9f3SZhang Yiobj-$(CONFIG_FPGA_DFL_PCI)		+= dfl-pci.o
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