1# 2# FPGA framework configuration 3# 4 5menuconfig FPGA 6 tristate "FPGA Configuration Framework" 7 help 8 Say Y here if you want support for configuring FPGAs from the 9 kernel. The FPGA framework adds a FPGA manager class and FPGA 10 manager drivers. 11 12if FPGA 13 14config FPGA_MGR_SOCFPGA 15 tristate "Altera SOCFPGA FPGA Manager" 16 depends on ARCH_SOCFPGA || COMPILE_TEST 17 help 18 FPGA manager driver support for Altera SOCFPGA. 19 20config FPGA_MGR_SOCFPGA_A10 21 tristate "Altera SoCFPGA Arria10" 22 depends on ARCH_SOCFPGA || COMPILE_TEST 23 select REGMAP_MMIO 24 help 25 FPGA manager driver support for Altera Arria10 SoCFPGA. 26 27config ALTERA_PR_IP_CORE 28 tristate "Altera Partial Reconfiguration IP Core" 29 help 30 Core driver support for Altera Partial Reconfiguration IP component 31 32config ALTERA_PR_IP_CORE_PLAT 33 tristate "Platform support of Altera Partial Reconfiguration IP Core" 34 depends on ALTERA_PR_IP_CORE && OF && HAS_IOMEM 35 help 36 Platform driver support for Altera Partial Reconfiguration IP 37 component 38 39config FPGA_MGR_ALTERA_PS_SPI 40 tristate "Altera FPGA Passive Serial over SPI" 41 depends on SPI 42 help 43 FPGA manager driver support for Altera Arria/Cyclone/Stratix 44 using the passive serial interface over SPI. 45 46config FPGA_MGR_ALTERA_CVP 47 tristate "Altera Arria-V/Cyclone-V/Stratix-V CvP FPGA Manager" 48 depends on PCI 49 help 50 FPGA manager driver support for Arria-V, Cyclone-V, Stratix-V 51 and Arria 10 Altera FPGAs using the CvP interface over PCIe. 52 53config FPGA_MGR_ZYNQ_FPGA 54 tristate "Xilinx Zynq FPGA" 55 depends on ARCH_ZYNQ || COMPILE_TEST 56 depends on HAS_DMA 57 help 58 FPGA manager driver support for Xilinx Zynq FPGAs. 59 60config FPGA_MGR_XILINX_SPI 61 tristate "Xilinx Configuration over Slave Serial (SPI)" 62 depends on SPI 63 help 64 FPGA manager driver support for Xilinx FPGA configuration 65 over slave serial interface. 66 67config FPGA_MGR_ICE40_SPI 68 tristate "Lattice iCE40 SPI" 69 depends on OF && SPI 70 help 71 FPGA manager driver support for Lattice iCE40 FPGAs over SPI. 72 73config FPGA_MGR_TS73XX 74 tristate "Technologic Systems TS-73xx SBC FPGA Manager" 75 depends on ARCH_EP93XX && MACH_TS72XX 76 help 77 FPGA manager driver support for the Altera Cyclone II FPGA 78 present on the TS-73xx SBC boards. 79 80config FPGA_BRIDGE 81 tristate "FPGA Bridge Framework" 82 help 83 Say Y here if you want to support bridges connected between host 84 processors and FPGAs or between FPGAs. 85 86config SOCFPGA_FPGA_BRIDGE 87 tristate "Altera SoCFPGA FPGA Bridges" 88 depends on ARCH_SOCFPGA && FPGA_BRIDGE 89 help 90 Say Y to enable drivers for FPGA bridges for Altera SOCFPGA 91 devices. 92 93config ALTERA_FREEZE_BRIDGE 94 tristate "Altera FPGA Freeze Bridge" 95 depends on ARCH_SOCFPGA && FPGA_BRIDGE 96 help 97 Say Y to enable drivers for Altera FPGA Freeze bridges. A 98 freeze bridge is a bridge that exists in the FPGA fabric to 99 isolate one region of the FPGA from the busses while that 100 region is being reprogrammed. 101 102config XILINX_PR_DECOUPLER 103 tristate "Xilinx LogiCORE PR Decoupler" 104 depends on FPGA_BRIDGE 105 depends on HAS_IOMEM 106 help 107 Say Y to enable drivers for Xilinx LogiCORE PR Decoupler. 108 The PR Decoupler exists in the FPGA fabric to isolate one 109 region of the FPGA from the busses while that region is 110 being reprogrammed during partial reconfig. 111 112config FPGA_REGION 113 tristate "FPGA Region" 114 depends on FPGA_BRIDGE 115 help 116 FPGA Region common code. A FPGA Region controls a FPGA Manager 117 and the FPGA Bridges associated with either a reconfigurable 118 region of an FPGA or a whole FPGA. 119 120config OF_FPGA_REGION 121 tristate "FPGA Region Device Tree Overlay Support" 122 depends on OF && FPGA_REGION 123 help 124 Support for loading FPGA images by applying a Device Tree 125 overlay. 126 127endif # FPGA 128