1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Xilinx Zynq MPSoC Firmware layer 4 * 5 * Copyright (C) 2014-2021 Xilinx, Inc. 6 * 7 * Michal Simek <michal.simek@xilinx.com> 8 * Davorin Mista <davorin.mista@aggios.com> 9 * Jolly Shah <jollys@xilinx.com> 10 * Rajan Vaja <rajanv@xilinx.com> 11 */ 12 13 #include <linux/arm-smccc.h> 14 #include <linux/compiler.h> 15 #include <linux/device.h> 16 #include <linux/init.h> 17 #include <linux/mfd/core.h> 18 #include <linux/module.h> 19 #include <linux/of.h> 20 #include <linux/of_platform.h> 21 #include <linux/slab.h> 22 #include <linux/uaccess.h> 23 #include <linux/hashtable.h> 24 25 #include <linux/firmware/xlnx-zynqmp.h> 26 #include <linux/firmware/xlnx-event-manager.h> 27 #include "zynqmp-debug.h" 28 29 /* Max HashMap Order for PM API feature check (1<<7 = 128) */ 30 #define PM_API_FEATURE_CHECK_MAX_ORDER 7 31 32 /* CRL registers and bitfields */ 33 #define CRL_APB_BASE 0xFF5E0000U 34 /* BOOT_PIN_CTRL- Used to control the mode pins after boot */ 35 #define CRL_APB_BOOT_PIN_CTRL (CRL_APB_BASE + (0x250U)) 36 /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */ 37 #define CRL_APB_BOOTPIN_CTRL_MASK 0xF0FU 38 39 static bool feature_check_enabled; 40 static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER); 41 42 static struct platform_device *em_dev; 43 44 /** 45 * struct pm_api_feature_data - PM API Feature data 46 * @pm_api_id: PM API Id, used as key to index into hashmap 47 * @feature_status: status of PM API feature: valid, invalid 48 * @hentry: hlist_node that hooks this entry into hashtable 49 */ 50 struct pm_api_feature_data { 51 u32 pm_api_id; 52 int feature_status; 53 struct hlist_node hentry; 54 }; 55 56 static const struct mfd_cell firmware_devs[] = { 57 { 58 .name = "zynqmp_power_controller", 59 }, 60 }; 61 62 /** 63 * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes 64 * @ret_status: PMUFW return code 65 * 66 * Return: corresponding Linux error code 67 */ 68 static int zynqmp_pm_ret_code(u32 ret_status) 69 { 70 switch (ret_status) { 71 case XST_PM_SUCCESS: 72 case XST_PM_DOUBLE_REQ: 73 return 0; 74 case XST_PM_NO_FEATURE: 75 return -ENOTSUPP; 76 case XST_PM_NO_ACCESS: 77 return -EACCES; 78 case XST_PM_ABORT_SUSPEND: 79 return -ECANCELED; 80 case XST_PM_MULT_USER: 81 return -EUSERS; 82 case XST_PM_INTERNAL: 83 case XST_PM_CONFLICT: 84 case XST_PM_INVALID_NODE: 85 default: 86 return -EINVAL; 87 } 88 } 89 90 static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2, 91 u32 *ret_payload) 92 { 93 return -ENODEV; 94 } 95 96 /* 97 * PM function call wrapper 98 * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration 99 */ 100 static int (*do_fw_call)(u64, u64, u64, u32 *ret_payload) = do_fw_call_fail; 101 102 /** 103 * do_fw_call_smc() - Call system-level platform management layer (SMC) 104 * @arg0: Argument 0 to SMC call 105 * @arg1: Argument 1 to SMC call 106 * @arg2: Argument 2 to SMC call 107 * @ret_payload: Returned value array 108 * 109 * Invoke platform management function via SMC call (no hypervisor present). 110 * 111 * Return: Returns status, either success or error+reason 112 */ 113 static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2, 114 u32 *ret_payload) 115 { 116 struct arm_smccc_res res; 117 118 arm_smccc_smc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res); 119 120 if (ret_payload) { 121 ret_payload[0] = lower_32_bits(res.a0); 122 ret_payload[1] = upper_32_bits(res.a0); 123 ret_payload[2] = lower_32_bits(res.a1); 124 ret_payload[3] = upper_32_bits(res.a1); 125 } 126 127 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0); 128 } 129 130 /** 131 * do_fw_call_hvc() - Call system-level platform management layer (HVC) 132 * @arg0: Argument 0 to HVC call 133 * @arg1: Argument 1 to HVC call 134 * @arg2: Argument 2 to HVC call 135 * @ret_payload: Returned value array 136 * 137 * Invoke platform management function via HVC 138 * HVC-based for communication through hypervisor 139 * (no direct communication with ATF). 140 * 141 * Return: Returns status, either success or error+reason 142 */ 143 static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2, 144 u32 *ret_payload) 145 { 146 struct arm_smccc_res res; 147 148 arm_smccc_hvc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res); 149 150 if (ret_payload) { 151 ret_payload[0] = lower_32_bits(res.a0); 152 ret_payload[1] = upper_32_bits(res.a0); 153 ret_payload[2] = lower_32_bits(res.a1); 154 ret_payload[3] = upper_32_bits(res.a1); 155 } 156 157 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0); 158 } 159 160 /** 161 * zynqmp_pm_feature() - Check weather given feature is supported or not 162 * @api_id: API ID to check 163 * 164 * Return: Returns status, either success or error+reason 165 */ 166 int zynqmp_pm_feature(const u32 api_id) 167 { 168 int ret; 169 u32 ret_payload[PAYLOAD_ARG_CNT]; 170 u64 smc_arg[2]; 171 struct pm_api_feature_data *feature_data; 172 173 if (!feature_check_enabled) 174 return 0; 175 176 /* Check for existing entry in hash table for given api */ 177 hash_for_each_possible(pm_api_features_map, feature_data, hentry, 178 api_id) { 179 if (feature_data->pm_api_id == api_id) 180 return feature_data->feature_status; 181 } 182 183 /* Add new entry if not present */ 184 feature_data = kmalloc(sizeof(*feature_data), GFP_KERNEL); 185 if (!feature_data) 186 return -ENOMEM; 187 188 feature_data->pm_api_id = api_id; 189 smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK; 190 smc_arg[1] = api_id; 191 192 ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload); 193 if (ret) 194 ret = -EOPNOTSUPP; 195 else 196 ret = ret_payload[1]; 197 198 feature_data->feature_status = ret; 199 hash_add(pm_api_features_map, &feature_data->hentry, api_id); 200 201 return ret; 202 } 203 EXPORT_SYMBOL_GPL(zynqmp_pm_feature); 204 205 /** 206 * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer 207 * caller function depending on the configuration 208 * @pm_api_id: Requested PM-API call 209 * @arg0: Argument 0 to requested PM-API call 210 * @arg1: Argument 1 to requested PM-API call 211 * @arg2: Argument 2 to requested PM-API call 212 * @arg3: Argument 3 to requested PM-API call 213 * @ret_payload: Returned value array 214 * 215 * Invoke platform management function for SMC or HVC call, depending on 216 * configuration. 217 * Following SMC Calling Convention (SMCCC) for SMC64: 218 * Pm Function Identifier, 219 * PM_SIP_SVC + PM_API_ID = 220 * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) 221 * ((SMC_64) << FUNCID_CC_SHIFT) 222 * ((SIP_START) << FUNCID_OEN_SHIFT) 223 * ((PM_API_ID) & FUNCID_NUM_MASK)) 224 * 225 * PM_SIP_SVC - Registered ZynqMP SIP Service Call. 226 * PM_API_ID - Platform Management API ID. 227 * 228 * Return: Returns status, either success or error+reason 229 */ 230 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, 231 u32 arg2, u32 arg3, u32 *ret_payload) 232 { 233 /* 234 * Added SIP service call Function Identifier 235 * Make sure to stay in x0 register 236 */ 237 u64 smc_arg[4]; 238 int ret; 239 240 /* Check if feature is supported or not */ 241 ret = zynqmp_pm_feature(pm_api_id); 242 if (ret < 0) 243 return ret; 244 245 smc_arg[0] = PM_SIP_SVC | pm_api_id; 246 smc_arg[1] = ((u64)arg1 << 32) | arg0; 247 smc_arg[2] = ((u64)arg3 << 32) | arg2; 248 249 return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], ret_payload); 250 } 251 252 static u32 pm_api_version; 253 static u32 pm_tz_version; 254 255 /** 256 * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware 257 * @version: Returned version value 258 * 259 * Return: Returns status, either success or error+reason 260 */ 261 int zynqmp_pm_get_api_version(u32 *version) 262 { 263 u32 ret_payload[PAYLOAD_ARG_CNT]; 264 int ret; 265 266 if (!version) 267 return -EINVAL; 268 269 /* Check is PM API version already verified */ 270 if (pm_api_version > 0) { 271 *version = pm_api_version; 272 return 0; 273 } 274 ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, ret_payload); 275 *version = ret_payload[1]; 276 277 return ret; 278 } 279 EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version); 280 281 /** 282 * zynqmp_pm_get_chipid - Get silicon ID registers 283 * @idcode: IDCODE register 284 * @version: version register 285 * 286 * Return: Returns the status of the operation and the idcode and version 287 * registers in @idcode and @version. 288 */ 289 int zynqmp_pm_get_chipid(u32 *idcode, u32 *version) 290 { 291 u32 ret_payload[PAYLOAD_ARG_CNT]; 292 int ret; 293 294 if (!idcode || !version) 295 return -EINVAL; 296 297 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload); 298 *idcode = ret_payload[1]; 299 *version = ret_payload[2]; 300 301 return ret; 302 } 303 EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid); 304 305 /** 306 * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version 307 * @version: Returned version value 308 * 309 * Return: Returns status, either success or error+reason 310 */ 311 static int zynqmp_pm_get_trustzone_version(u32 *version) 312 { 313 u32 ret_payload[PAYLOAD_ARG_CNT]; 314 int ret; 315 316 if (!version) 317 return -EINVAL; 318 319 /* Check is PM trustzone version already verified */ 320 if (pm_tz_version > 0) { 321 *version = pm_tz_version; 322 return 0; 323 } 324 ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, 0, 0, 325 0, 0, ret_payload); 326 *version = ret_payload[1]; 327 328 return ret; 329 } 330 331 /** 332 * get_set_conduit_method() - Choose SMC or HVC based communication 333 * @np: Pointer to the device_node structure 334 * 335 * Use SMC or HVC-based functions to communicate with EL2/EL3. 336 * 337 * Return: Returns 0 on success or error code 338 */ 339 static int get_set_conduit_method(struct device_node *np) 340 { 341 const char *method; 342 343 if (of_property_read_string(np, "method", &method)) { 344 pr_warn("%s missing \"method\" property\n", __func__); 345 return -ENXIO; 346 } 347 348 if (!strcmp("hvc", method)) { 349 do_fw_call = do_fw_call_hvc; 350 } else if (!strcmp("smc", method)) { 351 do_fw_call = do_fw_call_smc; 352 } else { 353 pr_warn("%s Invalid \"method\" property: %s\n", 354 __func__, method); 355 return -EINVAL; 356 } 357 358 return 0; 359 } 360 361 /** 362 * zynqmp_pm_query_data() - Get query data from firmware 363 * @qdata: Variable to the zynqmp_pm_query_data structure 364 * @out: Returned output value 365 * 366 * Return: Returns status, either success or error+reason 367 */ 368 int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out) 369 { 370 int ret; 371 372 ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, qdata.qid, qdata.arg1, 373 qdata.arg2, qdata.arg3, out); 374 375 /* 376 * For clock name query, all bytes in SMC response are clock name 377 * characters and return code is always success. For invalid clocks, 378 * clock name bytes would be zeros. 379 */ 380 return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret; 381 } 382 EXPORT_SYMBOL_GPL(zynqmp_pm_query_data); 383 384 /** 385 * zynqmp_pm_clock_enable() - Enable the clock for given id 386 * @clock_id: ID of the clock to be enabled 387 * 388 * This function is used by master to enable the clock 389 * including peripherals and PLL clocks. 390 * 391 * Return: Returns status, either success or error+reason 392 */ 393 int zynqmp_pm_clock_enable(u32 clock_id) 394 { 395 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL); 396 } 397 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable); 398 399 /** 400 * zynqmp_pm_clock_disable() - Disable the clock for given id 401 * @clock_id: ID of the clock to be disable 402 * 403 * This function is used by master to disable the clock 404 * including peripherals and PLL clocks. 405 * 406 * Return: Returns status, either success or error+reason 407 */ 408 int zynqmp_pm_clock_disable(u32 clock_id) 409 { 410 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL); 411 } 412 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable); 413 414 /** 415 * zynqmp_pm_clock_getstate() - Get the clock state for given id 416 * @clock_id: ID of the clock to be queried 417 * @state: 1/0 (Enabled/Disabled) 418 * 419 * This function is used by master to get the state of clock 420 * including peripherals and PLL clocks. 421 * 422 * Return: Returns status, either success or error+reason 423 */ 424 int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state) 425 { 426 u32 ret_payload[PAYLOAD_ARG_CNT]; 427 int ret; 428 429 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, clock_id, 0, 430 0, 0, ret_payload); 431 *state = ret_payload[1]; 432 433 return ret; 434 } 435 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate); 436 437 /** 438 * zynqmp_pm_clock_setdivider() - Set the clock divider for given id 439 * @clock_id: ID of the clock 440 * @divider: divider value 441 * 442 * This function is used by master to set divider for any clock 443 * to achieve desired rate. 444 * 445 * Return: Returns status, either success or error+reason 446 */ 447 int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider) 448 { 449 return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider, 450 0, 0, NULL); 451 } 452 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider); 453 454 /** 455 * zynqmp_pm_clock_getdivider() - Get the clock divider for given id 456 * @clock_id: ID of the clock 457 * @divider: divider value 458 * 459 * This function is used by master to get divider values 460 * for any clock. 461 * 462 * Return: Returns status, either success or error+reason 463 */ 464 int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider) 465 { 466 u32 ret_payload[PAYLOAD_ARG_CNT]; 467 int ret; 468 469 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, clock_id, 0, 470 0, 0, ret_payload); 471 *divider = ret_payload[1]; 472 473 return ret; 474 } 475 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider); 476 477 /** 478 * zynqmp_pm_clock_setrate() - Set the clock rate for given id 479 * @clock_id: ID of the clock 480 * @rate: rate value in hz 481 * 482 * This function is used by master to set rate for any clock. 483 * 484 * Return: Returns status, either success or error+reason 485 */ 486 int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate) 487 { 488 return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id, 489 lower_32_bits(rate), 490 upper_32_bits(rate), 491 0, NULL); 492 } 493 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate); 494 495 /** 496 * zynqmp_pm_clock_getrate() - Get the clock rate for given id 497 * @clock_id: ID of the clock 498 * @rate: rate value in hz 499 * 500 * This function is used by master to get rate 501 * for any clock. 502 * 503 * Return: Returns status, either success or error+reason 504 */ 505 int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate) 506 { 507 u32 ret_payload[PAYLOAD_ARG_CNT]; 508 int ret; 509 510 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, clock_id, 0, 511 0, 0, ret_payload); 512 *rate = ((u64)ret_payload[2] << 32) | ret_payload[1]; 513 514 return ret; 515 } 516 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate); 517 518 /** 519 * zynqmp_pm_clock_setparent() - Set the clock parent for given id 520 * @clock_id: ID of the clock 521 * @parent_id: parent id 522 * 523 * This function is used by master to set parent for any clock. 524 * 525 * Return: Returns status, either success or error+reason 526 */ 527 int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) 528 { 529 return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id, 530 parent_id, 0, 0, NULL); 531 } 532 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent); 533 534 /** 535 * zynqmp_pm_clock_getparent() - Get the clock parent for given id 536 * @clock_id: ID of the clock 537 * @parent_id: parent id 538 * 539 * This function is used by master to get parent index 540 * for any clock. 541 * 542 * Return: Returns status, either success or error+reason 543 */ 544 int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) 545 { 546 u32 ret_payload[PAYLOAD_ARG_CNT]; 547 int ret; 548 549 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, clock_id, 0, 550 0, 0, ret_payload); 551 *parent_id = ret_payload[1]; 552 553 return ret; 554 } 555 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent); 556 557 /** 558 * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode 559 * 560 * @clk_id: PLL clock ID 561 * @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT) 562 * 563 * This function sets PLL mode 564 * 565 * Return: Returns status, either success or error+reason 566 */ 567 int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode) 568 { 569 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_MODE, 570 clk_id, mode, NULL); 571 } 572 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode); 573 574 /** 575 * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode 576 * 577 * @clk_id: PLL clock ID 578 * @mode: PLL mode 579 * 580 * This function return current PLL mode 581 * 582 * Return: Returns status, either success or error+reason 583 */ 584 int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode) 585 { 586 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_MODE, 587 clk_id, 0, mode); 588 } 589 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode); 590 591 /** 592 * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data 593 * 594 * @clk_id: PLL clock ID 595 * @data: fraction data 596 * 597 * This function sets fraction data. 598 * It is valid for fraction mode only. 599 * 600 * Return: Returns status, either success or error+reason 601 */ 602 int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data) 603 { 604 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_DATA, 605 clk_id, data, NULL); 606 } 607 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data); 608 609 /** 610 * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data 611 * 612 * @clk_id: PLL clock ID 613 * @data: fraction data 614 * 615 * This function returns fraction data value. 616 * 617 * Return: Returns status, either success or error+reason 618 */ 619 int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data) 620 { 621 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_DATA, 622 clk_id, 0, data); 623 } 624 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data); 625 626 /** 627 * zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device 628 * 629 * @node_id: Node ID of the device 630 * @type: Type of tap delay to set (input/output) 631 * @value: Value to set fot the tap delay 632 * 633 * This function sets input/output tap delay for the SD device. 634 * 635 * Return: Returns status, either success or error+reason 636 */ 637 int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value) 638 { 639 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, 640 type, value, NULL); 641 } 642 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay); 643 644 /** 645 * zynqmp_pm_sd_dll_reset() - Reset DLL logic 646 * 647 * @node_id: Node ID of the device 648 * @type: Reset type 649 * 650 * This function resets DLL logic for the SD device. 651 * 652 * Return: Returns status, either success or error+reason 653 */ 654 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type) 655 { 656 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET, 657 type, 0, NULL); 658 } 659 EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset); 660 661 /** 662 * zynqmp_pm_ospi_mux_select() - OSPI Mux selection 663 * 664 * @dev_id: Device Id of the OSPI device. 665 * @select: OSPI Mux select value. 666 * 667 * This function select the OSPI Mux. 668 * 669 * Return: Returns status, either success or error+reason 670 */ 671 int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select) 672 { 673 return zynqmp_pm_invoke_fn(PM_IOCTL, dev_id, IOCTL_OSPI_MUX_SELECT, 674 select, 0, NULL); 675 } 676 EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select); 677 678 /** 679 * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs) 680 * @index: GGS register index 681 * @value: Register value to be written 682 * 683 * This function writes value to GGS register. 684 * 685 * Return: Returns status, either success or error+reason 686 */ 687 int zynqmp_pm_write_ggs(u32 index, u32 value) 688 { 689 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS, 690 index, value, NULL); 691 } 692 EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs); 693 694 /** 695 * zynqmp_pm_read_ggs() - PM API for reading global general storage (ggs) 696 * @index: GGS register index 697 * @value: Register value to be written 698 * 699 * This function returns GGS register value. 700 * 701 * Return: Returns status, either success or error+reason 702 */ 703 int zynqmp_pm_read_ggs(u32 index, u32 *value) 704 { 705 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS, 706 index, 0, value); 707 } 708 EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs); 709 710 /** 711 * zynqmp_pm_write_pggs() - PM API for writing persistent global general 712 * storage (pggs) 713 * @index: PGGS register index 714 * @value: Register value to be written 715 * 716 * This function writes value to PGGS register. 717 * 718 * Return: Returns status, either success or error+reason 719 */ 720 int zynqmp_pm_write_pggs(u32 index, u32 value) 721 { 722 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value, 723 NULL); 724 } 725 EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs); 726 727 /** 728 * zynqmp_pm_read_pggs() - PM API for reading persistent global general 729 * storage (pggs) 730 * @index: PGGS register index 731 * @value: Register value to be written 732 * 733 * This function returns PGGS register value. 734 * 735 * Return: Returns status, either success or error+reason 736 */ 737 int zynqmp_pm_read_pggs(u32 index, u32 *value) 738 { 739 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0, 740 value); 741 } 742 EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs); 743 744 /** 745 * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status 746 * @value: Status value to be written 747 * 748 * This function sets healthy bit value to indicate boot health status 749 * to firmware. 750 * 751 * Return: Returns status, either success or error+reason 752 */ 753 int zynqmp_pm_set_boot_health_status(u32 value) 754 { 755 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS, 756 value, 0, NULL); 757 } 758 759 /** 760 * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release) 761 * @reset: Reset to be configured 762 * @assert_flag: Flag stating should reset be asserted (1) or 763 * released (0) 764 * 765 * Return: Returns status, either success or error+reason 766 */ 767 int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset, 768 const enum zynqmp_pm_reset_action assert_flag) 769 { 770 return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag, 771 0, 0, NULL); 772 } 773 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert); 774 775 /** 776 * zynqmp_pm_reset_get_status - Get status of the reset 777 * @reset: Reset whose status should be returned 778 * @status: Returned status 779 * 780 * Return: Returns status, either success or error+reason 781 */ 782 int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status) 783 { 784 u32 ret_payload[PAYLOAD_ARG_CNT]; 785 int ret; 786 787 if (!status) 788 return -EINVAL; 789 790 ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, reset, 0, 791 0, 0, ret_payload); 792 *status = ret_payload[1]; 793 794 return ret; 795 } 796 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status); 797 798 /** 799 * zynqmp_pm_fpga_load - Perform the fpga load 800 * @address: Address to write to 801 * @size: pl bitstream size 802 * @flags: Bitstream type 803 * -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration 804 * -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration 805 * 806 * This function provides access to pmufw. To transfer 807 * the required bitstream into PL. 808 * 809 * Return: Returns status, either success or error+reason 810 */ 811 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags) 812 { 813 return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address), 814 upper_32_bits(address), size, flags, NULL); 815 } 816 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load); 817 818 /** 819 * zynqmp_pm_fpga_get_status - Read value from PCAP status register 820 * @value: Value to read 821 * 822 * This function provides access to the pmufw to get the PCAP 823 * status 824 * 825 * Return: Returns status, either success or error+reason 826 */ 827 int zynqmp_pm_fpga_get_status(u32 *value) 828 { 829 u32 ret_payload[PAYLOAD_ARG_CNT]; 830 int ret; 831 832 if (!value) 833 return -EINVAL; 834 835 ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload); 836 *value = ret_payload[1]; 837 838 return ret; 839 } 840 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status); 841 842 /** 843 * zynqmp_pm_pinctrl_request - Request Pin from firmware 844 * @pin: Pin number to request 845 * 846 * This function requests pin from firmware. 847 * 848 * Return: Returns status, either success or error+reason. 849 */ 850 int zynqmp_pm_pinctrl_request(const u32 pin) 851 { 852 return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, pin, 0, 0, 0, NULL); 853 } 854 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request); 855 856 /** 857 * zynqmp_pm_pinctrl_release - Inform firmware that Pin control is released 858 * @pin: Pin number to release 859 * 860 * This function release pin from firmware. 861 * 862 * Return: Returns status, either success or error+reason. 863 */ 864 int zynqmp_pm_pinctrl_release(const u32 pin) 865 { 866 return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, pin, 0, 0, 0, NULL); 867 } 868 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release); 869 870 /** 871 * zynqmp_pm_pinctrl_get_function - Read function id set for the given pin 872 * @pin: Pin number 873 * @id: Buffer to store function ID 874 * 875 * This function provides the function currently set for the given pin. 876 * 877 * Return: Returns status, either success or error+reason 878 */ 879 int zynqmp_pm_pinctrl_get_function(const u32 pin, u32 *id) 880 { 881 u32 ret_payload[PAYLOAD_ARG_CNT]; 882 int ret; 883 884 if (!id) 885 return -EINVAL; 886 887 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_GET_FUNCTION, pin, 0, 888 0, 0, ret_payload); 889 *id = ret_payload[1]; 890 891 return ret; 892 } 893 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_function); 894 895 /** 896 * zynqmp_pm_pinctrl_set_function - Set requested function for the pin 897 * @pin: Pin number 898 * @id: Function ID to set 899 * 900 * This function sets requested function for the given pin. 901 * 902 * Return: Returns status, either success or error+reason. 903 */ 904 int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id) 905 { 906 return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, pin, id, 907 0, 0, NULL); 908 } 909 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function); 910 911 /** 912 * zynqmp_pm_pinctrl_get_config - Get configuration parameter for the pin 913 * @pin: Pin number 914 * @param: Parameter to get 915 * @value: Buffer to store parameter value 916 * 917 * This function gets requested configuration parameter for the given pin. 918 * 919 * Return: Returns status, either success or error+reason. 920 */ 921 int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param, 922 u32 *value) 923 { 924 u32 ret_payload[PAYLOAD_ARG_CNT]; 925 int ret; 926 927 if (!value) 928 return -EINVAL; 929 930 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, pin, param, 931 0, 0, ret_payload); 932 *value = ret_payload[1]; 933 934 return ret; 935 } 936 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_config); 937 938 /** 939 * zynqmp_pm_pinctrl_set_config - Set configuration parameter for the pin 940 * @pin: Pin number 941 * @param: Parameter to set 942 * @value: Parameter value to set 943 * 944 * This function sets requested configuration parameter for the given pin. 945 * 946 * Return: Returns status, either success or error+reason. 947 */ 948 int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param, 949 u32 value) 950 { 951 return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, pin, 952 param, value, 0, NULL); 953 } 954 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config); 955 956 /** 957 * zynqmp_pm_bootmode_read() - PM Config API for read bootpin status 958 * @ps_mode: Returned output value of ps_mode 959 * 960 * This API function is to be used for notify the power management controller 961 * to read bootpin status. 962 * 963 * Return: status, either success or error+reason 964 */ 965 unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode) 966 { 967 unsigned int ret; 968 u32 ret_payload[PAYLOAD_ARG_CNT]; 969 970 ret = zynqmp_pm_invoke_fn(PM_MMIO_READ, CRL_APB_BOOT_PIN_CTRL, 0, 971 0, 0, ret_payload); 972 973 *ps_mode = ret_payload[1]; 974 975 return ret; 976 } 977 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_read); 978 979 /** 980 * zynqmp_pm_bootmode_write() - PM Config API for Configure bootpin 981 * @ps_mode: Value to be written to the bootpin ctrl register 982 * 983 * This API function is to be used for notify the power management controller 984 * to configure bootpin. 985 * 986 * Return: Returns status, either success or error+reason 987 */ 988 int zynqmp_pm_bootmode_write(u32 ps_mode) 989 { 990 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, CRL_APB_BOOT_PIN_CTRL, 991 CRL_APB_BOOTPIN_CTRL_MASK, ps_mode, 0, NULL); 992 } 993 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write); 994 995 /** 996 * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller 997 * master has initialized its own power management 998 * 999 * Return: Returns status, either success or error+reason 1000 * 1001 * This API function is to be used for notify the power management controller 1002 * about the completed power management initialization. 1003 */ 1004 int zynqmp_pm_init_finalize(void) 1005 { 1006 return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL); 1007 } 1008 EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize); 1009 1010 /** 1011 * zynqmp_pm_set_suspend_mode() - Set system suspend mode 1012 * @mode: Mode to set for system suspend 1013 * 1014 * This API function is used to set mode of system suspend. 1015 * 1016 * Return: Returns status, either success or error+reason 1017 */ 1018 int zynqmp_pm_set_suspend_mode(u32 mode) 1019 { 1020 return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL); 1021 } 1022 EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode); 1023 1024 /** 1025 * zynqmp_pm_request_node() - Request a node with specific capabilities 1026 * @node: Node ID of the slave 1027 * @capabilities: Requested capabilities of the slave 1028 * @qos: Quality of service (not supported) 1029 * @ack: Flag to specify whether acknowledge is requested 1030 * 1031 * This function is used by master to request particular node from firmware. 1032 * Every master must request node before using it. 1033 * 1034 * Return: Returns status, either success or error+reason 1035 */ 1036 int zynqmp_pm_request_node(const u32 node, const u32 capabilities, 1037 const u32 qos, const enum zynqmp_pm_request_ack ack) 1038 { 1039 return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities, 1040 qos, ack, NULL); 1041 } 1042 EXPORT_SYMBOL_GPL(zynqmp_pm_request_node); 1043 1044 /** 1045 * zynqmp_pm_release_node() - Release a node 1046 * @node: Node ID of the slave 1047 * 1048 * This function is used by master to inform firmware that master 1049 * has released node. Once released, master must not use that node 1050 * without re-request. 1051 * 1052 * Return: Returns status, either success or error+reason 1053 */ 1054 int zynqmp_pm_release_node(const u32 node) 1055 { 1056 return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL); 1057 } 1058 EXPORT_SYMBOL_GPL(zynqmp_pm_release_node); 1059 1060 /** 1061 * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves 1062 * @node: Node ID of the slave 1063 * @capabilities: Requested capabilities of the slave 1064 * @qos: Quality of service (not supported) 1065 * @ack: Flag to specify whether acknowledge is requested 1066 * 1067 * This API function is to be used for slaves a PU already has requested 1068 * to change its capabilities. 1069 * 1070 * Return: Returns status, either success or error+reason 1071 */ 1072 int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, 1073 const u32 qos, 1074 const enum zynqmp_pm_request_ack ack) 1075 { 1076 return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities, 1077 qos, ack, NULL); 1078 } 1079 EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement); 1080 1081 /** 1082 * zynqmp_pm_load_pdi - Load and process PDI 1083 * @src: Source device where PDI is located 1084 * @address: PDI src address 1085 * 1086 * This function provides support to load PDI from linux 1087 * 1088 * Return: Returns status, either success or error+reason 1089 */ 1090 int zynqmp_pm_load_pdi(const u32 src, const u64 address) 1091 { 1092 return zynqmp_pm_invoke_fn(PM_LOAD_PDI, src, 1093 lower_32_bits(address), 1094 upper_32_bits(address), 0, NULL); 1095 } 1096 EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi); 1097 1098 /** 1099 * zynqmp_pm_aes_engine - Access AES hardware to encrypt/decrypt the data using 1100 * AES-GCM core. 1101 * @address: Address of the AesParams structure. 1102 * @out: Returned output value 1103 * 1104 * Return: Returns status, either success or error code. 1105 */ 1106 int zynqmp_pm_aes_engine(const u64 address, u32 *out) 1107 { 1108 u32 ret_payload[PAYLOAD_ARG_CNT]; 1109 int ret; 1110 1111 if (!out) 1112 return -EINVAL; 1113 1114 ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address), 1115 lower_32_bits(address), 1116 0, 0, ret_payload); 1117 *out = ret_payload[1]; 1118 1119 return ret; 1120 } 1121 EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine); 1122 1123 /** 1124 * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash 1125 * @address: Address of the data/ Address of output buffer where 1126 * hash should be stored. 1127 * @size: Size of the data. 1128 * @flags: 1129 * BIT(0) - for initializing csudma driver and SHA3(Here address 1130 * and size inputs can be NULL). 1131 * BIT(1) - to call Sha3_Update API which can be called multiple 1132 * times when data is not contiguous. 1133 * BIT(2) - to get final hash of the whole updated data. 1134 * Hash will be overwritten at provided address with 1135 * 48 bytes. 1136 * 1137 * Return: Returns status, either success or error code. 1138 */ 1139 int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags) 1140 { 1141 u32 lower_addr = lower_32_bits(address); 1142 u32 upper_addr = upper_32_bits(address); 1143 1144 return zynqmp_pm_invoke_fn(PM_SECURE_SHA, upper_addr, lower_addr, 1145 size, flags, NULL); 1146 } 1147 EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash); 1148 1149 /** 1150 * zynqmp_pm_register_notifier() - PM API for register a subsystem 1151 * to be notified about specific 1152 * event/error. 1153 * @node: Node ID to which the event is related. 1154 * @event: Event Mask of Error events for which wants to get notified. 1155 * @wake: Wake subsystem upon capturing the event if value 1 1156 * @enable: Enable the registration for value 1, disable for value 0 1157 * 1158 * This function is used to register/un-register for particular node-event 1159 * combination in firmware. 1160 * 1161 * Return: Returns status, either success or error+reason 1162 */ 1163 1164 int zynqmp_pm_register_notifier(const u32 node, const u32 event, 1165 const u32 wake, const u32 enable) 1166 { 1167 return zynqmp_pm_invoke_fn(PM_REGISTER_NOTIFIER, node, event, 1168 wake, enable, NULL); 1169 } 1170 EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier); 1171 1172 /** 1173 * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart 1174 * @type: Shutdown or restart? 0 for shutdown, 1 for restart 1175 * @subtype: Specifies which system should be restarted or shut down 1176 * 1177 * Return: Returns status, either success or error+reason 1178 */ 1179 int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype) 1180 { 1181 return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, type, subtype, 1182 0, 0, NULL); 1183 } 1184 1185 /** 1186 * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope 1187 * @subtype: Shutdown subtype 1188 * @name: Matching string for scope argument 1189 * 1190 * This struct encapsulates mapping between shutdown scope ID and string. 1191 */ 1192 struct zynqmp_pm_shutdown_scope { 1193 const enum zynqmp_pm_shutdown_subtype subtype; 1194 const char *name; 1195 }; 1196 1197 static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = { 1198 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = { 1199 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM, 1200 .name = "subsystem", 1201 }, 1202 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = { 1203 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY, 1204 .name = "ps_only", 1205 }, 1206 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = { 1207 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM, 1208 .name = "system", 1209 }, 1210 }; 1211 1212 static struct zynqmp_pm_shutdown_scope *selected_scope = 1213 &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM]; 1214 1215 /** 1216 * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid 1217 * @scope_string: Shutdown scope string 1218 * 1219 * Return: Return pointer to matching shutdown scope struct from 1220 * array of available options in system if string is valid, 1221 * otherwise returns NULL. 1222 */ 1223 static struct zynqmp_pm_shutdown_scope* 1224 zynqmp_pm_is_shutdown_scope_valid(const char *scope_string) 1225 { 1226 int count; 1227 1228 for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++) 1229 if (sysfs_streq(scope_string, shutdown_scopes[count].name)) 1230 return &shutdown_scopes[count]; 1231 1232 return NULL; 1233 } 1234 1235 static ssize_t shutdown_scope_show(struct device *device, 1236 struct device_attribute *attr, 1237 char *buf) 1238 { 1239 int i; 1240 1241 for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) { 1242 if (&shutdown_scopes[i] == selected_scope) { 1243 strcat(buf, "["); 1244 strcat(buf, shutdown_scopes[i].name); 1245 strcat(buf, "]"); 1246 } else { 1247 strcat(buf, shutdown_scopes[i].name); 1248 } 1249 strcat(buf, " "); 1250 } 1251 strcat(buf, "\n"); 1252 1253 return strlen(buf); 1254 } 1255 1256 static ssize_t shutdown_scope_store(struct device *device, 1257 struct device_attribute *attr, 1258 const char *buf, size_t count) 1259 { 1260 int ret; 1261 struct zynqmp_pm_shutdown_scope *scope; 1262 1263 scope = zynqmp_pm_is_shutdown_scope_valid(buf); 1264 if (!scope) 1265 return -EINVAL; 1266 1267 ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY, 1268 scope->subtype); 1269 if (ret) { 1270 pr_err("unable to set shutdown scope %s\n", buf); 1271 return ret; 1272 } 1273 1274 selected_scope = scope; 1275 1276 return count; 1277 } 1278 1279 static DEVICE_ATTR_RW(shutdown_scope); 1280 1281 static ssize_t health_status_store(struct device *device, 1282 struct device_attribute *attr, 1283 const char *buf, size_t count) 1284 { 1285 int ret; 1286 unsigned int value; 1287 1288 ret = kstrtouint(buf, 10, &value); 1289 if (ret) 1290 return ret; 1291 1292 ret = zynqmp_pm_set_boot_health_status(value); 1293 if (ret) { 1294 dev_err(device, "unable to set healthy bit value to %u\n", 1295 value); 1296 return ret; 1297 } 1298 1299 return count; 1300 } 1301 1302 static DEVICE_ATTR_WO(health_status); 1303 1304 static ssize_t ggs_show(struct device *device, 1305 struct device_attribute *attr, 1306 char *buf, 1307 u32 reg) 1308 { 1309 int ret; 1310 u32 ret_payload[PAYLOAD_ARG_CNT]; 1311 1312 ret = zynqmp_pm_read_ggs(reg, ret_payload); 1313 if (ret) 1314 return ret; 1315 1316 return sprintf(buf, "0x%x\n", ret_payload[1]); 1317 } 1318 1319 static ssize_t ggs_store(struct device *device, 1320 struct device_attribute *attr, 1321 const char *buf, size_t count, 1322 u32 reg) 1323 { 1324 long value; 1325 int ret; 1326 1327 if (reg >= GSS_NUM_REGS) 1328 return -EINVAL; 1329 1330 ret = kstrtol(buf, 16, &value); 1331 if (ret) { 1332 count = -EFAULT; 1333 goto err; 1334 } 1335 1336 ret = zynqmp_pm_write_ggs(reg, value); 1337 if (ret) 1338 count = -EFAULT; 1339 err: 1340 return count; 1341 } 1342 1343 /* GGS register show functions */ 1344 #define GGS0_SHOW(N) \ 1345 ssize_t ggs##N##_show(struct device *device, \ 1346 struct device_attribute *attr, \ 1347 char *buf) \ 1348 { \ 1349 return ggs_show(device, attr, buf, N); \ 1350 } 1351 1352 static GGS0_SHOW(0); 1353 static GGS0_SHOW(1); 1354 static GGS0_SHOW(2); 1355 static GGS0_SHOW(3); 1356 1357 /* GGS register store function */ 1358 #define GGS0_STORE(N) \ 1359 ssize_t ggs##N##_store(struct device *device, \ 1360 struct device_attribute *attr, \ 1361 const char *buf, \ 1362 size_t count) \ 1363 { \ 1364 return ggs_store(device, attr, buf, count, N); \ 1365 } 1366 1367 static GGS0_STORE(0); 1368 static GGS0_STORE(1); 1369 static GGS0_STORE(2); 1370 static GGS0_STORE(3); 1371 1372 static ssize_t pggs_show(struct device *device, 1373 struct device_attribute *attr, 1374 char *buf, 1375 u32 reg) 1376 { 1377 int ret; 1378 u32 ret_payload[PAYLOAD_ARG_CNT]; 1379 1380 ret = zynqmp_pm_read_pggs(reg, ret_payload); 1381 if (ret) 1382 return ret; 1383 1384 return sprintf(buf, "0x%x\n", ret_payload[1]); 1385 } 1386 1387 static ssize_t pggs_store(struct device *device, 1388 struct device_attribute *attr, 1389 const char *buf, size_t count, 1390 u32 reg) 1391 { 1392 long value; 1393 int ret; 1394 1395 if (reg >= GSS_NUM_REGS) 1396 return -EINVAL; 1397 1398 ret = kstrtol(buf, 16, &value); 1399 if (ret) { 1400 count = -EFAULT; 1401 goto err; 1402 } 1403 1404 ret = zynqmp_pm_write_pggs(reg, value); 1405 if (ret) 1406 count = -EFAULT; 1407 1408 err: 1409 return count; 1410 } 1411 1412 #define PGGS0_SHOW(N) \ 1413 ssize_t pggs##N##_show(struct device *device, \ 1414 struct device_attribute *attr, \ 1415 char *buf) \ 1416 { \ 1417 return pggs_show(device, attr, buf, N); \ 1418 } 1419 1420 #define PGGS0_STORE(N) \ 1421 ssize_t pggs##N##_store(struct device *device, \ 1422 struct device_attribute *attr, \ 1423 const char *buf, \ 1424 size_t count) \ 1425 { \ 1426 return pggs_store(device, attr, buf, count, N); \ 1427 } 1428 1429 /* PGGS register show functions */ 1430 static PGGS0_SHOW(0); 1431 static PGGS0_SHOW(1); 1432 static PGGS0_SHOW(2); 1433 static PGGS0_SHOW(3); 1434 1435 /* PGGS register store functions */ 1436 static PGGS0_STORE(0); 1437 static PGGS0_STORE(1); 1438 static PGGS0_STORE(2); 1439 static PGGS0_STORE(3); 1440 1441 /* GGS register attributes */ 1442 static DEVICE_ATTR_RW(ggs0); 1443 static DEVICE_ATTR_RW(ggs1); 1444 static DEVICE_ATTR_RW(ggs2); 1445 static DEVICE_ATTR_RW(ggs3); 1446 1447 /* PGGS register attributes */ 1448 static DEVICE_ATTR_RW(pggs0); 1449 static DEVICE_ATTR_RW(pggs1); 1450 static DEVICE_ATTR_RW(pggs2); 1451 static DEVICE_ATTR_RW(pggs3); 1452 1453 static struct attribute *zynqmp_firmware_attrs[] = { 1454 &dev_attr_ggs0.attr, 1455 &dev_attr_ggs1.attr, 1456 &dev_attr_ggs2.attr, 1457 &dev_attr_ggs3.attr, 1458 &dev_attr_pggs0.attr, 1459 &dev_attr_pggs1.attr, 1460 &dev_attr_pggs2.attr, 1461 &dev_attr_pggs3.attr, 1462 &dev_attr_shutdown_scope.attr, 1463 &dev_attr_health_status.attr, 1464 NULL, 1465 }; 1466 1467 ATTRIBUTE_GROUPS(zynqmp_firmware); 1468 1469 static int zynqmp_firmware_probe(struct platform_device *pdev) 1470 { 1471 struct device *dev = &pdev->dev; 1472 struct device_node *np; 1473 int ret; 1474 1475 np = of_find_compatible_node(NULL, NULL, "xlnx,zynqmp"); 1476 if (!np) { 1477 np = of_find_compatible_node(NULL, NULL, "xlnx,versal"); 1478 if (!np) 1479 return 0; 1480 1481 feature_check_enabled = true; 1482 } 1483 of_node_put(np); 1484 1485 ret = get_set_conduit_method(dev->of_node); 1486 if (ret) 1487 return ret; 1488 1489 /* Check PM API version number */ 1490 ret = zynqmp_pm_get_api_version(&pm_api_version); 1491 if (ret) 1492 return ret; 1493 1494 if (pm_api_version < ZYNQMP_PM_VERSION) { 1495 panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n", 1496 __func__, 1497 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR, 1498 pm_api_version >> 16, pm_api_version & 0xFFFF); 1499 } 1500 1501 pr_info("%s Platform Management API v%d.%d\n", __func__, 1502 pm_api_version >> 16, pm_api_version & 0xFFFF); 1503 1504 /* Check trustzone version number */ 1505 ret = zynqmp_pm_get_trustzone_version(&pm_tz_version); 1506 if (ret) 1507 panic("Legacy trustzone found without version support\n"); 1508 1509 if (pm_tz_version < ZYNQMP_TZ_VERSION) 1510 panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n", 1511 __func__, 1512 ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR, 1513 pm_tz_version >> 16, pm_tz_version & 0xFFFF); 1514 1515 pr_info("%s Trustzone version v%d.%d\n", __func__, 1516 pm_tz_version >> 16, pm_tz_version & 0xFFFF); 1517 1518 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs, 1519 ARRAY_SIZE(firmware_devs), NULL, 0, NULL); 1520 if (ret) { 1521 dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret); 1522 return ret; 1523 } 1524 1525 zynqmp_pm_api_debugfs_init(); 1526 1527 np = of_find_compatible_node(NULL, NULL, "xlnx,versal"); 1528 if (np) { 1529 em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager", 1530 -1, NULL, 0); 1531 if (IS_ERR(em_dev)) 1532 dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n"); 1533 } 1534 of_node_put(np); 1535 1536 return of_platform_populate(dev->of_node, NULL, NULL, dev); 1537 } 1538 1539 static int zynqmp_firmware_remove(struct platform_device *pdev) 1540 { 1541 struct pm_api_feature_data *feature_data; 1542 struct hlist_node *tmp; 1543 int i; 1544 1545 mfd_remove_devices(&pdev->dev); 1546 zynqmp_pm_api_debugfs_exit(); 1547 1548 hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) { 1549 hash_del(&feature_data->hentry); 1550 kfree(feature_data); 1551 } 1552 1553 platform_device_unregister(em_dev); 1554 1555 return 0; 1556 } 1557 1558 static const struct of_device_id zynqmp_firmware_of_match[] = { 1559 {.compatible = "xlnx,zynqmp-firmware"}, 1560 {.compatible = "xlnx,versal-firmware"}, 1561 {}, 1562 }; 1563 MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match); 1564 1565 static struct platform_driver zynqmp_firmware_driver = { 1566 .driver = { 1567 .name = "zynqmp_firmware", 1568 .of_match_table = zynqmp_firmware_of_match, 1569 .dev_groups = zynqmp_firmware_groups, 1570 }, 1571 .probe = zynqmp_firmware_probe, 1572 .remove = zynqmp_firmware_remove, 1573 }; 1574 module_platform_driver(zynqmp_firmware_driver); 1575