1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Xilinx Zynq MPSoC Firmware layer 4 * 5 * Copyright (C) 2014-2021 Xilinx, Inc. 6 * 7 * Michal Simek <michal.simek@xilinx.com> 8 * Davorin Mista <davorin.mista@aggios.com> 9 * Jolly Shah <jollys@xilinx.com> 10 * Rajan Vaja <rajanv@xilinx.com> 11 */ 12 13 #include <linux/arm-smccc.h> 14 #include <linux/compiler.h> 15 #include <linux/device.h> 16 #include <linux/init.h> 17 #include <linux/mfd/core.h> 18 #include <linux/module.h> 19 #include <linux/of.h> 20 #include <linux/of_platform.h> 21 #include <linux/slab.h> 22 #include <linux/uaccess.h> 23 #include <linux/hashtable.h> 24 25 #include <linux/firmware/xlnx-zynqmp.h> 26 #include "zynqmp-debug.h" 27 28 /* Max HashMap Order for PM API feature check (1<<7 = 128) */ 29 #define PM_API_FEATURE_CHECK_MAX_ORDER 7 30 31 /* CRL registers and bitfields */ 32 #define CRL_APB_BASE 0xFF5E0000U 33 /* BOOT_PIN_CTRL- Used to control the mode pins after boot */ 34 #define CRL_APB_BOOT_PIN_CTRL (CRL_APB_BASE + (0x250U)) 35 /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */ 36 #define CRL_APB_BOOTPIN_CTRL_MASK 0xF0FU 37 38 static bool feature_check_enabled; 39 static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER); 40 41 /** 42 * struct pm_api_feature_data - PM API Feature data 43 * @pm_api_id: PM API Id, used as key to index into hashmap 44 * @feature_status: status of PM API feature: valid, invalid 45 * @hentry: hlist_node that hooks this entry into hashtable 46 */ 47 struct pm_api_feature_data { 48 u32 pm_api_id; 49 int feature_status; 50 struct hlist_node hentry; 51 }; 52 53 static const struct mfd_cell firmware_devs[] = { 54 { 55 .name = "zynqmp_power_controller", 56 }, 57 }; 58 59 /** 60 * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes 61 * @ret_status: PMUFW return code 62 * 63 * Return: corresponding Linux error code 64 */ 65 static int zynqmp_pm_ret_code(u32 ret_status) 66 { 67 switch (ret_status) { 68 case XST_PM_SUCCESS: 69 case XST_PM_DOUBLE_REQ: 70 return 0; 71 case XST_PM_NO_FEATURE: 72 return -ENOTSUPP; 73 case XST_PM_NO_ACCESS: 74 return -EACCES; 75 case XST_PM_ABORT_SUSPEND: 76 return -ECANCELED; 77 case XST_PM_MULT_USER: 78 return -EUSERS; 79 case XST_PM_INTERNAL: 80 case XST_PM_CONFLICT: 81 case XST_PM_INVALID_NODE: 82 default: 83 return -EINVAL; 84 } 85 } 86 87 static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2, 88 u32 *ret_payload) 89 { 90 return -ENODEV; 91 } 92 93 /* 94 * PM function call wrapper 95 * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration 96 */ 97 static int (*do_fw_call)(u64, u64, u64, u32 *ret_payload) = do_fw_call_fail; 98 99 /** 100 * do_fw_call_smc() - Call system-level platform management layer (SMC) 101 * @arg0: Argument 0 to SMC call 102 * @arg1: Argument 1 to SMC call 103 * @arg2: Argument 2 to SMC call 104 * @ret_payload: Returned value array 105 * 106 * Invoke platform management function via SMC call (no hypervisor present). 107 * 108 * Return: Returns status, either success or error+reason 109 */ 110 static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2, 111 u32 *ret_payload) 112 { 113 struct arm_smccc_res res; 114 115 arm_smccc_smc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res); 116 117 if (ret_payload) { 118 ret_payload[0] = lower_32_bits(res.a0); 119 ret_payload[1] = upper_32_bits(res.a0); 120 ret_payload[2] = lower_32_bits(res.a1); 121 ret_payload[3] = upper_32_bits(res.a1); 122 } 123 124 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0); 125 } 126 127 /** 128 * do_fw_call_hvc() - Call system-level platform management layer (HVC) 129 * @arg0: Argument 0 to HVC call 130 * @arg1: Argument 1 to HVC call 131 * @arg2: Argument 2 to HVC call 132 * @ret_payload: Returned value array 133 * 134 * Invoke platform management function via HVC 135 * HVC-based for communication through hypervisor 136 * (no direct communication with ATF). 137 * 138 * Return: Returns status, either success or error+reason 139 */ 140 static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2, 141 u32 *ret_payload) 142 { 143 struct arm_smccc_res res; 144 145 arm_smccc_hvc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res); 146 147 if (ret_payload) { 148 ret_payload[0] = lower_32_bits(res.a0); 149 ret_payload[1] = upper_32_bits(res.a0); 150 ret_payload[2] = lower_32_bits(res.a1); 151 ret_payload[3] = upper_32_bits(res.a1); 152 } 153 154 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0); 155 } 156 157 /** 158 * zynqmp_pm_feature() - Check weather given feature is supported or not 159 * @api_id: API ID to check 160 * 161 * Return: Returns status, either success or error+reason 162 */ 163 static int zynqmp_pm_feature(u32 api_id) 164 { 165 int ret; 166 u32 ret_payload[PAYLOAD_ARG_CNT]; 167 u64 smc_arg[2]; 168 struct pm_api_feature_data *feature_data; 169 170 if (!feature_check_enabled) 171 return 0; 172 173 /* Check for existing entry in hash table for given api */ 174 hash_for_each_possible(pm_api_features_map, feature_data, hentry, 175 api_id) { 176 if (feature_data->pm_api_id == api_id) 177 return feature_data->feature_status; 178 } 179 180 /* Add new entry if not present */ 181 feature_data = kmalloc(sizeof(*feature_data), GFP_KERNEL); 182 if (!feature_data) 183 return -ENOMEM; 184 185 feature_data->pm_api_id = api_id; 186 smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK; 187 smc_arg[1] = api_id; 188 189 ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload); 190 if (ret) 191 ret = -EOPNOTSUPP; 192 else 193 ret = ret_payload[1]; 194 195 feature_data->feature_status = ret; 196 hash_add(pm_api_features_map, &feature_data->hentry, api_id); 197 198 return ret; 199 } 200 201 /** 202 * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer 203 * caller function depending on the configuration 204 * @pm_api_id: Requested PM-API call 205 * @arg0: Argument 0 to requested PM-API call 206 * @arg1: Argument 1 to requested PM-API call 207 * @arg2: Argument 2 to requested PM-API call 208 * @arg3: Argument 3 to requested PM-API call 209 * @ret_payload: Returned value array 210 * 211 * Invoke platform management function for SMC or HVC call, depending on 212 * configuration. 213 * Following SMC Calling Convention (SMCCC) for SMC64: 214 * Pm Function Identifier, 215 * PM_SIP_SVC + PM_API_ID = 216 * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) 217 * ((SMC_64) << FUNCID_CC_SHIFT) 218 * ((SIP_START) << FUNCID_OEN_SHIFT) 219 * ((PM_API_ID) & FUNCID_NUM_MASK)) 220 * 221 * PM_SIP_SVC - Registered ZynqMP SIP Service Call. 222 * PM_API_ID - Platform Management API ID. 223 * 224 * Return: Returns status, either success or error+reason 225 */ 226 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, 227 u32 arg2, u32 arg3, u32 *ret_payload) 228 { 229 /* 230 * Added SIP service call Function Identifier 231 * Make sure to stay in x0 register 232 */ 233 u64 smc_arg[4]; 234 int ret; 235 236 /* Check if feature is supported or not */ 237 ret = zynqmp_pm_feature(pm_api_id); 238 if (ret < 0) 239 return ret; 240 241 smc_arg[0] = PM_SIP_SVC | pm_api_id; 242 smc_arg[1] = ((u64)arg1 << 32) | arg0; 243 smc_arg[2] = ((u64)arg3 << 32) | arg2; 244 245 return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], ret_payload); 246 } 247 248 static u32 pm_api_version; 249 static u32 pm_tz_version; 250 251 /** 252 * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware 253 * @version: Returned version value 254 * 255 * Return: Returns status, either success or error+reason 256 */ 257 int zynqmp_pm_get_api_version(u32 *version) 258 { 259 u32 ret_payload[PAYLOAD_ARG_CNT]; 260 int ret; 261 262 if (!version) 263 return -EINVAL; 264 265 /* Check is PM API version already verified */ 266 if (pm_api_version > 0) { 267 *version = pm_api_version; 268 return 0; 269 } 270 ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, ret_payload); 271 *version = ret_payload[1]; 272 273 return ret; 274 } 275 EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version); 276 277 /** 278 * zynqmp_pm_get_chipid - Get silicon ID registers 279 * @idcode: IDCODE register 280 * @version: version register 281 * 282 * Return: Returns the status of the operation and the idcode and version 283 * registers in @idcode and @version. 284 */ 285 int zynqmp_pm_get_chipid(u32 *idcode, u32 *version) 286 { 287 u32 ret_payload[PAYLOAD_ARG_CNT]; 288 int ret; 289 290 if (!idcode || !version) 291 return -EINVAL; 292 293 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload); 294 *idcode = ret_payload[1]; 295 *version = ret_payload[2]; 296 297 return ret; 298 } 299 EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid); 300 301 /** 302 * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version 303 * @version: Returned version value 304 * 305 * Return: Returns status, either success or error+reason 306 */ 307 static int zynqmp_pm_get_trustzone_version(u32 *version) 308 { 309 u32 ret_payload[PAYLOAD_ARG_CNT]; 310 int ret; 311 312 if (!version) 313 return -EINVAL; 314 315 /* Check is PM trustzone version already verified */ 316 if (pm_tz_version > 0) { 317 *version = pm_tz_version; 318 return 0; 319 } 320 ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, 0, 0, 321 0, 0, ret_payload); 322 *version = ret_payload[1]; 323 324 return ret; 325 } 326 327 /** 328 * get_set_conduit_method() - Choose SMC or HVC based communication 329 * @np: Pointer to the device_node structure 330 * 331 * Use SMC or HVC-based functions to communicate with EL2/EL3. 332 * 333 * Return: Returns 0 on success or error code 334 */ 335 static int get_set_conduit_method(struct device_node *np) 336 { 337 const char *method; 338 339 if (of_property_read_string(np, "method", &method)) { 340 pr_warn("%s missing \"method\" property\n", __func__); 341 return -ENXIO; 342 } 343 344 if (!strcmp("hvc", method)) { 345 do_fw_call = do_fw_call_hvc; 346 } else if (!strcmp("smc", method)) { 347 do_fw_call = do_fw_call_smc; 348 } else { 349 pr_warn("%s Invalid \"method\" property: %s\n", 350 __func__, method); 351 return -EINVAL; 352 } 353 354 return 0; 355 } 356 357 /** 358 * zynqmp_pm_query_data() - Get query data from firmware 359 * @qdata: Variable to the zynqmp_pm_query_data structure 360 * @out: Returned output value 361 * 362 * Return: Returns status, either success or error+reason 363 */ 364 int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out) 365 { 366 int ret; 367 368 ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, qdata.qid, qdata.arg1, 369 qdata.arg2, qdata.arg3, out); 370 371 /* 372 * For clock name query, all bytes in SMC response are clock name 373 * characters and return code is always success. For invalid clocks, 374 * clock name bytes would be zeros. 375 */ 376 return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret; 377 } 378 EXPORT_SYMBOL_GPL(zynqmp_pm_query_data); 379 380 /** 381 * zynqmp_pm_clock_enable() - Enable the clock for given id 382 * @clock_id: ID of the clock to be enabled 383 * 384 * This function is used by master to enable the clock 385 * including peripherals and PLL clocks. 386 * 387 * Return: Returns status, either success or error+reason 388 */ 389 int zynqmp_pm_clock_enable(u32 clock_id) 390 { 391 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL); 392 } 393 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable); 394 395 /** 396 * zynqmp_pm_clock_disable() - Disable the clock for given id 397 * @clock_id: ID of the clock to be disable 398 * 399 * This function is used by master to disable the clock 400 * including peripherals and PLL clocks. 401 * 402 * Return: Returns status, either success or error+reason 403 */ 404 int zynqmp_pm_clock_disable(u32 clock_id) 405 { 406 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL); 407 } 408 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable); 409 410 /** 411 * zynqmp_pm_clock_getstate() - Get the clock state for given id 412 * @clock_id: ID of the clock to be queried 413 * @state: 1/0 (Enabled/Disabled) 414 * 415 * This function is used by master to get the state of clock 416 * including peripherals and PLL clocks. 417 * 418 * Return: Returns status, either success or error+reason 419 */ 420 int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state) 421 { 422 u32 ret_payload[PAYLOAD_ARG_CNT]; 423 int ret; 424 425 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, clock_id, 0, 426 0, 0, ret_payload); 427 *state = ret_payload[1]; 428 429 return ret; 430 } 431 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate); 432 433 /** 434 * zynqmp_pm_clock_setdivider() - Set the clock divider for given id 435 * @clock_id: ID of the clock 436 * @divider: divider value 437 * 438 * This function is used by master to set divider for any clock 439 * to achieve desired rate. 440 * 441 * Return: Returns status, either success or error+reason 442 */ 443 int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider) 444 { 445 return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider, 446 0, 0, NULL); 447 } 448 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider); 449 450 /** 451 * zynqmp_pm_clock_getdivider() - Get the clock divider for given id 452 * @clock_id: ID of the clock 453 * @divider: divider value 454 * 455 * This function is used by master to get divider values 456 * for any clock. 457 * 458 * Return: Returns status, either success or error+reason 459 */ 460 int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider) 461 { 462 u32 ret_payload[PAYLOAD_ARG_CNT]; 463 int ret; 464 465 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, clock_id, 0, 466 0, 0, ret_payload); 467 *divider = ret_payload[1]; 468 469 return ret; 470 } 471 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider); 472 473 /** 474 * zynqmp_pm_clock_setrate() - Set the clock rate for given id 475 * @clock_id: ID of the clock 476 * @rate: rate value in hz 477 * 478 * This function is used by master to set rate for any clock. 479 * 480 * Return: Returns status, either success or error+reason 481 */ 482 int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate) 483 { 484 return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id, 485 lower_32_bits(rate), 486 upper_32_bits(rate), 487 0, NULL); 488 } 489 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate); 490 491 /** 492 * zynqmp_pm_clock_getrate() - Get the clock rate for given id 493 * @clock_id: ID of the clock 494 * @rate: rate value in hz 495 * 496 * This function is used by master to get rate 497 * for any clock. 498 * 499 * Return: Returns status, either success or error+reason 500 */ 501 int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate) 502 { 503 u32 ret_payload[PAYLOAD_ARG_CNT]; 504 int ret; 505 506 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, clock_id, 0, 507 0, 0, ret_payload); 508 *rate = ((u64)ret_payload[2] << 32) | ret_payload[1]; 509 510 return ret; 511 } 512 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate); 513 514 /** 515 * zynqmp_pm_clock_setparent() - Set the clock parent for given id 516 * @clock_id: ID of the clock 517 * @parent_id: parent id 518 * 519 * This function is used by master to set parent for any clock. 520 * 521 * Return: Returns status, either success or error+reason 522 */ 523 int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) 524 { 525 return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id, 526 parent_id, 0, 0, NULL); 527 } 528 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent); 529 530 /** 531 * zynqmp_pm_clock_getparent() - Get the clock parent for given id 532 * @clock_id: ID of the clock 533 * @parent_id: parent id 534 * 535 * This function is used by master to get parent index 536 * for any clock. 537 * 538 * Return: Returns status, either success or error+reason 539 */ 540 int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) 541 { 542 u32 ret_payload[PAYLOAD_ARG_CNT]; 543 int ret; 544 545 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, clock_id, 0, 546 0, 0, ret_payload); 547 *parent_id = ret_payload[1]; 548 549 return ret; 550 } 551 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent); 552 553 /** 554 * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode 555 * 556 * @clk_id: PLL clock ID 557 * @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT) 558 * 559 * This function sets PLL mode 560 * 561 * Return: Returns status, either success or error+reason 562 */ 563 int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode) 564 { 565 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_MODE, 566 clk_id, mode, NULL); 567 } 568 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode); 569 570 /** 571 * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode 572 * 573 * @clk_id: PLL clock ID 574 * @mode: PLL mode 575 * 576 * This function return current PLL mode 577 * 578 * Return: Returns status, either success or error+reason 579 */ 580 int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode) 581 { 582 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_MODE, 583 clk_id, 0, mode); 584 } 585 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode); 586 587 /** 588 * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data 589 * 590 * @clk_id: PLL clock ID 591 * @data: fraction data 592 * 593 * This function sets fraction data. 594 * It is valid for fraction mode only. 595 * 596 * Return: Returns status, either success or error+reason 597 */ 598 int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data) 599 { 600 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_DATA, 601 clk_id, data, NULL); 602 } 603 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data); 604 605 /** 606 * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data 607 * 608 * @clk_id: PLL clock ID 609 * @data: fraction data 610 * 611 * This function returns fraction data value. 612 * 613 * Return: Returns status, either success or error+reason 614 */ 615 int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data) 616 { 617 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_DATA, 618 clk_id, 0, data); 619 } 620 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data); 621 622 /** 623 * zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device 624 * 625 * @node_id: Node ID of the device 626 * @type: Type of tap delay to set (input/output) 627 * @value: Value to set fot the tap delay 628 * 629 * This function sets input/output tap delay for the SD device. 630 * 631 * Return: Returns status, either success or error+reason 632 */ 633 int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value) 634 { 635 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, 636 type, value, NULL); 637 } 638 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay); 639 640 /** 641 * zynqmp_pm_sd_dll_reset() - Reset DLL logic 642 * 643 * @node_id: Node ID of the device 644 * @type: Reset type 645 * 646 * This function resets DLL logic for the SD device. 647 * 648 * Return: Returns status, either success or error+reason 649 */ 650 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type) 651 { 652 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET, 653 type, 0, NULL); 654 } 655 EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset); 656 657 /** 658 * zynqmp_pm_ospi_mux_select() - OSPI Mux selection 659 * 660 * @dev_id: Device Id of the OSPI device. 661 * @select: OSPI Mux select value. 662 * 663 * This function select the OSPI Mux. 664 * 665 * Return: Returns status, either success or error+reason 666 */ 667 int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select) 668 { 669 return zynqmp_pm_invoke_fn(PM_IOCTL, dev_id, IOCTL_OSPI_MUX_SELECT, 670 select, 0, NULL); 671 } 672 EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select); 673 674 /** 675 * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs) 676 * @index: GGS register index 677 * @value: Register value to be written 678 * 679 * This function writes value to GGS register. 680 * 681 * Return: Returns status, either success or error+reason 682 */ 683 int zynqmp_pm_write_ggs(u32 index, u32 value) 684 { 685 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS, 686 index, value, NULL); 687 } 688 EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs); 689 690 /** 691 * zynqmp_pm_read_ggs() - PM API for reading global general storage (ggs) 692 * @index: GGS register index 693 * @value: Register value to be written 694 * 695 * This function returns GGS register value. 696 * 697 * Return: Returns status, either success or error+reason 698 */ 699 int zynqmp_pm_read_ggs(u32 index, u32 *value) 700 { 701 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS, 702 index, 0, value); 703 } 704 EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs); 705 706 /** 707 * zynqmp_pm_write_pggs() - PM API for writing persistent global general 708 * storage (pggs) 709 * @index: PGGS register index 710 * @value: Register value to be written 711 * 712 * This function writes value to PGGS register. 713 * 714 * Return: Returns status, either success or error+reason 715 */ 716 int zynqmp_pm_write_pggs(u32 index, u32 value) 717 { 718 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value, 719 NULL); 720 } 721 EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs); 722 723 /** 724 * zynqmp_pm_read_pggs() - PM API for reading persistent global general 725 * storage (pggs) 726 * @index: PGGS register index 727 * @value: Register value to be written 728 * 729 * This function returns PGGS register value. 730 * 731 * Return: Returns status, either success or error+reason 732 */ 733 int zynqmp_pm_read_pggs(u32 index, u32 *value) 734 { 735 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0, 736 value); 737 } 738 EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs); 739 740 /** 741 * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status 742 * @value: Status value to be written 743 * 744 * This function sets healthy bit value to indicate boot health status 745 * to firmware. 746 * 747 * Return: Returns status, either success or error+reason 748 */ 749 int zynqmp_pm_set_boot_health_status(u32 value) 750 { 751 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS, 752 value, 0, NULL); 753 } 754 755 /** 756 * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release) 757 * @reset: Reset to be configured 758 * @assert_flag: Flag stating should reset be asserted (1) or 759 * released (0) 760 * 761 * Return: Returns status, either success or error+reason 762 */ 763 int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset, 764 const enum zynqmp_pm_reset_action assert_flag) 765 { 766 return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag, 767 0, 0, NULL); 768 } 769 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert); 770 771 /** 772 * zynqmp_pm_reset_get_status - Get status of the reset 773 * @reset: Reset whose status should be returned 774 * @status: Returned status 775 * 776 * Return: Returns status, either success or error+reason 777 */ 778 int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status) 779 { 780 u32 ret_payload[PAYLOAD_ARG_CNT]; 781 int ret; 782 783 if (!status) 784 return -EINVAL; 785 786 ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, reset, 0, 787 0, 0, ret_payload); 788 *status = ret_payload[1]; 789 790 return ret; 791 } 792 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status); 793 794 /** 795 * zynqmp_pm_fpga_load - Perform the fpga load 796 * @address: Address to write to 797 * @size: pl bitstream size 798 * @flags: Bitstream type 799 * -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration 800 * -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration 801 * 802 * This function provides access to pmufw. To transfer 803 * the required bitstream into PL. 804 * 805 * Return: Returns status, either success or error+reason 806 */ 807 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags) 808 { 809 return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address), 810 upper_32_bits(address), size, flags, NULL); 811 } 812 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load); 813 814 /** 815 * zynqmp_pm_fpga_get_status - Read value from PCAP status register 816 * @value: Value to read 817 * 818 * This function provides access to the pmufw to get the PCAP 819 * status 820 * 821 * Return: Returns status, either success or error+reason 822 */ 823 int zynqmp_pm_fpga_get_status(u32 *value) 824 { 825 u32 ret_payload[PAYLOAD_ARG_CNT]; 826 int ret; 827 828 if (!value) 829 return -EINVAL; 830 831 ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload); 832 *value = ret_payload[1]; 833 834 return ret; 835 } 836 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status); 837 838 /** 839 * zynqmp_pm_pinctrl_request - Request Pin from firmware 840 * @pin: Pin number to request 841 * 842 * This function requests pin from firmware. 843 * 844 * Return: Returns status, either success or error+reason. 845 */ 846 int zynqmp_pm_pinctrl_request(const u32 pin) 847 { 848 return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, pin, 0, 0, 0, NULL); 849 } 850 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request); 851 852 /** 853 * zynqmp_pm_pinctrl_release - Inform firmware that Pin control is released 854 * @pin: Pin number to release 855 * 856 * This function release pin from firmware. 857 * 858 * Return: Returns status, either success or error+reason. 859 */ 860 int zynqmp_pm_pinctrl_release(const u32 pin) 861 { 862 return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, pin, 0, 0, 0, NULL); 863 } 864 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release); 865 866 /** 867 * zynqmp_pm_pinctrl_get_function - Read function id set for the given pin 868 * @pin: Pin number 869 * @id: Buffer to store function ID 870 * 871 * This function provides the function currently set for the given pin. 872 * 873 * Return: Returns status, either success or error+reason 874 */ 875 int zynqmp_pm_pinctrl_get_function(const u32 pin, u32 *id) 876 { 877 u32 ret_payload[PAYLOAD_ARG_CNT]; 878 int ret; 879 880 if (!id) 881 return -EINVAL; 882 883 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_GET_FUNCTION, pin, 0, 884 0, 0, ret_payload); 885 *id = ret_payload[1]; 886 887 return ret; 888 } 889 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_function); 890 891 /** 892 * zynqmp_pm_pinctrl_set_function - Set requested function for the pin 893 * @pin: Pin number 894 * @id: Function ID to set 895 * 896 * This function sets requested function for the given pin. 897 * 898 * Return: Returns status, either success or error+reason. 899 */ 900 int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id) 901 { 902 return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, pin, id, 903 0, 0, NULL); 904 } 905 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function); 906 907 /** 908 * zynqmp_pm_pinctrl_get_config - Get configuration parameter for the pin 909 * @pin: Pin number 910 * @param: Parameter to get 911 * @value: Buffer to store parameter value 912 * 913 * This function gets requested configuration parameter for the given pin. 914 * 915 * Return: Returns status, either success or error+reason. 916 */ 917 int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param, 918 u32 *value) 919 { 920 u32 ret_payload[PAYLOAD_ARG_CNT]; 921 int ret; 922 923 if (!value) 924 return -EINVAL; 925 926 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, pin, param, 927 0, 0, ret_payload); 928 *value = ret_payload[1]; 929 930 return ret; 931 } 932 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_config); 933 934 /** 935 * zynqmp_pm_pinctrl_set_config - Set configuration parameter for the pin 936 * @pin: Pin number 937 * @param: Parameter to set 938 * @value: Parameter value to set 939 * 940 * This function sets requested configuration parameter for the given pin. 941 * 942 * Return: Returns status, either success or error+reason. 943 */ 944 int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param, 945 u32 value) 946 { 947 return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, pin, 948 param, value, 0, NULL); 949 } 950 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config); 951 952 /** 953 * zynqmp_pm_bootmode_read() - PM Config API for read bootpin status 954 * @ps_mode: Returned output value of ps_mode 955 * 956 * This API function is to be used for notify the power management controller 957 * to read bootpin status. 958 * 959 * Return: status, either success or error+reason 960 */ 961 unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode) 962 { 963 unsigned int ret; 964 u32 ret_payload[PAYLOAD_ARG_CNT]; 965 966 ret = zynqmp_pm_invoke_fn(PM_MMIO_READ, CRL_APB_BOOT_PIN_CTRL, 0, 967 0, 0, ret_payload); 968 969 *ps_mode = ret_payload[1]; 970 971 return ret; 972 } 973 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_read); 974 975 /** 976 * zynqmp_pm_bootmode_write() - PM Config API for Configure bootpin 977 * @ps_mode: Value to be written to the bootpin ctrl register 978 * 979 * This API function is to be used for notify the power management controller 980 * to configure bootpin. 981 * 982 * Return: Returns status, either success or error+reason 983 */ 984 int zynqmp_pm_bootmode_write(u32 ps_mode) 985 { 986 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, CRL_APB_BOOT_PIN_CTRL, 987 CRL_APB_BOOTPIN_CTRL_MASK, ps_mode, 0, NULL); 988 } 989 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write); 990 991 /** 992 * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller 993 * master has initialized its own power management 994 * 995 * Return: Returns status, either success or error+reason 996 * 997 * This API function is to be used for notify the power management controller 998 * about the completed power management initialization. 999 */ 1000 int zynqmp_pm_init_finalize(void) 1001 { 1002 return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL); 1003 } 1004 EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize); 1005 1006 /** 1007 * zynqmp_pm_set_suspend_mode() - Set system suspend mode 1008 * @mode: Mode to set for system suspend 1009 * 1010 * This API function is used to set mode of system suspend. 1011 * 1012 * Return: Returns status, either success or error+reason 1013 */ 1014 int zynqmp_pm_set_suspend_mode(u32 mode) 1015 { 1016 return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL); 1017 } 1018 EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode); 1019 1020 /** 1021 * zynqmp_pm_request_node() - Request a node with specific capabilities 1022 * @node: Node ID of the slave 1023 * @capabilities: Requested capabilities of the slave 1024 * @qos: Quality of service (not supported) 1025 * @ack: Flag to specify whether acknowledge is requested 1026 * 1027 * This function is used by master to request particular node from firmware. 1028 * Every master must request node before using it. 1029 * 1030 * Return: Returns status, either success or error+reason 1031 */ 1032 int zynqmp_pm_request_node(const u32 node, const u32 capabilities, 1033 const u32 qos, const enum zynqmp_pm_request_ack ack) 1034 { 1035 return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities, 1036 qos, ack, NULL); 1037 } 1038 EXPORT_SYMBOL_GPL(zynqmp_pm_request_node); 1039 1040 /** 1041 * zynqmp_pm_release_node() - Release a node 1042 * @node: Node ID of the slave 1043 * 1044 * This function is used by master to inform firmware that master 1045 * has released node. Once released, master must not use that node 1046 * without re-request. 1047 * 1048 * Return: Returns status, either success or error+reason 1049 */ 1050 int zynqmp_pm_release_node(const u32 node) 1051 { 1052 return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL); 1053 } 1054 EXPORT_SYMBOL_GPL(zynqmp_pm_release_node); 1055 1056 /** 1057 * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves 1058 * @node: Node ID of the slave 1059 * @capabilities: Requested capabilities of the slave 1060 * @qos: Quality of service (not supported) 1061 * @ack: Flag to specify whether acknowledge is requested 1062 * 1063 * This API function is to be used for slaves a PU already has requested 1064 * to change its capabilities. 1065 * 1066 * Return: Returns status, either success or error+reason 1067 */ 1068 int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, 1069 const u32 qos, 1070 const enum zynqmp_pm_request_ack ack) 1071 { 1072 return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities, 1073 qos, ack, NULL); 1074 } 1075 EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement); 1076 1077 /** 1078 * zynqmp_pm_load_pdi - Load and process PDI 1079 * @src: Source device where PDI is located 1080 * @address: PDI src address 1081 * 1082 * This function provides support to load PDI from linux 1083 * 1084 * Return: Returns status, either success or error+reason 1085 */ 1086 int zynqmp_pm_load_pdi(const u32 src, const u64 address) 1087 { 1088 return zynqmp_pm_invoke_fn(PM_LOAD_PDI, src, 1089 lower_32_bits(address), 1090 upper_32_bits(address), 0, NULL); 1091 } 1092 EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi); 1093 1094 /** 1095 * zynqmp_pm_aes_engine - Access AES hardware to encrypt/decrypt the data using 1096 * AES-GCM core. 1097 * @address: Address of the AesParams structure. 1098 * @out: Returned output value 1099 * 1100 * Return: Returns status, either success or error code. 1101 */ 1102 int zynqmp_pm_aes_engine(const u64 address, u32 *out) 1103 { 1104 u32 ret_payload[PAYLOAD_ARG_CNT]; 1105 int ret; 1106 1107 if (!out) 1108 return -EINVAL; 1109 1110 ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address), 1111 lower_32_bits(address), 1112 0, 0, ret_payload); 1113 *out = ret_payload[1]; 1114 1115 return ret; 1116 } 1117 EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine); 1118 1119 /** 1120 * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart 1121 * @type: Shutdown or restart? 0 for shutdown, 1 for restart 1122 * @subtype: Specifies which system should be restarted or shut down 1123 * 1124 * Return: Returns status, either success or error+reason 1125 */ 1126 int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype) 1127 { 1128 return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, type, subtype, 1129 0, 0, NULL); 1130 } 1131 1132 /** 1133 * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope 1134 * @subtype: Shutdown subtype 1135 * @name: Matching string for scope argument 1136 * 1137 * This struct encapsulates mapping between shutdown scope ID and string. 1138 */ 1139 struct zynqmp_pm_shutdown_scope { 1140 const enum zynqmp_pm_shutdown_subtype subtype; 1141 const char *name; 1142 }; 1143 1144 static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = { 1145 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = { 1146 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM, 1147 .name = "subsystem", 1148 }, 1149 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = { 1150 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY, 1151 .name = "ps_only", 1152 }, 1153 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = { 1154 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM, 1155 .name = "system", 1156 }, 1157 }; 1158 1159 static struct zynqmp_pm_shutdown_scope *selected_scope = 1160 &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM]; 1161 1162 /** 1163 * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid 1164 * @scope_string: Shutdown scope string 1165 * 1166 * Return: Return pointer to matching shutdown scope struct from 1167 * array of available options in system if string is valid, 1168 * otherwise returns NULL. 1169 */ 1170 static struct zynqmp_pm_shutdown_scope* 1171 zynqmp_pm_is_shutdown_scope_valid(const char *scope_string) 1172 { 1173 int count; 1174 1175 for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++) 1176 if (sysfs_streq(scope_string, shutdown_scopes[count].name)) 1177 return &shutdown_scopes[count]; 1178 1179 return NULL; 1180 } 1181 1182 static ssize_t shutdown_scope_show(struct device *device, 1183 struct device_attribute *attr, 1184 char *buf) 1185 { 1186 int i; 1187 1188 for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) { 1189 if (&shutdown_scopes[i] == selected_scope) { 1190 strcat(buf, "["); 1191 strcat(buf, shutdown_scopes[i].name); 1192 strcat(buf, "]"); 1193 } else { 1194 strcat(buf, shutdown_scopes[i].name); 1195 } 1196 strcat(buf, " "); 1197 } 1198 strcat(buf, "\n"); 1199 1200 return strlen(buf); 1201 } 1202 1203 static ssize_t shutdown_scope_store(struct device *device, 1204 struct device_attribute *attr, 1205 const char *buf, size_t count) 1206 { 1207 int ret; 1208 struct zynqmp_pm_shutdown_scope *scope; 1209 1210 scope = zynqmp_pm_is_shutdown_scope_valid(buf); 1211 if (!scope) 1212 return -EINVAL; 1213 1214 ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY, 1215 scope->subtype); 1216 if (ret) { 1217 pr_err("unable to set shutdown scope %s\n", buf); 1218 return ret; 1219 } 1220 1221 selected_scope = scope; 1222 1223 return count; 1224 } 1225 1226 static DEVICE_ATTR_RW(shutdown_scope); 1227 1228 static ssize_t health_status_store(struct device *device, 1229 struct device_attribute *attr, 1230 const char *buf, size_t count) 1231 { 1232 int ret; 1233 unsigned int value; 1234 1235 ret = kstrtouint(buf, 10, &value); 1236 if (ret) 1237 return ret; 1238 1239 ret = zynqmp_pm_set_boot_health_status(value); 1240 if (ret) { 1241 dev_err(device, "unable to set healthy bit value to %u\n", 1242 value); 1243 return ret; 1244 } 1245 1246 return count; 1247 } 1248 1249 static DEVICE_ATTR_WO(health_status); 1250 1251 static ssize_t ggs_show(struct device *device, 1252 struct device_attribute *attr, 1253 char *buf, 1254 u32 reg) 1255 { 1256 int ret; 1257 u32 ret_payload[PAYLOAD_ARG_CNT]; 1258 1259 ret = zynqmp_pm_read_ggs(reg, ret_payload); 1260 if (ret) 1261 return ret; 1262 1263 return sprintf(buf, "0x%x\n", ret_payload[1]); 1264 } 1265 1266 static ssize_t ggs_store(struct device *device, 1267 struct device_attribute *attr, 1268 const char *buf, size_t count, 1269 u32 reg) 1270 { 1271 long value; 1272 int ret; 1273 1274 if (reg >= GSS_NUM_REGS) 1275 return -EINVAL; 1276 1277 ret = kstrtol(buf, 16, &value); 1278 if (ret) { 1279 count = -EFAULT; 1280 goto err; 1281 } 1282 1283 ret = zynqmp_pm_write_ggs(reg, value); 1284 if (ret) 1285 count = -EFAULT; 1286 err: 1287 return count; 1288 } 1289 1290 /* GGS register show functions */ 1291 #define GGS0_SHOW(N) \ 1292 ssize_t ggs##N##_show(struct device *device, \ 1293 struct device_attribute *attr, \ 1294 char *buf) \ 1295 { \ 1296 return ggs_show(device, attr, buf, N); \ 1297 } 1298 1299 static GGS0_SHOW(0); 1300 static GGS0_SHOW(1); 1301 static GGS0_SHOW(2); 1302 static GGS0_SHOW(3); 1303 1304 /* GGS register store function */ 1305 #define GGS0_STORE(N) \ 1306 ssize_t ggs##N##_store(struct device *device, \ 1307 struct device_attribute *attr, \ 1308 const char *buf, \ 1309 size_t count) \ 1310 { \ 1311 return ggs_store(device, attr, buf, count, N); \ 1312 } 1313 1314 static GGS0_STORE(0); 1315 static GGS0_STORE(1); 1316 static GGS0_STORE(2); 1317 static GGS0_STORE(3); 1318 1319 static ssize_t pggs_show(struct device *device, 1320 struct device_attribute *attr, 1321 char *buf, 1322 u32 reg) 1323 { 1324 int ret; 1325 u32 ret_payload[PAYLOAD_ARG_CNT]; 1326 1327 ret = zynqmp_pm_read_pggs(reg, ret_payload); 1328 if (ret) 1329 return ret; 1330 1331 return sprintf(buf, "0x%x\n", ret_payload[1]); 1332 } 1333 1334 static ssize_t pggs_store(struct device *device, 1335 struct device_attribute *attr, 1336 const char *buf, size_t count, 1337 u32 reg) 1338 { 1339 long value; 1340 int ret; 1341 1342 if (reg >= GSS_NUM_REGS) 1343 return -EINVAL; 1344 1345 ret = kstrtol(buf, 16, &value); 1346 if (ret) { 1347 count = -EFAULT; 1348 goto err; 1349 } 1350 1351 ret = zynqmp_pm_write_pggs(reg, value); 1352 if (ret) 1353 count = -EFAULT; 1354 1355 err: 1356 return count; 1357 } 1358 1359 #define PGGS0_SHOW(N) \ 1360 ssize_t pggs##N##_show(struct device *device, \ 1361 struct device_attribute *attr, \ 1362 char *buf) \ 1363 { \ 1364 return pggs_show(device, attr, buf, N); \ 1365 } 1366 1367 #define PGGS0_STORE(N) \ 1368 ssize_t pggs##N##_store(struct device *device, \ 1369 struct device_attribute *attr, \ 1370 const char *buf, \ 1371 size_t count) \ 1372 { \ 1373 return pggs_store(device, attr, buf, count, N); \ 1374 } 1375 1376 /* PGGS register show functions */ 1377 static PGGS0_SHOW(0); 1378 static PGGS0_SHOW(1); 1379 static PGGS0_SHOW(2); 1380 static PGGS0_SHOW(3); 1381 1382 /* PGGS register store functions */ 1383 static PGGS0_STORE(0); 1384 static PGGS0_STORE(1); 1385 static PGGS0_STORE(2); 1386 static PGGS0_STORE(3); 1387 1388 /* GGS register attributes */ 1389 static DEVICE_ATTR_RW(ggs0); 1390 static DEVICE_ATTR_RW(ggs1); 1391 static DEVICE_ATTR_RW(ggs2); 1392 static DEVICE_ATTR_RW(ggs3); 1393 1394 /* PGGS register attributes */ 1395 static DEVICE_ATTR_RW(pggs0); 1396 static DEVICE_ATTR_RW(pggs1); 1397 static DEVICE_ATTR_RW(pggs2); 1398 static DEVICE_ATTR_RW(pggs3); 1399 1400 static struct attribute *zynqmp_firmware_attrs[] = { 1401 &dev_attr_ggs0.attr, 1402 &dev_attr_ggs1.attr, 1403 &dev_attr_ggs2.attr, 1404 &dev_attr_ggs3.attr, 1405 &dev_attr_pggs0.attr, 1406 &dev_attr_pggs1.attr, 1407 &dev_attr_pggs2.attr, 1408 &dev_attr_pggs3.attr, 1409 &dev_attr_shutdown_scope.attr, 1410 &dev_attr_health_status.attr, 1411 NULL, 1412 }; 1413 1414 ATTRIBUTE_GROUPS(zynqmp_firmware); 1415 1416 static int zynqmp_firmware_probe(struct platform_device *pdev) 1417 { 1418 struct device *dev = &pdev->dev; 1419 struct device_node *np; 1420 int ret; 1421 1422 np = of_find_compatible_node(NULL, NULL, "xlnx,zynqmp"); 1423 if (!np) { 1424 np = of_find_compatible_node(NULL, NULL, "xlnx,versal"); 1425 if (!np) 1426 return 0; 1427 1428 feature_check_enabled = true; 1429 } 1430 of_node_put(np); 1431 1432 ret = get_set_conduit_method(dev->of_node); 1433 if (ret) 1434 return ret; 1435 1436 /* Check PM API version number */ 1437 zynqmp_pm_get_api_version(&pm_api_version); 1438 if (pm_api_version < ZYNQMP_PM_VERSION) { 1439 panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n", 1440 __func__, 1441 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR, 1442 pm_api_version >> 16, pm_api_version & 0xFFFF); 1443 } 1444 1445 pr_info("%s Platform Management API v%d.%d\n", __func__, 1446 pm_api_version >> 16, pm_api_version & 0xFFFF); 1447 1448 /* Check trustzone version number */ 1449 ret = zynqmp_pm_get_trustzone_version(&pm_tz_version); 1450 if (ret) 1451 panic("Legacy trustzone found without version support\n"); 1452 1453 if (pm_tz_version < ZYNQMP_TZ_VERSION) 1454 panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n", 1455 __func__, 1456 ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR, 1457 pm_tz_version >> 16, pm_tz_version & 0xFFFF); 1458 1459 pr_info("%s Trustzone version v%d.%d\n", __func__, 1460 pm_tz_version >> 16, pm_tz_version & 0xFFFF); 1461 1462 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs, 1463 ARRAY_SIZE(firmware_devs), NULL, 0, NULL); 1464 if (ret) { 1465 dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret); 1466 return ret; 1467 } 1468 1469 zynqmp_pm_api_debugfs_init(); 1470 1471 return of_platform_populate(dev->of_node, NULL, NULL, dev); 1472 } 1473 1474 static int zynqmp_firmware_remove(struct platform_device *pdev) 1475 { 1476 struct pm_api_feature_data *feature_data; 1477 struct hlist_node *tmp; 1478 int i; 1479 1480 mfd_remove_devices(&pdev->dev); 1481 zynqmp_pm_api_debugfs_exit(); 1482 1483 hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) { 1484 hash_del(&feature_data->hentry); 1485 kfree(feature_data); 1486 } 1487 1488 return 0; 1489 } 1490 1491 static const struct of_device_id zynqmp_firmware_of_match[] = { 1492 {.compatible = "xlnx,zynqmp-firmware"}, 1493 {.compatible = "xlnx,versal-firmware"}, 1494 {}, 1495 }; 1496 MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match); 1497 1498 static struct platform_driver zynqmp_firmware_driver = { 1499 .driver = { 1500 .name = "zynqmp_firmware", 1501 .of_match_table = zynqmp_firmware_of_match, 1502 .dev_groups = zynqmp_firmware_groups, 1503 }, 1504 .probe = zynqmp_firmware_probe, 1505 .remove = zynqmp_firmware_remove, 1506 }; 1507 module_platform_driver(zynqmp_firmware_driver); 1508