xref: /openbmc/linux/drivers/firmware/xilinx/zynqmp.c (revision 5efb685b)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Xilinx Zynq MPSoC Firmware layer
4  *
5  *  Copyright (C) 2014-2022 Xilinx, Inc.
6  *
7  *  Michal Simek <michal.simek@xilinx.com>
8  *  Davorin Mista <davorin.mista@aggios.com>
9  *  Jolly Shah <jollys@xilinx.com>
10  *  Rajan Vaja <rajanv@xilinx.com>
11  */
12 
13 #include <linux/arm-smccc.h>
14 #include <linux/compiler.h>
15 #include <linux/device.h>
16 #include <linux/init.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_platform.h>
21 #include <linux/slab.h>
22 #include <linux/uaccess.h>
23 #include <linux/hashtable.h>
24 
25 #include <linux/firmware/xlnx-zynqmp.h>
26 #include <linux/firmware/xlnx-event-manager.h>
27 #include "zynqmp-debug.h"
28 
29 /* Max HashMap Order for PM API feature check (1<<7 = 128) */
30 #define PM_API_FEATURE_CHECK_MAX_ORDER  7
31 
32 /* CRL registers and bitfields */
33 #define CRL_APB_BASE			0xFF5E0000U
34 /* BOOT_PIN_CTRL- Used to control the mode pins after boot */
35 #define CRL_APB_BOOT_PIN_CTRL		(CRL_APB_BASE + (0x250U))
36 /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */
37 #define CRL_APB_BOOTPIN_CTRL_MASK	0xF0FU
38 
39 /* IOCTL/QUERY feature payload size */
40 #define FEATURE_PAYLOAD_SIZE		2
41 
42 /* Firmware feature check version mask */
43 #define FIRMWARE_VERSION_MASK		GENMASK(15, 0)
44 
45 static bool feature_check_enabled;
46 static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER);
47 static u32 ioctl_features[FEATURE_PAYLOAD_SIZE];
48 static u32 query_features[FEATURE_PAYLOAD_SIZE];
49 
50 static struct platform_device *em_dev;
51 
52 /**
53  * struct zynqmp_devinfo - Structure for Zynqmp device instance
54  * @dev:		Device Pointer
55  * @feature_conf_id:	Feature conf id
56  */
57 struct zynqmp_devinfo {
58 	struct device *dev;
59 	u32 feature_conf_id;
60 };
61 
62 /**
63  * struct pm_api_feature_data - PM API Feature data
64  * @pm_api_id:		PM API Id, used as key to index into hashmap
65  * @feature_status:	status of PM API feature: valid, invalid
66  * @hentry:		hlist_node that hooks this entry into hashtable
67  */
68 struct pm_api_feature_data {
69 	u32 pm_api_id;
70 	int feature_status;
71 	struct hlist_node hentry;
72 };
73 
74 static const struct mfd_cell firmware_devs[] = {
75 	{
76 		.name = "zynqmp_power_controller",
77 	},
78 };
79 
80 /**
81  * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes
82  * @ret_status:		PMUFW return code
83  *
84  * Return: corresponding Linux error code
85  */
86 static int zynqmp_pm_ret_code(u32 ret_status)
87 {
88 	switch (ret_status) {
89 	case XST_PM_SUCCESS:
90 	case XST_PM_DOUBLE_REQ:
91 		return 0;
92 	case XST_PM_NO_FEATURE:
93 		return -ENOTSUPP;
94 	case XST_PM_NO_ACCESS:
95 		return -EACCES;
96 	case XST_PM_ABORT_SUSPEND:
97 		return -ECANCELED;
98 	case XST_PM_MULT_USER:
99 		return -EUSERS;
100 	case XST_PM_INTERNAL:
101 	case XST_PM_CONFLICT:
102 	case XST_PM_INVALID_NODE:
103 	default:
104 		return -EINVAL;
105 	}
106 }
107 
108 static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2,
109 				    u32 *ret_payload)
110 {
111 	return -ENODEV;
112 }
113 
114 /*
115  * PM function call wrapper
116  * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration
117  */
118 static int (*do_fw_call)(u64, u64, u64, u32 *ret_payload) = do_fw_call_fail;
119 
120 /**
121  * do_fw_call_smc() - Call system-level platform management layer (SMC)
122  * @arg0:		Argument 0 to SMC call
123  * @arg1:		Argument 1 to SMC call
124  * @arg2:		Argument 2 to SMC call
125  * @ret_payload:	Returned value array
126  *
127  * Invoke platform management function via SMC call (no hypervisor present).
128  *
129  * Return: Returns status, either success or error+reason
130  */
131 static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2,
132 				   u32 *ret_payload)
133 {
134 	struct arm_smccc_res res;
135 
136 	arm_smccc_smc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
137 
138 	if (ret_payload) {
139 		ret_payload[0] = lower_32_bits(res.a0);
140 		ret_payload[1] = upper_32_bits(res.a0);
141 		ret_payload[2] = lower_32_bits(res.a1);
142 		ret_payload[3] = upper_32_bits(res.a1);
143 	}
144 
145 	return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
146 }
147 
148 /**
149  * do_fw_call_hvc() - Call system-level platform management layer (HVC)
150  * @arg0:		Argument 0 to HVC call
151  * @arg1:		Argument 1 to HVC call
152  * @arg2:		Argument 2 to HVC call
153  * @ret_payload:	Returned value array
154  *
155  * Invoke platform management function via HVC
156  * HVC-based for communication through hypervisor
157  * (no direct communication with ATF).
158  *
159  * Return: Returns status, either success or error+reason
160  */
161 static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2,
162 				   u32 *ret_payload)
163 {
164 	struct arm_smccc_res res;
165 
166 	arm_smccc_hvc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
167 
168 	if (ret_payload) {
169 		ret_payload[0] = lower_32_bits(res.a0);
170 		ret_payload[1] = upper_32_bits(res.a0);
171 		ret_payload[2] = lower_32_bits(res.a1);
172 		ret_payload[3] = upper_32_bits(res.a1);
173 	}
174 
175 	return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
176 }
177 
178 static int __do_feature_check_call(const u32 api_id, u32 *ret_payload)
179 {
180 	int ret;
181 	u64 smc_arg[2];
182 
183 	smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK;
184 	smc_arg[1] = api_id;
185 
186 	ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload);
187 	if (ret)
188 		ret = -EOPNOTSUPP;
189 	else
190 		ret = ret_payload[1];
191 
192 	return ret;
193 }
194 
195 static int do_feature_check_call(const u32 api_id)
196 {
197 	int ret;
198 	u32 ret_payload[PAYLOAD_ARG_CNT];
199 	struct pm_api_feature_data *feature_data;
200 
201 	/* Check for existing entry in hash table for given api */
202 	hash_for_each_possible(pm_api_features_map, feature_data, hentry,
203 			       api_id) {
204 		if (feature_data->pm_api_id == api_id)
205 			return feature_data->feature_status;
206 	}
207 
208 	/* Add new entry if not present */
209 	feature_data = kmalloc(sizeof(*feature_data), GFP_ATOMIC);
210 	if (!feature_data)
211 		return -ENOMEM;
212 
213 	feature_data->pm_api_id = api_id;
214 	ret = __do_feature_check_call(api_id, ret_payload);
215 
216 	feature_data->feature_status = ret;
217 	hash_add(pm_api_features_map, &feature_data->hentry, api_id);
218 
219 	if (api_id == PM_IOCTL)
220 		/* Store supported IOCTL IDs mask */
221 		memcpy(ioctl_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4);
222 	else if (api_id == PM_QUERY_DATA)
223 		/* Store supported QUERY IDs mask */
224 		memcpy(query_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4);
225 
226 	return ret;
227 }
228 EXPORT_SYMBOL_GPL(zynqmp_pm_feature);
229 
230 /**
231  * zynqmp_pm_feature() - Check whether given feature is supported or not and
232  *			 store supported IOCTL/QUERY ID mask
233  * @api_id:		API ID to check
234  *
235  * Return: Returns status, either success or error+reason
236  */
237 int zynqmp_pm_feature(const u32 api_id)
238 {
239 	int ret;
240 
241 	if (!feature_check_enabled)
242 		return 0;
243 
244 	ret = do_feature_check_call(api_id);
245 
246 	return ret;
247 }
248 
249 /**
250  * zynqmp_pm_is_function_supported() - Check whether given IOCTL/QUERY function
251  *				       is supported or not
252  * @api_id:		PM_IOCTL or PM_QUERY_DATA
253  * @id:			IOCTL or QUERY function IDs
254  *
255  * Return: Returns status, either success or error+reason
256  */
257 int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id)
258 {
259 	int ret;
260 	u32 *bit_mask;
261 
262 	/* Input arguments validation */
263 	if (id >= 64 || (api_id != PM_IOCTL && api_id != PM_QUERY_DATA))
264 		return -EINVAL;
265 
266 	/* Check feature check API version */
267 	ret = do_feature_check_call(PM_FEATURE_CHECK);
268 	if (ret < 0)
269 		return ret;
270 
271 	/* Check if feature check version 2 is supported or not */
272 	if ((ret & FIRMWARE_VERSION_MASK) == PM_API_VERSION_2) {
273 		/*
274 		 * Call feature check for IOCTL/QUERY API to get IOCTL ID or
275 		 * QUERY ID feature status.
276 		 */
277 		ret = do_feature_check_call(api_id);
278 		if (ret < 0)
279 			return ret;
280 
281 		bit_mask = (api_id == PM_IOCTL) ? ioctl_features : query_features;
282 
283 		if ((bit_mask[(id / 32)] & BIT((id % 32))) == 0U)
284 			return -EOPNOTSUPP;
285 	} else {
286 		return -ENODATA;
287 	}
288 
289 	return 0;
290 }
291 EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported);
292 
293 /**
294  * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer
295  *			   caller function depending on the configuration
296  * @pm_api_id:		Requested PM-API call
297  * @arg0:		Argument 0 to requested PM-API call
298  * @arg1:		Argument 1 to requested PM-API call
299  * @arg2:		Argument 2 to requested PM-API call
300  * @arg3:		Argument 3 to requested PM-API call
301  * @ret_payload:	Returned value array
302  *
303  * Invoke platform management function for SMC or HVC call, depending on
304  * configuration.
305  * Following SMC Calling Convention (SMCCC) for SMC64:
306  * Pm Function Identifier,
307  * PM_SIP_SVC + PM_API_ID =
308  *	((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT)
309  *	((SMC_64) << FUNCID_CC_SHIFT)
310  *	((SIP_START) << FUNCID_OEN_SHIFT)
311  *	((PM_API_ID) & FUNCID_NUM_MASK))
312  *
313  * PM_SIP_SVC	- Registered ZynqMP SIP Service Call.
314  * PM_API_ID	- Platform Management API ID.
315  *
316  * Return: Returns status, either success or error+reason
317  */
318 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
319 			u32 arg2, u32 arg3, u32 *ret_payload)
320 {
321 	/*
322 	 * Added SIP service call Function Identifier
323 	 * Make sure to stay in x0 register
324 	 */
325 	u64 smc_arg[4];
326 	int ret;
327 
328 	/* Check if feature is supported or not */
329 	ret = zynqmp_pm_feature(pm_api_id);
330 	if (ret < 0)
331 		return ret;
332 
333 	smc_arg[0] = PM_SIP_SVC | pm_api_id;
334 	smc_arg[1] = ((u64)arg1 << 32) | arg0;
335 	smc_arg[2] = ((u64)arg3 << 32) | arg2;
336 
337 	return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], ret_payload);
338 }
339 
340 static u32 pm_api_version;
341 static u32 pm_tz_version;
342 
343 int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
344 {
345 	int ret;
346 
347 	ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, sgi_num, reset, 0, 0,
348 				  NULL);
349 	if (!ret)
350 		return ret;
351 
352 	/* try old implementation as fallback strategy if above fails */
353 	return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_REGISTER_SGI, sgi_num,
354 				   reset, NULL);
355 }
356 
357 /**
358  * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware
359  * @version:	Returned version value
360  *
361  * Return: Returns status, either success or error+reason
362  */
363 int zynqmp_pm_get_api_version(u32 *version)
364 {
365 	u32 ret_payload[PAYLOAD_ARG_CNT];
366 	int ret;
367 
368 	if (!version)
369 		return -EINVAL;
370 
371 	/* Check is PM API version already verified */
372 	if (pm_api_version > 0) {
373 		*version = pm_api_version;
374 		return 0;
375 	}
376 	ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, ret_payload);
377 	*version = ret_payload[1];
378 
379 	return ret;
380 }
381 EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version);
382 
383 /**
384  * zynqmp_pm_get_chipid - Get silicon ID registers
385  * @idcode:     IDCODE register
386  * @version:    version register
387  *
388  * Return:      Returns the status of the operation and the idcode and version
389  *              registers in @idcode and @version.
390  */
391 int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
392 {
393 	u32 ret_payload[PAYLOAD_ARG_CNT];
394 	int ret;
395 
396 	if (!idcode || !version)
397 		return -EINVAL;
398 
399 	ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
400 	*idcode = ret_payload[1];
401 	*version = ret_payload[2];
402 
403 	return ret;
404 }
405 EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid);
406 
407 /**
408  * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
409  * @version:	Returned version value
410  *
411  * Return: Returns status, either success or error+reason
412  */
413 static int zynqmp_pm_get_trustzone_version(u32 *version)
414 {
415 	u32 ret_payload[PAYLOAD_ARG_CNT];
416 	int ret;
417 
418 	if (!version)
419 		return -EINVAL;
420 
421 	/* Check is PM trustzone version already verified */
422 	if (pm_tz_version > 0) {
423 		*version = pm_tz_version;
424 		return 0;
425 	}
426 	ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, 0, 0,
427 				  0, 0, ret_payload);
428 	*version = ret_payload[1];
429 
430 	return ret;
431 }
432 
433 /**
434  * get_set_conduit_method() - Choose SMC or HVC based communication
435  * @np:		Pointer to the device_node structure
436  *
437  * Use SMC or HVC-based functions to communicate with EL2/EL3.
438  *
439  * Return: Returns 0 on success or error code
440  */
441 static int get_set_conduit_method(struct device_node *np)
442 {
443 	const char *method;
444 
445 	if (of_property_read_string(np, "method", &method)) {
446 		pr_warn("%s missing \"method\" property\n", __func__);
447 		return -ENXIO;
448 	}
449 
450 	if (!strcmp("hvc", method)) {
451 		do_fw_call = do_fw_call_hvc;
452 	} else if (!strcmp("smc", method)) {
453 		do_fw_call = do_fw_call_smc;
454 	} else {
455 		pr_warn("%s Invalid \"method\" property: %s\n",
456 			__func__, method);
457 		return -EINVAL;
458 	}
459 
460 	return 0;
461 }
462 
463 /**
464  * zynqmp_pm_query_data() - Get query data from firmware
465  * @qdata:	Variable to the zynqmp_pm_query_data structure
466  * @out:	Returned output value
467  *
468  * Return: Returns status, either success or error+reason
469  */
470 int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
471 {
472 	int ret;
473 
474 	ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, qdata.qid, qdata.arg1,
475 				  qdata.arg2, qdata.arg3, out);
476 
477 	/*
478 	 * For clock name query, all bytes in SMC response are clock name
479 	 * characters and return code is always success. For invalid clocks,
480 	 * clock name bytes would be zeros.
481 	 */
482 	return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret;
483 }
484 EXPORT_SYMBOL_GPL(zynqmp_pm_query_data);
485 
486 /**
487  * zynqmp_pm_clock_enable() - Enable the clock for given id
488  * @clock_id:	ID of the clock to be enabled
489  *
490  * This function is used by master to enable the clock
491  * including peripherals and PLL clocks.
492  *
493  * Return: Returns status, either success or error+reason
494  */
495 int zynqmp_pm_clock_enable(u32 clock_id)
496 {
497 	return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL);
498 }
499 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable);
500 
501 /**
502  * zynqmp_pm_clock_disable() - Disable the clock for given id
503  * @clock_id:	ID of the clock to be disable
504  *
505  * This function is used by master to disable the clock
506  * including peripherals and PLL clocks.
507  *
508  * Return: Returns status, either success or error+reason
509  */
510 int zynqmp_pm_clock_disable(u32 clock_id)
511 {
512 	return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL);
513 }
514 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable);
515 
516 /**
517  * zynqmp_pm_clock_getstate() - Get the clock state for given id
518  * @clock_id:	ID of the clock to be queried
519  * @state:	1/0 (Enabled/Disabled)
520  *
521  * This function is used by master to get the state of clock
522  * including peripherals and PLL clocks.
523  *
524  * Return: Returns status, either success or error+reason
525  */
526 int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state)
527 {
528 	u32 ret_payload[PAYLOAD_ARG_CNT];
529 	int ret;
530 
531 	ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, clock_id, 0,
532 				  0, 0, ret_payload);
533 	*state = ret_payload[1];
534 
535 	return ret;
536 }
537 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate);
538 
539 /**
540  * zynqmp_pm_clock_setdivider() - Set the clock divider for given id
541  * @clock_id:	ID of the clock
542  * @divider:	divider value
543  *
544  * This function is used by master to set divider for any clock
545  * to achieve desired rate.
546  *
547  * Return: Returns status, either success or error+reason
548  */
549 int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider)
550 {
551 	return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider,
552 				   0, 0, NULL);
553 }
554 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider);
555 
556 /**
557  * zynqmp_pm_clock_getdivider() - Get the clock divider for given id
558  * @clock_id:	ID of the clock
559  * @divider:	divider value
560  *
561  * This function is used by master to get divider values
562  * for any clock.
563  *
564  * Return: Returns status, either success or error+reason
565  */
566 int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider)
567 {
568 	u32 ret_payload[PAYLOAD_ARG_CNT];
569 	int ret;
570 
571 	ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, clock_id, 0,
572 				  0, 0, ret_payload);
573 	*divider = ret_payload[1];
574 
575 	return ret;
576 }
577 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider);
578 
579 /**
580  * zynqmp_pm_clock_setrate() - Set the clock rate for given id
581  * @clock_id:	ID of the clock
582  * @rate:	rate value in hz
583  *
584  * This function is used by master to set rate for any clock.
585  *
586  * Return: Returns status, either success or error+reason
587  */
588 int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate)
589 {
590 	return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id,
591 				   lower_32_bits(rate),
592 				   upper_32_bits(rate),
593 				   0, NULL);
594 }
595 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate);
596 
597 /**
598  * zynqmp_pm_clock_getrate() - Get the clock rate for given id
599  * @clock_id:	ID of the clock
600  * @rate:	rate value in hz
601  *
602  * This function is used by master to get rate
603  * for any clock.
604  *
605  * Return: Returns status, either success or error+reason
606  */
607 int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate)
608 {
609 	u32 ret_payload[PAYLOAD_ARG_CNT];
610 	int ret;
611 
612 	ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, clock_id, 0,
613 				  0, 0, ret_payload);
614 	*rate = ((u64)ret_payload[2] << 32) | ret_payload[1];
615 
616 	return ret;
617 }
618 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate);
619 
620 /**
621  * zynqmp_pm_clock_setparent() - Set the clock parent for given id
622  * @clock_id:	ID of the clock
623  * @parent_id:	parent id
624  *
625  * This function is used by master to set parent for any clock.
626  *
627  * Return: Returns status, either success or error+reason
628  */
629 int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
630 {
631 	return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id,
632 				   parent_id, 0, 0, NULL);
633 }
634 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent);
635 
636 /**
637  * zynqmp_pm_clock_getparent() - Get the clock parent for given id
638  * @clock_id:	ID of the clock
639  * @parent_id:	parent id
640  *
641  * This function is used by master to get parent index
642  * for any clock.
643  *
644  * Return: Returns status, either success or error+reason
645  */
646 int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
647 {
648 	u32 ret_payload[PAYLOAD_ARG_CNT];
649 	int ret;
650 
651 	ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, clock_id, 0,
652 				  0, 0, ret_payload);
653 	*parent_id = ret_payload[1];
654 
655 	return ret;
656 }
657 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent);
658 
659 /**
660  * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode
661  *
662  * @clk_id:	PLL clock ID
663  * @mode:	PLL mode (PLL_MODE_FRAC/PLL_MODE_INT)
664  *
665  * This function sets PLL mode
666  *
667  * Return: Returns status, either success or error+reason
668  */
669 int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode)
670 {
671 	return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_MODE,
672 				   clk_id, mode, NULL);
673 }
674 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode);
675 
676 /**
677  * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode
678  *
679  * @clk_id:	PLL clock ID
680  * @mode:	PLL mode
681  *
682  * This function return current PLL mode
683  *
684  * Return: Returns status, either success or error+reason
685  */
686 int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode)
687 {
688 	return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_MODE,
689 				   clk_id, 0, mode);
690 }
691 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode);
692 
693 /**
694  * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data
695  *
696  * @clk_id:	PLL clock ID
697  * @data:	fraction data
698  *
699  * This function sets fraction data.
700  * It is valid for fraction mode only.
701  *
702  * Return: Returns status, either success or error+reason
703  */
704 int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data)
705 {
706 	return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_DATA,
707 				   clk_id, data, NULL);
708 }
709 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data);
710 
711 /**
712  * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data
713  *
714  * @clk_id:	PLL clock ID
715  * @data:	fraction data
716  *
717  * This function returns fraction data value.
718  *
719  * Return: Returns status, either success or error+reason
720  */
721 int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data)
722 {
723 	return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_DATA,
724 				   clk_id, 0, data);
725 }
726 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data);
727 
728 /**
729  * zynqmp_pm_set_sd_tapdelay() -  Set tap delay for the SD device
730  *
731  * @node_id:	Node ID of the device
732  * @type:	Type of tap delay to set (input/output)
733  * @value:	Value to set fot the tap delay
734  *
735  * This function sets input/output tap delay for the SD device.
736  *
737  * Return:	Returns status, either success or error+reason
738  */
739 int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value)
740 {
741 	u32 reg = (type == PM_TAPDELAY_INPUT) ? SD_ITAPDLY : SD_OTAPDLYSEL;
742 	u32 mask = (node_id == NODE_SD_0) ? GENMASK(15, 0) : GENMASK(31, 16);
743 
744 	if (value) {
745 		return zynqmp_pm_invoke_fn(PM_IOCTL, node_id,
746 					   IOCTL_SET_SD_TAPDELAY,
747 					   type, value, NULL);
748 	}
749 
750 	/*
751 	 * Work around completely misdesigned firmware API on Xilinx ZynqMP.
752 	 * The IOCTL_SET_SD_TAPDELAY firmware call allows the caller to only
753 	 * ever set IOU_SLCR SD_ITAPDLY Register SD0_ITAPDLYENA/SD1_ITAPDLYENA
754 	 * bits, but there is no matching call to clear those bits. If those
755 	 * bits are not cleared, SDMMC tuning may fail.
756 	 *
757 	 * Luckily, there are PM_MMIO_READ/PM_MMIO_WRITE calls which seem to
758 	 * allow complete unrestricted access to all address space, including
759 	 * IOU_SLCR SD_ITAPDLY Register and all the other registers, access
760 	 * to which was supposed to be protected by the current firmware API.
761 	 *
762 	 * Use PM_MMIO_READ/PM_MMIO_WRITE to re-implement the missing counter
763 	 * part of IOCTL_SET_SD_TAPDELAY which clears SDx_ITAPDLYENA bits.
764 	 */
765 	return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, reg, mask, 0, 0, NULL);
766 }
767 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay);
768 
769 /**
770  * zynqmp_pm_sd_dll_reset() - Reset DLL logic
771  *
772  * @node_id:	Node ID of the device
773  * @type:	Reset type
774  *
775  * This function resets DLL logic for the SD device.
776  *
777  * Return:	Returns status, either success or error+reason
778  */
779 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)
780 {
781 	return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET,
782 				   type, 0, NULL);
783 }
784 EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset);
785 
786 /**
787  * zynqmp_pm_ospi_mux_select() - OSPI Mux selection
788  *
789  * @dev_id:	Device Id of the OSPI device.
790  * @select:	OSPI Mux select value.
791  *
792  * This function select the OSPI Mux.
793  *
794  * Return:	Returns status, either success or error+reason
795  */
796 int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select)
797 {
798 	return zynqmp_pm_invoke_fn(PM_IOCTL, dev_id, IOCTL_OSPI_MUX_SELECT,
799 				   select, 0, NULL);
800 }
801 EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select);
802 
803 /**
804  * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs)
805  * @index:	GGS register index
806  * @value:	Register value to be written
807  *
808  * This function writes value to GGS register.
809  *
810  * Return:      Returns status, either success or error+reason
811  */
812 int zynqmp_pm_write_ggs(u32 index, u32 value)
813 {
814 	return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS,
815 				   index, value, NULL);
816 }
817 EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs);
818 
819 /**
820  * zynqmp_pm_read_ggs() - PM API for reading global general storage (ggs)
821  * @index:	GGS register index
822  * @value:	Register value to be written
823  *
824  * This function returns GGS register value.
825  *
826  * Return:	Returns status, either success or error+reason
827  */
828 int zynqmp_pm_read_ggs(u32 index, u32 *value)
829 {
830 	return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS,
831 				   index, 0, value);
832 }
833 EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs);
834 
835 /**
836  * zynqmp_pm_write_pggs() - PM API for writing persistent global general
837  *			     storage (pggs)
838  * @index:	PGGS register index
839  * @value:	Register value to be written
840  *
841  * This function writes value to PGGS register.
842  *
843  * Return:	Returns status, either success or error+reason
844  */
845 int zynqmp_pm_write_pggs(u32 index, u32 value)
846 {
847 	return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value,
848 				   NULL);
849 }
850 EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs);
851 
852 /**
853  * zynqmp_pm_read_pggs() - PM API for reading persistent global general
854  *			     storage (pggs)
855  * @index:	PGGS register index
856  * @value:	Register value to be written
857  *
858  * This function returns PGGS register value.
859  *
860  * Return:	Returns status, either success or error+reason
861  */
862 int zynqmp_pm_read_pggs(u32 index, u32 *value)
863 {
864 	return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0,
865 				   value);
866 }
867 EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs);
868 
869 int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value)
870 {
871 	return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_TAPDELAY_BYPASS,
872 				   index, value, NULL);
873 }
874 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass);
875 
876 /**
877  * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status
878  * @value:	Status value to be written
879  *
880  * This function sets healthy bit value to indicate boot health status
881  * to firmware.
882  *
883  * Return:	Returns status, either success or error+reason
884  */
885 int zynqmp_pm_set_boot_health_status(u32 value)
886 {
887 	return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS,
888 				   value, 0, NULL);
889 }
890 
891 /**
892  * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release)
893  * @reset:		Reset to be configured
894  * @assert_flag:	Flag stating should reset be asserted (1) or
895  *			released (0)
896  *
897  * Return: Returns status, either success or error+reason
898  */
899 int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset,
900 			   const enum zynqmp_pm_reset_action assert_flag)
901 {
902 	return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag,
903 				   0, 0, NULL);
904 }
905 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert);
906 
907 /**
908  * zynqmp_pm_reset_get_status - Get status of the reset
909  * @reset:      Reset whose status should be returned
910  * @status:     Returned status
911  *
912  * Return: Returns status, either success or error+reason
913  */
914 int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status)
915 {
916 	u32 ret_payload[PAYLOAD_ARG_CNT];
917 	int ret;
918 
919 	if (!status)
920 		return -EINVAL;
921 
922 	ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, reset, 0,
923 				  0, 0, ret_payload);
924 	*status = ret_payload[1];
925 
926 	return ret;
927 }
928 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status);
929 
930 /**
931  * zynqmp_pm_fpga_load - Perform the fpga load
932  * @address:	Address to write to
933  * @size:	pl bitstream size
934  * @flags:	Bitstream type
935  *	-XILINX_ZYNQMP_PM_FPGA_FULL:  FPGA full reconfiguration
936  *	-XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration
937  *
938  * This function provides access to pmufw. To transfer
939  * the required bitstream into PL.
940  *
941  * Return: Returns status, either success or error+reason
942  */
943 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags)
944 {
945 	return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address),
946 				   upper_32_bits(address), size, flags, NULL);
947 }
948 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load);
949 
950 /**
951  * zynqmp_pm_fpga_get_status - Read value from PCAP status register
952  * @value: Value to read
953  *
954  * This function provides access to the pmufw to get the PCAP
955  * status
956  *
957  * Return: Returns status, either success or error+reason
958  */
959 int zynqmp_pm_fpga_get_status(u32 *value)
960 {
961 	u32 ret_payload[PAYLOAD_ARG_CNT];
962 	int ret;
963 
964 	if (!value)
965 		return -EINVAL;
966 
967 	ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload);
968 	*value = ret_payload[1];
969 
970 	return ret;
971 }
972 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status);
973 
974 /**
975  * zynqmp_pm_pinctrl_request - Request Pin from firmware
976  * @pin: Pin number to request
977  *
978  * This function requests pin from firmware.
979  *
980  * Return: Returns status, either success or error+reason.
981  */
982 int zynqmp_pm_pinctrl_request(const u32 pin)
983 {
984 	return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, pin, 0, 0, 0, NULL);
985 }
986 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request);
987 
988 /**
989  * zynqmp_pm_pinctrl_release - Inform firmware that Pin control is released
990  * @pin: Pin number to release
991  *
992  * This function release pin from firmware.
993  *
994  * Return: Returns status, either success or error+reason.
995  */
996 int zynqmp_pm_pinctrl_release(const u32 pin)
997 {
998 	return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, pin, 0, 0, 0, NULL);
999 }
1000 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release);
1001 
1002 /**
1003  * zynqmp_pm_pinctrl_get_function - Read function id set for the given pin
1004  * @pin: Pin number
1005  * @id: Buffer to store function ID
1006  *
1007  * This function provides the function currently set for the given pin.
1008  *
1009  * Return: Returns status, either success or error+reason
1010  */
1011 int zynqmp_pm_pinctrl_get_function(const u32 pin, u32 *id)
1012 {
1013 	u32 ret_payload[PAYLOAD_ARG_CNT];
1014 	int ret;
1015 
1016 	if (!id)
1017 		return -EINVAL;
1018 
1019 	ret = zynqmp_pm_invoke_fn(PM_PINCTRL_GET_FUNCTION, pin, 0,
1020 				  0, 0, ret_payload);
1021 	*id = ret_payload[1];
1022 
1023 	return ret;
1024 }
1025 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_function);
1026 
1027 /**
1028  * zynqmp_pm_pinctrl_set_function - Set requested function for the pin
1029  * @pin: Pin number
1030  * @id: Function ID to set
1031  *
1032  * This function sets requested function for the given pin.
1033  *
1034  * Return: Returns status, either success or error+reason.
1035  */
1036 int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id)
1037 {
1038 	return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, pin, id,
1039 				   0, 0, NULL);
1040 }
1041 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function);
1042 
1043 /**
1044  * zynqmp_pm_pinctrl_get_config - Get configuration parameter for the pin
1045  * @pin: Pin number
1046  * @param: Parameter to get
1047  * @value: Buffer to store parameter value
1048  *
1049  * This function gets requested configuration parameter for the given pin.
1050  *
1051  * Return: Returns status, either success or error+reason.
1052  */
1053 int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param,
1054 				 u32 *value)
1055 {
1056 	u32 ret_payload[PAYLOAD_ARG_CNT];
1057 	int ret;
1058 
1059 	if (!value)
1060 		return -EINVAL;
1061 
1062 	ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, pin, param,
1063 				  0, 0, ret_payload);
1064 	*value = ret_payload[1];
1065 
1066 	return ret;
1067 }
1068 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_config);
1069 
1070 /**
1071  * zynqmp_pm_pinctrl_set_config - Set configuration parameter for the pin
1072  * @pin: Pin number
1073  * @param: Parameter to set
1074  * @value: Parameter value to set
1075  *
1076  * This function sets requested configuration parameter for the given pin.
1077  *
1078  * Return: Returns status, either success or error+reason.
1079  */
1080 int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
1081 				 u32 value)
1082 {
1083 	return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, pin,
1084 				   param, value, 0, NULL);
1085 }
1086 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config);
1087 
1088 /**
1089  * zynqmp_pm_bootmode_read() - PM Config API for read bootpin status
1090  * @ps_mode: Returned output value of ps_mode
1091  *
1092  * This API function is to be used for notify the power management controller
1093  * to read bootpin status.
1094  *
1095  * Return: status, either success or error+reason
1096  */
1097 unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode)
1098 {
1099 	unsigned int ret;
1100 	u32 ret_payload[PAYLOAD_ARG_CNT];
1101 
1102 	ret = zynqmp_pm_invoke_fn(PM_MMIO_READ, CRL_APB_BOOT_PIN_CTRL, 0,
1103 				  0, 0, ret_payload);
1104 
1105 	*ps_mode = ret_payload[1];
1106 
1107 	return ret;
1108 }
1109 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_read);
1110 
1111 /**
1112  * zynqmp_pm_bootmode_write() - PM Config API for Configure bootpin
1113  * @ps_mode: Value to be written to the bootpin ctrl register
1114  *
1115  * This API function is to be used for notify the power management controller
1116  * to configure bootpin.
1117  *
1118  * Return: Returns status, either success or error+reason
1119  */
1120 int zynqmp_pm_bootmode_write(u32 ps_mode)
1121 {
1122 	return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, CRL_APB_BOOT_PIN_CTRL,
1123 				   CRL_APB_BOOTPIN_CTRL_MASK, ps_mode, 0, NULL);
1124 }
1125 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write);
1126 
1127 /**
1128  * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller
1129  *			       master has initialized its own power management
1130  *
1131  * Return: Returns status, either success or error+reason
1132  *
1133  * This API function is to be used for notify the power management controller
1134  * about the completed power management initialization.
1135  */
1136 int zynqmp_pm_init_finalize(void)
1137 {
1138 	return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL);
1139 }
1140 EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize);
1141 
1142 /**
1143  * zynqmp_pm_set_suspend_mode()	- Set system suspend mode
1144  * @mode:	Mode to set for system suspend
1145  *
1146  * This API function is used to set mode of system suspend.
1147  *
1148  * Return: Returns status, either success or error+reason
1149  */
1150 int zynqmp_pm_set_suspend_mode(u32 mode)
1151 {
1152 	return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL);
1153 }
1154 EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode);
1155 
1156 /**
1157  * zynqmp_pm_request_node() - Request a node with specific capabilities
1158  * @node:		Node ID of the slave
1159  * @capabilities:	Requested capabilities of the slave
1160  * @qos:		Quality of service (not supported)
1161  * @ack:		Flag to specify whether acknowledge is requested
1162  *
1163  * This function is used by master to request particular node from firmware.
1164  * Every master must request node before using it.
1165  *
1166  * Return: Returns status, either success or error+reason
1167  */
1168 int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
1169 			   const u32 qos, const enum zynqmp_pm_request_ack ack)
1170 {
1171 	return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities,
1172 				   qos, ack, NULL);
1173 }
1174 EXPORT_SYMBOL_GPL(zynqmp_pm_request_node);
1175 
1176 /**
1177  * zynqmp_pm_release_node() - Release a node
1178  * @node:	Node ID of the slave
1179  *
1180  * This function is used by master to inform firmware that master
1181  * has released node. Once released, master must not use that node
1182  * without re-request.
1183  *
1184  * Return: Returns status, either success or error+reason
1185  */
1186 int zynqmp_pm_release_node(const u32 node)
1187 {
1188 	return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL);
1189 }
1190 EXPORT_SYMBOL_GPL(zynqmp_pm_release_node);
1191 
1192 /**
1193  * zynqmp_pm_get_rpu_mode() - Get RPU mode
1194  * @node_id:	Node ID of the device
1195  * @rpu_mode:	return by reference value
1196  *		either split or lockstep
1197  *
1198  * Return:	return 0 on success or error+reason.
1199  *		if success, then  rpu_mode will be set
1200  *		to current rpu mode.
1201  */
1202 int zynqmp_pm_get_rpu_mode(u32 node_id, enum rpu_oper_mode *rpu_mode)
1203 {
1204 	u32 ret_payload[PAYLOAD_ARG_CNT];
1205 	int ret;
1206 
1207 	ret = zynqmp_pm_invoke_fn(PM_IOCTL, node_id,
1208 				  IOCTL_GET_RPU_OPER_MODE, 0, 0, ret_payload);
1209 
1210 	/* only set rpu_mode if no error */
1211 	if (ret == XST_PM_SUCCESS)
1212 		*rpu_mode = ret_payload[0];
1213 
1214 	return ret;
1215 }
1216 EXPORT_SYMBOL_GPL(zynqmp_pm_get_rpu_mode);
1217 
1218 /**
1219  * zynqmp_pm_set_rpu_mode() - Set RPU mode
1220  * @node_id:	Node ID of the device
1221  * @rpu_mode:	Argument 1 to requested IOCTL call. either split or lockstep
1222  *
1223  *		This function is used to set RPU mode to split or
1224  *		lockstep
1225  *
1226  * Return:	Returns status, either success or error+reason
1227  */
1228 int zynqmp_pm_set_rpu_mode(u32 node_id, enum rpu_oper_mode rpu_mode)
1229 {
1230 	return zynqmp_pm_invoke_fn(PM_IOCTL, node_id,
1231 				   IOCTL_SET_RPU_OPER_MODE, (u32)rpu_mode,
1232 				   0, NULL);
1233 }
1234 EXPORT_SYMBOL_GPL(zynqmp_pm_set_rpu_mode);
1235 
1236 /**
1237  * zynqmp_pm_set_tcm_config - configure TCM
1238  * @node_id:	Firmware specific TCM subsystem ID
1239  * @tcm_mode:	Argument 1 to requested IOCTL call
1240  *              either PM_RPU_TCM_COMB or PM_RPU_TCM_SPLIT
1241  *
1242  * This function is used to set RPU mode to split or combined
1243  *
1244  * Return: status: 0 for success, else failure
1245  */
1246 int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode)
1247 {
1248 	return zynqmp_pm_invoke_fn(PM_IOCTL, node_id,
1249 				   IOCTL_TCM_COMB_CONFIG, (u32)tcm_mode, 0,
1250 				   NULL);
1251 }
1252 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tcm_config);
1253 
1254 /**
1255  * zynqmp_pm_force_pwrdwn - PM call to request for another PU or subsystem to
1256  *             be powered down forcefully
1257  * @node:  Node ID of the targeted PU or subsystem
1258  * @ack:   Flag to specify whether acknowledge is requested
1259  *
1260  * Return: status, either success or error+reason
1261  */
1262 int zynqmp_pm_force_pwrdwn(const u32 node,
1263 			   const enum zynqmp_pm_request_ack ack)
1264 {
1265 	return zynqmp_pm_invoke_fn(PM_FORCE_POWERDOWN, node, ack, 0, 0, NULL);
1266 }
1267 EXPORT_SYMBOL_GPL(zynqmp_pm_force_pwrdwn);
1268 
1269 /**
1270  * zynqmp_pm_request_wake - PM call to wake up selected master or subsystem
1271  * @node:  Node ID of the master or subsystem
1272  * @set_addr:  Specifies whether the address argument is relevant
1273  * @address:   Address from which to resume when woken up
1274  * @ack:   Flag to specify whether acknowledge requested
1275  *
1276  * Return: status, either success or error+reason
1277  */
1278 int zynqmp_pm_request_wake(const u32 node,
1279 			   const bool set_addr,
1280 			   const u64 address,
1281 			   const enum zynqmp_pm_request_ack ack)
1282 {
1283 	/* set_addr flag is encoded into 1st bit of address */
1284 	return zynqmp_pm_invoke_fn(PM_REQUEST_WAKEUP, node, address | set_addr,
1285 				   address >> 32, ack, NULL);
1286 }
1287 EXPORT_SYMBOL_GPL(zynqmp_pm_request_wake);
1288 
1289 /**
1290  * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves
1291  * @node:		Node ID of the slave
1292  * @capabilities:	Requested capabilities of the slave
1293  * @qos:		Quality of service (not supported)
1294  * @ack:		Flag to specify whether acknowledge is requested
1295  *
1296  * This API function is to be used for slaves a PU already has requested
1297  * to change its capabilities.
1298  *
1299  * Return: Returns status, either success or error+reason
1300  */
1301 int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
1302 			      const u32 qos,
1303 			      const enum zynqmp_pm_request_ack ack)
1304 {
1305 	return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities,
1306 				   qos, ack, NULL);
1307 }
1308 EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
1309 
1310 /**
1311  * zynqmp_pm_load_pdi - Load and process PDI
1312  * @src:       Source device where PDI is located
1313  * @address:   PDI src address
1314  *
1315  * This function provides support to load PDI from linux
1316  *
1317  * Return: Returns status, either success or error+reason
1318  */
1319 int zynqmp_pm_load_pdi(const u32 src, const u64 address)
1320 {
1321 	return zynqmp_pm_invoke_fn(PM_LOAD_PDI, src,
1322 				   lower_32_bits(address),
1323 				   upper_32_bits(address), 0, NULL);
1324 }
1325 EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi);
1326 
1327 /**
1328  * zynqmp_pm_aes_engine - Access AES hardware to encrypt/decrypt the data using
1329  * AES-GCM core.
1330  * @address:	Address of the AesParams structure.
1331  * @out:	Returned output value
1332  *
1333  * Return:	Returns status, either success or error code.
1334  */
1335 int zynqmp_pm_aes_engine(const u64 address, u32 *out)
1336 {
1337 	u32 ret_payload[PAYLOAD_ARG_CNT];
1338 	int ret;
1339 
1340 	if (!out)
1341 		return -EINVAL;
1342 
1343 	ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address),
1344 				  lower_32_bits(address),
1345 				  0, 0, ret_payload);
1346 	*out = ret_payload[1];
1347 
1348 	return ret;
1349 }
1350 EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine);
1351 
1352 /**
1353  * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash
1354  * @address:	Address of the data/ Address of output buffer where
1355  *		hash should be stored.
1356  * @size:	Size of the data.
1357  * @flags:
1358  *	BIT(0) - for initializing csudma driver and SHA3(Here address
1359  *		 and size inputs can be NULL).
1360  *	BIT(1) - to call Sha3_Update API which can be called multiple
1361  *		 times when data is not contiguous.
1362  *	BIT(2) - to get final hash of the whole updated data.
1363  *		 Hash will be overwritten at provided address with
1364  *		 48 bytes.
1365  *
1366  * Return:	Returns status, either success or error code.
1367  */
1368 int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags)
1369 {
1370 	u32 lower_addr = lower_32_bits(address);
1371 	u32 upper_addr = upper_32_bits(address);
1372 
1373 	return zynqmp_pm_invoke_fn(PM_SECURE_SHA, upper_addr, lower_addr,
1374 				   size, flags, NULL);
1375 }
1376 EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash);
1377 
1378 /**
1379  * zynqmp_pm_register_notifier() - PM API for register a subsystem
1380  *                                to be notified about specific
1381  *                                event/error.
1382  * @node:	Node ID to which the event is related.
1383  * @event:	Event Mask of Error events for which wants to get notified.
1384  * @wake:	Wake subsystem upon capturing the event if value 1
1385  * @enable:	Enable the registration for value 1, disable for value 0
1386  *
1387  * This function is used to register/un-register for particular node-event
1388  * combination in firmware.
1389  *
1390  * Return: Returns status, either success or error+reason
1391  */
1392 
1393 int zynqmp_pm_register_notifier(const u32 node, const u32 event,
1394 				const u32 wake, const u32 enable)
1395 {
1396 	return zynqmp_pm_invoke_fn(PM_REGISTER_NOTIFIER, node, event,
1397 				   wake, enable, NULL);
1398 }
1399 EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier);
1400 
1401 /**
1402  * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart
1403  * @type:	Shutdown or restart? 0 for shutdown, 1 for restart
1404  * @subtype:	Specifies which system should be restarted or shut down
1405  *
1406  * Return:	Returns status, either success or error+reason
1407  */
1408 int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)
1409 {
1410 	return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, type, subtype,
1411 				   0, 0, NULL);
1412 }
1413 
1414 /**
1415  * zynqmp_pm_set_feature_config - PM call to request IOCTL for feature config
1416  * @id:         The config ID of the feature to be configured
1417  * @value:      The config value of the feature to be configured
1418  *
1419  * Return:      Returns 0 on success or error value on failure.
1420  */
1421 int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value)
1422 {
1423 	return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_FEATURE_CONFIG,
1424 				   id, value, NULL);
1425 }
1426 
1427 /**
1428  * zynqmp_pm_get_feature_config - PM call to get value of configured feature
1429  * @id:         The config id of the feature to be queried
1430  * @payload:    Returned value array
1431  *
1432  * Return:      Returns 0 on success or error value on failure.
1433  */
1434 int zynqmp_pm_get_feature_config(enum pm_feature_config_id id,
1435 				 u32 *payload)
1436 {
1437 	return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_FEATURE_CONFIG,
1438 				   id, 0, payload);
1439 }
1440 
1441 /**
1442  * zynqmp_pm_set_sd_config - PM call to set value of SD config registers
1443  * @node:	SD node ID
1444  * @config:	The config type of SD registers
1445  * @value:	Value to be set
1446  *
1447  * Return:	Returns 0 on success or error value on failure.
1448  */
1449 int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value)
1450 {
1451 	return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_SD_CONFIG,
1452 				   config, value, NULL);
1453 }
1454 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_config);
1455 
1456 /**
1457  * zynqmp_pm_set_gem_config - PM call to set value of GEM config registers
1458  * @node:	GEM node ID
1459  * @config:	The config type of GEM registers
1460  * @value:	Value to be set
1461  *
1462  * Return:	Returns 0 on success or error value on failure.
1463  */
1464 int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config,
1465 			     u32 value)
1466 {
1467 	return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_GEM_CONFIG,
1468 				   config, value, NULL);
1469 }
1470 EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config);
1471 
1472 /**
1473  * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope
1474  * @subtype:	Shutdown subtype
1475  * @name:	Matching string for scope argument
1476  *
1477  * This struct encapsulates mapping between shutdown scope ID and string.
1478  */
1479 struct zynqmp_pm_shutdown_scope {
1480 	const enum zynqmp_pm_shutdown_subtype subtype;
1481 	const char *name;
1482 };
1483 
1484 static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = {
1485 	[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = {
1486 		.subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM,
1487 		.name = "subsystem",
1488 	},
1489 	[ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = {
1490 		.subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY,
1491 		.name = "ps_only",
1492 	},
1493 	[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = {
1494 		.subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM,
1495 		.name = "system",
1496 	},
1497 };
1498 
1499 static struct zynqmp_pm_shutdown_scope *selected_scope =
1500 		&shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM];
1501 
1502 /**
1503  * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid
1504  * @scope_string:	Shutdown scope string
1505  *
1506  * Return:		Return pointer to matching shutdown scope struct from
1507  *			array of available options in system if string is valid,
1508  *			otherwise returns NULL.
1509  */
1510 static struct zynqmp_pm_shutdown_scope*
1511 		zynqmp_pm_is_shutdown_scope_valid(const char *scope_string)
1512 {
1513 	int count;
1514 
1515 	for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++)
1516 		if (sysfs_streq(scope_string, shutdown_scopes[count].name))
1517 			return &shutdown_scopes[count];
1518 
1519 	return NULL;
1520 }
1521 
1522 static ssize_t shutdown_scope_show(struct device *device,
1523 				   struct device_attribute *attr,
1524 				   char *buf)
1525 {
1526 	int i;
1527 
1528 	for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) {
1529 		if (&shutdown_scopes[i] == selected_scope) {
1530 			strcat(buf, "[");
1531 			strcat(buf, shutdown_scopes[i].name);
1532 			strcat(buf, "]");
1533 		} else {
1534 			strcat(buf, shutdown_scopes[i].name);
1535 		}
1536 		strcat(buf, " ");
1537 	}
1538 	strcat(buf, "\n");
1539 
1540 	return strlen(buf);
1541 }
1542 
1543 static ssize_t shutdown_scope_store(struct device *device,
1544 				    struct device_attribute *attr,
1545 				    const char *buf, size_t count)
1546 {
1547 	int ret;
1548 	struct zynqmp_pm_shutdown_scope *scope;
1549 
1550 	scope = zynqmp_pm_is_shutdown_scope_valid(buf);
1551 	if (!scope)
1552 		return -EINVAL;
1553 
1554 	ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY,
1555 					scope->subtype);
1556 	if (ret) {
1557 		pr_err("unable to set shutdown scope %s\n", buf);
1558 		return ret;
1559 	}
1560 
1561 	selected_scope = scope;
1562 
1563 	return count;
1564 }
1565 
1566 static DEVICE_ATTR_RW(shutdown_scope);
1567 
1568 static ssize_t health_status_store(struct device *device,
1569 				   struct device_attribute *attr,
1570 				   const char *buf, size_t count)
1571 {
1572 	int ret;
1573 	unsigned int value;
1574 
1575 	ret = kstrtouint(buf, 10, &value);
1576 	if (ret)
1577 		return ret;
1578 
1579 	ret = zynqmp_pm_set_boot_health_status(value);
1580 	if (ret) {
1581 		dev_err(device, "unable to set healthy bit value to %u\n",
1582 			value);
1583 		return ret;
1584 	}
1585 
1586 	return count;
1587 }
1588 
1589 static DEVICE_ATTR_WO(health_status);
1590 
1591 static ssize_t ggs_show(struct device *device,
1592 			struct device_attribute *attr,
1593 			char *buf,
1594 			u32 reg)
1595 {
1596 	int ret;
1597 	u32 ret_payload[PAYLOAD_ARG_CNT];
1598 
1599 	ret = zynqmp_pm_read_ggs(reg, ret_payload);
1600 	if (ret)
1601 		return ret;
1602 
1603 	return sprintf(buf, "0x%x\n", ret_payload[1]);
1604 }
1605 
1606 static ssize_t ggs_store(struct device *device,
1607 			 struct device_attribute *attr,
1608 			 const char *buf, size_t count,
1609 			 u32 reg)
1610 {
1611 	long value;
1612 	int ret;
1613 
1614 	if (reg >= GSS_NUM_REGS)
1615 		return -EINVAL;
1616 
1617 	ret = kstrtol(buf, 16, &value);
1618 	if (ret) {
1619 		count = -EFAULT;
1620 		goto err;
1621 	}
1622 
1623 	ret = zynqmp_pm_write_ggs(reg, value);
1624 	if (ret)
1625 		count = -EFAULT;
1626 err:
1627 	return count;
1628 }
1629 
1630 /* GGS register show functions */
1631 #define GGS0_SHOW(N)						\
1632 	ssize_t ggs##N##_show(struct device *device,		\
1633 			      struct device_attribute *attr,	\
1634 			      char *buf)			\
1635 	{							\
1636 		return ggs_show(device, attr, buf, N);		\
1637 	}
1638 
1639 static GGS0_SHOW(0);
1640 static GGS0_SHOW(1);
1641 static GGS0_SHOW(2);
1642 static GGS0_SHOW(3);
1643 
1644 /* GGS register store function */
1645 #define GGS0_STORE(N)						\
1646 	ssize_t ggs##N##_store(struct device *device,		\
1647 			       struct device_attribute *attr,	\
1648 			       const char *buf,			\
1649 			       size_t count)			\
1650 	{							\
1651 		return ggs_store(device, attr, buf, count, N);	\
1652 	}
1653 
1654 static GGS0_STORE(0);
1655 static GGS0_STORE(1);
1656 static GGS0_STORE(2);
1657 static GGS0_STORE(3);
1658 
1659 static ssize_t pggs_show(struct device *device,
1660 			 struct device_attribute *attr,
1661 			 char *buf,
1662 			 u32 reg)
1663 {
1664 	int ret;
1665 	u32 ret_payload[PAYLOAD_ARG_CNT];
1666 
1667 	ret = zynqmp_pm_read_pggs(reg, ret_payload);
1668 	if (ret)
1669 		return ret;
1670 
1671 	return sprintf(buf, "0x%x\n", ret_payload[1]);
1672 }
1673 
1674 static ssize_t pggs_store(struct device *device,
1675 			  struct device_attribute *attr,
1676 			  const char *buf, size_t count,
1677 			  u32 reg)
1678 {
1679 	long value;
1680 	int ret;
1681 
1682 	if (reg >= GSS_NUM_REGS)
1683 		return -EINVAL;
1684 
1685 	ret = kstrtol(buf, 16, &value);
1686 	if (ret) {
1687 		count = -EFAULT;
1688 		goto err;
1689 	}
1690 
1691 	ret = zynqmp_pm_write_pggs(reg, value);
1692 	if (ret)
1693 		count = -EFAULT;
1694 
1695 err:
1696 	return count;
1697 }
1698 
1699 #define PGGS0_SHOW(N)						\
1700 	ssize_t pggs##N##_show(struct device *device,		\
1701 			       struct device_attribute *attr,	\
1702 			       char *buf)			\
1703 	{							\
1704 		return pggs_show(device, attr, buf, N);		\
1705 	}
1706 
1707 #define PGGS0_STORE(N)						\
1708 	ssize_t pggs##N##_store(struct device *device,		\
1709 				struct device_attribute *attr,	\
1710 				const char *buf,		\
1711 				size_t count)			\
1712 	{							\
1713 		return pggs_store(device, attr, buf, count, N);	\
1714 	}
1715 
1716 /* PGGS register show functions */
1717 static PGGS0_SHOW(0);
1718 static PGGS0_SHOW(1);
1719 static PGGS0_SHOW(2);
1720 static PGGS0_SHOW(3);
1721 
1722 /* PGGS register store functions */
1723 static PGGS0_STORE(0);
1724 static PGGS0_STORE(1);
1725 static PGGS0_STORE(2);
1726 static PGGS0_STORE(3);
1727 
1728 /* GGS register attributes */
1729 static DEVICE_ATTR_RW(ggs0);
1730 static DEVICE_ATTR_RW(ggs1);
1731 static DEVICE_ATTR_RW(ggs2);
1732 static DEVICE_ATTR_RW(ggs3);
1733 
1734 /* PGGS register attributes */
1735 static DEVICE_ATTR_RW(pggs0);
1736 static DEVICE_ATTR_RW(pggs1);
1737 static DEVICE_ATTR_RW(pggs2);
1738 static DEVICE_ATTR_RW(pggs3);
1739 
1740 static ssize_t feature_config_id_show(struct device *device,
1741 				      struct device_attribute *attr,
1742 				      char *buf)
1743 {
1744 	struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1745 
1746 	return sysfs_emit(buf, "%d\n", devinfo->feature_conf_id);
1747 }
1748 
1749 static ssize_t feature_config_id_store(struct device *device,
1750 				       struct device_attribute *attr,
1751 				       const char *buf, size_t count)
1752 {
1753 	u32 config_id;
1754 	int ret;
1755 	struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1756 
1757 	if (!buf)
1758 		return -EINVAL;
1759 
1760 	ret = kstrtou32(buf, 10, &config_id);
1761 	if (ret)
1762 		return ret;
1763 
1764 	devinfo->feature_conf_id = config_id;
1765 
1766 	return count;
1767 }
1768 
1769 static DEVICE_ATTR_RW(feature_config_id);
1770 
1771 static ssize_t feature_config_value_show(struct device *device,
1772 					 struct device_attribute *attr,
1773 					 char *buf)
1774 {
1775 	int ret;
1776 	u32 ret_payload[PAYLOAD_ARG_CNT];
1777 	struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1778 
1779 	ret = zynqmp_pm_get_feature_config(devinfo->feature_conf_id,
1780 					   ret_payload);
1781 	if (ret)
1782 		return ret;
1783 
1784 	return sysfs_emit(buf, "%d\n", ret_payload[1]);
1785 }
1786 
1787 static ssize_t feature_config_value_store(struct device *device,
1788 					  struct device_attribute *attr,
1789 					  const char *buf, size_t count)
1790 {
1791 	u32 value;
1792 	int ret;
1793 	struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1794 
1795 	if (!buf)
1796 		return -EINVAL;
1797 
1798 	ret = kstrtou32(buf, 10, &value);
1799 	if (ret)
1800 		return ret;
1801 
1802 	ret = zynqmp_pm_set_feature_config(devinfo->feature_conf_id,
1803 					   value);
1804 	if (ret)
1805 		return ret;
1806 
1807 	return count;
1808 }
1809 
1810 static DEVICE_ATTR_RW(feature_config_value);
1811 
1812 static struct attribute *zynqmp_firmware_attrs[] = {
1813 	&dev_attr_ggs0.attr,
1814 	&dev_attr_ggs1.attr,
1815 	&dev_attr_ggs2.attr,
1816 	&dev_attr_ggs3.attr,
1817 	&dev_attr_pggs0.attr,
1818 	&dev_attr_pggs1.attr,
1819 	&dev_attr_pggs2.attr,
1820 	&dev_attr_pggs3.attr,
1821 	&dev_attr_shutdown_scope.attr,
1822 	&dev_attr_health_status.attr,
1823 	&dev_attr_feature_config_id.attr,
1824 	&dev_attr_feature_config_value.attr,
1825 	NULL,
1826 };
1827 
1828 ATTRIBUTE_GROUPS(zynqmp_firmware);
1829 
1830 static int zynqmp_firmware_probe(struct platform_device *pdev)
1831 {
1832 	struct device *dev = &pdev->dev;
1833 	struct device_node *np;
1834 	struct zynqmp_devinfo *devinfo;
1835 	int ret;
1836 
1837 	ret = get_set_conduit_method(dev->of_node);
1838 	if (ret)
1839 		return ret;
1840 
1841 	np = of_find_compatible_node(NULL, NULL, "xlnx,zynqmp");
1842 	if (!np) {
1843 		np = of_find_compatible_node(NULL, NULL, "xlnx,versal");
1844 		if (!np)
1845 			return 0;
1846 
1847 		feature_check_enabled = true;
1848 	}
1849 
1850 	if (!feature_check_enabled) {
1851 		ret = do_feature_check_call(PM_FEATURE_CHECK);
1852 		if (ret >= 0)
1853 			feature_check_enabled = true;
1854 	}
1855 
1856 	of_node_put(np);
1857 
1858 	devinfo = devm_kzalloc(dev, sizeof(*devinfo), GFP_KERNEL);
1859 	if (!devinfo)
1860 		return -ENOMEM;
1861 
1862 	devinfo->dev = dev;
1863 
1864 	platform_set_drvdata(pdev, devinfo);
1865 
1866 	/* Check PM API version number */
1867 	ret = zynqmp_pm_get_api_version(&pm_api_version);
1868 	if (ret)
1869 		return ret;
1870 
1871 	if (pm_api_version < ZYNQMP_PM_VERSION) {
1872 		panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n",
1873 		      __func__,
1874 		      ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR,
1875 		      pm_api_version >> 16, pm_api_version & 0xFFFF);
1876 	}
1877 
1878 	pr_info("%s Platform Management API v%d.%d\n", __func__,
1879 		pm_api_version >> 16, pm_api_version & 0xFFFF);
1880 
1881 	/* Check trustzone version number */
1882 	ret = zynqmp_pm_get_trustzone_version(&pm_tz_version);
1883 	if (ret)
1884 		panic("Legacy trustzone found without version support\n");
1885 
1886 	if (pm_tz_version < ZYNQMP_TZ_VERSION)
1887 		panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n",
1888 		      __func__,
1889 		      ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR,
1890 		      pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1891 
1892 	pr_info("%s Trustzone version v%d.%d\n", __func__,
1893 		pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1894 
1895 	ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs,
1896 			      ARRAY_SIZE(firmware_devs), NULL, 0, NULL);
1897 	if (ret) {
1898 		dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret);
1899 		return ret;
1900 	}
1901 
1902 	zynqmp_pm_api_debugfs_init();
1903 
1904 	np = of_find_compatible_node(NULL, NULL, "xlnx,versal");
1905 	if (np) {
1906 		em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager",
1907 						       -1, NULL, 0);
1908 		if (IS_ERR(em_dev))
1909 			dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n");
1910 	}
1911 	of_node_put(np);
1912 
1913 	return of_platform_populate(dev->of_node, NULL, NULL, dev);
1914 }
1915 
1916 static int zynqmp_firmware_remove(struct platform_device *pdev)
1917 {
1918 	struct pm_api_feature_data *feature_data;
1919 	struct hlist_node *tmp;
1920 	int i;
1921 
1922 	mfd_remove_devices(&pdev->dev);
1923 	zynqmp_pm_api_debugfs_exit();
1924 
1925 	hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) {
1926 		hash_del(&feature_data->hentry);
1927 		kfree(feature_data);
1928 	}
1929 
1930 	platform_device_unregister(em_dev);
1931 
1932 	return 0;
1933 }
1934 
1935 static const struct of_device_id zynqmp_firmware_of_match[] = {
1936 	{.compatible = "xlnx,zynqmp-firmware"},
1937 	{.compatible = "xlnx,versal-firmware"},
1938 	{},
1939 };
1940 MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match);
1941 
1942 static struct platform_driver zynqmp_firmware_driver = {
1943 	.driver = {
1944 		.name = "zynqmp_firmware",
1945 		.of_match_table = zynqmp_firmware_of_match,
1946 		.dev_groups = zynqmp_firmware_groups,
1947 	},
1948 	.probe = zynqmp_firmware_probe,
1949 	.remove = zynqmp_firmware_remove,
1950 };
1951 module_platform_driver(zynqmp_firmware_driver);
1952