1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Xilinx Zynq MPSoC Firmware layer 4 * 5 * Copyright (C) 2014-2022 Xilinx, Inc. 6 * 7 * Michal Simek <michal.simek@amd.com> 8 * Davorin Mista <davorin.mista@aggios.com> 9 * Jolly Shah <jollys@xilinx.com> 10 * Rajan Vaja <rajanv@xilinx.com> 11 */ 12 13 #include <linux/arm-smccc.h> 14 #include <linux/compiler.h> 15 #include <linux/device.h> 16 #include <linux/init.h> 17 #include <linux/mfd/core.h> 18 #include <linux/module.h> 19 #include <linux/of.h> 20 #include <linux/of_platform.h> 21 #include <linux/slab.h> 22 #include <linux/uaccess.h> 23 #include <linux/hashtable.h> 24 25 #include <linux/firmware/xlnx-zynqmp.h> 26 #include <linux/firmware/xlnx-event-manager.h> 27 #include "zynqmp-debug.h" 28 29 /* Max HashMap Order for PM API feature check (1<<7 = 128) */ 30 #define PM_API_FEATURE_CHECK_MAX_ORDER 7 31 32 /* CRL registers and bitfields */ 33 #define CRL_APB_BASE 0xFF5E0000U 34 /* BOOT_PIN_CTRL- Used to control the mode pins after boot */ 35 #define CRL_APB_BOOT_PIN_CTRL (CRL_APB_BASE + (0x250U)) 36 /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */ 37 #define CRL_APB_BOOTPIN_CTRL_MASK 0xF0FU 38 39 /* IOCTL/QUERY feature payload size */ 40 #define FEATURE_PAYLOAD_SIZE 2 41 42 /* Firmware feature check version mask */ 43 #define FIRMWARE_VERSION_MASK GENMASK(15, 0) 44 45 static bool feature_check_enabled; 46 static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER); 47 static u32 ioctl_features[FEATURE_PAYLOAD_SIZE]; 48 static u32 query_features[FEATURE_PAYLOAD_SIZE]; 49 50 static struct platform_device *em_dev; 51 52 /** 53 * struct zynqmp_devinfo - Structure for Zynqmp device instance 54 * @dev: Device Pointer 55 * @feature_conf_id: Feature conf id 56 */ 57 struct zynqmp_devinfo { 58 struct device *dev; 59 u32 feature_conf_id; 60 }; 61 62 /** 63 * struct pm_api_feature_data - PM API Feature data 64 * @pm_api_id: PM API Id, used as key to index into hashmap 65 * @feature_status: status of PM API feature: valid, invalid 66 * @hentry: hlist_node that hooks this entry into hashtable 67 */ 68 struct pm_api_feature_data { 69 u32 pm_api_id; 70 int feature_status; 71 struct hlist_node hentry; 72 }; 73 74 static const struct mfd_cell firmware_devs[] = { 75 { 76 .name = "zynqmp_power_controller", 77 }, 78 }; 79 80 /** 81 * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes 82 * @ret_status: PMUFW return code 83 * 84 * Return: corresponding Linux error code 85 */ 86 static int zynqmp_pm_ret_code(u32 ret_status) 87 { 88 switch (ret_status) { 89 case XST_PM_SUCCESS: 90 case XST_PM_DOUBLE_REQ: 91 return 0; 92 case XST_PM_NO_FEATURE: 93 return -ENOTSUPP; 94 case XST_PM_NO_ACCESS: 95 return -EACCES; 96 case XST_PM_ABORT_SUSPEND: 97 return -ECANCELED; 98 case XST_PM_MULT_USER: 99 return -EUSERS; 100 case XST_PM_INTERNAL: 101 case XST_PM_CONFLICT: 102 case XST_PM_INVALID_NODE: 103 default: 104 return -EINVAL; 105 } 106 } 107 108 static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2, 109 u32 *ret_payload) 110 { 111 return -ENODEV; 112 } 113 114 /* 115 * PM function call wrapper 116 * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration 117 */ 118 static int (*do_fw_call)(u64, u64, u64, u32 *ret_payload) = do_fw_call_fail; 119 120 /** 121 * do_fw_call_smc() - Call system-level platform management layer (SMC) 122 * @arg0: Argument 0 to SMC call 123 * @arg1: Argument 1 to SMC call 124 * @arg2: Argument 2 to SMC call 125 * @ret_payload: Returned value array 126 * 127 * Invoke platform management function via SMC call (no hypervisor present). 128 * 129 * Return: Returns status, either success or error+reason 130 */ 131 static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2, 132 u32 *ret_payload) 133 { 134 struct arm_smccc_res res; 135 136 arm_smccc_smc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res); 137 138 if (ret_payload) { 139 ret_payload[0] = lower_32_bits(res.a0); 140 ret_payload[1] = upper_32_bits(res.a0); 141 ret_payload[2] = lower_32_bits(res.a1); 142 ret_payload[3] = upper_32_bits(res.a1); 143 } 144 145 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0); 146 } 147 148 /** 149 * do_fw_call_hvc() - Call system-level platform management layer (HVC) 150 * @arg0: Argument 0 to HVC call 151 * @arg1: Argument 1 to HVC call 152 * @arg2: Argument 2 to HVC call 153 * @ret_payload: Returned value array 154 * 155 * Invoke platform management function via HVC 156 * HVC-based for communication through hypervisor 157 * (no direct communication with ATF). 158 * 159 * Return: Returns status, either success or error+reason 160 */ 161 static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2, 162 u32 *ret_payload) 163 { 164 struct arm_smccc_res res; 165 166 arm_smccc_hvc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res); 167 168 if (ret_payload) { 169 ret_payload[0] = lower_32_bits(res.a0); 170 ret_payload[1] = upper_32_bits(res.a0); 171 ret_payload[2] = lower_32_bits(res.a1); 172 ret_payload[3] = upper_32_bits(res.a1); 173 } 174 175 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0); 176 } 177 178 static int __do_feature_check_call(const u32 api_id, u32 *ret_payload) 179 { 180 int ret; 181 u64 smc_arg[2]; 182 183 smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK; 184 smc_arg[1] = api_id; 185 186 ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload); 187 if (ret) 188 ret = -EOPNOTSUPP; 189 else 190 ret = ret_payload[1]; 191 192 return ret; 193 } 194 195 static int do_feature_check_call(const u32 api_id) 196 { 197 int ret; 198 u32 ret_payload[PAYLOAD_ARG_CNT]; 199 struct pm_api_feature_data *feature_data; 200 201 /* Check for existing entry in hash table for given api */ 202 hash_for_each_possible(pm_api_features_map, feature_data, hentry, 203 api_id) { 204 if (feature_data->pm_api_id == api_id) 205 return feature_data->feature_status; 206 } 207 208 /* Add new entry if not present */ 209 feature_data = kmalloc(sizeof(*feature_data), GFP_ATOMIC); 210 if (!feature_data) 211 return -ENOMEM; 212 213 feature_data->pm_api_id = api_id; 214 ret = __do_feature_check_call(api_id, ret_payload); 215 216 feature_data->feature_status = ret; 217 hash_add(pm_api_features_map, &feature_data->hentry, api_id); 218 219 if (api_id == PM_IOCTL) 220 /* Store supported IOCTL IDs mask */ 221 memcpy(ioctl_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4); 222 else if (api_id == PM_QUERY_DATA) 223 /* Store supported QUERY IDs mask */ 224 memcpy(query_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4); 225 226 return ret; 227 } 228 EXPORT_SYMBOL_GPL(zynqmp_pm_feature); 229 230 /** 231 * zynqmp_pm_feature() - Check whether given feature is supported or not and 232 * store supported IOCTL/QUERY ID mask 233 * @api_id: API ID to check 234 * 235 * Return: Returns status, either success or error+reason 236 */ 237 int zynqmp_pm_feature(const u32 api_id) 238 { 239 int ret; 240 241 if (!feature_check_enabled) 242 return 0; 243 244 ret = do_feature_check_call(api_id); 245 246 return ret; 247 } 248 249 /** 250 * zynqmp_pm_is_function_supported() - Check whether given IOCTL/QUERY function 251 * is supported or not 252 * @api_id: PM_IOCTL or PM_QUERY_DATA 253 * @id: IOCTL or QUERY function IDs 254 * 255 * Return: Returns status, either success or error+reason 256 */ 257 int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id) 258 { 259 int ret; 260 u32 *bit_mask; 261 262 /* Input arguments validation */ 263 if (id >= 64 || (api_id != PM_IOCTL && api_id != PM_QUERY_DATA)) 264 return -EINVAL; 265 266 /* Check feature check API version */ 267 ret = do_feature_check_call(PM_FEATURE_CHECK); 268 if (ret < 0) 269 return ret; 270 271 /* Check if feature check version 2 is supported or not */ 272 if ((ret & FIRMWARE_VERSION_MASK) == PM_API_VERSION_2) { 273 /* 274 * Call feature check for IOCTL/QUERY API to get IOCTL ID or 275 * QUERY ID feature status. 276 */ 277 ret = do_feature_check_call(api_id); 278 if (ret < 0) 279 return ret; 280 281 bit_mask = (api_id == PM_IOCTL) ? ioctl_features : query_features; 282 283 if ((bit_mask[(id / 32)] & BIT((id % 32))) == 0U) 284 return -EOPNOTSUPP; 285 } else { 286 return -ENODATA; 287 } 288 289 return 0; 290 } 291 EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported); 292 293 /** 294 * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer 295 * caller function depending on the configuration 296 * @pm_api_id: Requested PM-API call 297 * @arg0: Argument 0 to requested PM-API call 298 * @arg1: Argument 1 to requested PM-API call 299 * @arg2: Argument 2 to requested PM-API call 300 * @arg3: Argument 3 to requested PM-API call 301 * @ret_payload: Returned value array 302 * 303 * Invoke platform management function for SMC or HVC call, depending on 304 * configuration. 305 * Following SMC Calling Convention (SMCCC) for SMC64: 306 * Pm Function Identifier, 307 * PM_SIP_SVC + PM_API_ID = 308 * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) 309 * ((SMC_64) << FUNCID_CC_SHIFT) 310 * ((SIP_START) << FUNCID_OEN_SHIFT) 311 * ((PM_API_ID) & FUNCID_NUM_MASK)) 312 * 313 * PM_SIP_SVC - Registered ZynqMP SIP Service Call. 314 * PM_API_ID - Platform Management API ID. 315 * 316 * Return: Returns status, either success or error+reason 317 */ 318 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, 319 u32 arg2, u32 arg3, u32 *ret_payload) 320 { 321 /* 322 * Added SIP service call Function Identifier 323 * Make sure to stay in x0 register 324 */ 325 u64 smc_arg[4]; 326 int ret; 327 328 /* Check if feature is supported or not */ 329 ret = zynqmp_pm_feature(pm_api_id); 330 if (ret < 0) 331 return ret; 332 333 smc_arg[0] = PM_SIP_SVC | pm_api_id; 334 smc_arg[1] = ((u64)arg1 << 32) | arg0; 335 smc_arg[2] = ((u64)arg3 << 32) | arg2; 336 337 return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], ret_payload); 338 } 339 340 static u32 pm_api_version; 341 static u32 pm_tz_version; 342 static u32 pm_family_code; 343 static u32 pm_sub_family_code; 344 345 int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset) 346 { 347 int ret; 348 349 ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, sgi_num, reset, 0, 0, 350 NULL); 351 if (!ret) 352 return ret; 353 354 /* try old implementation as fallback strategy if above fails */ 355 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_REGISTER_SGI, sgi_num, 356 reset, NULL); 357 } 358 359 /** 360 * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware 361 * @version: Returned version value 362 * 363 * Return: Returns status, either success or error+reason 364 */ 365 int zynqmp_pm_get_api_version(u32 *version) 366 { 367 u32 ret_payload[PAYLOAD_ARG_CNT]; 368 int ret; 369 370 if (!version) 371 return -EINVAL; 372 373 /* Check is PM API version already verified */ 374 if (pm_api_version > 0) { 375 *version = pm_api_version; 376 return 0; 377 } 378 ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, ret_payload); 379 *version = ret_payload[1]; 380 381 return ret; 382 } 383 EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version); 384 385 /** 386 * zynqmp_pm_get_chipid - Get silicon ID registers 387 * @idcode: IDCODE register 388 * @version: version register 389 * 390 * Return: Returns the status of the operation and the idcode and version 391 * registers in @idcode and @version. 392 */ 393 int zynqmp_pm_get_chipid(u32 *idcode, u32 *version) 394 { 395 u32 ret_payload[PAYLOAD_ARG_CNT]; 396 int ret; 397 398 if (!idcode || !version) 399 return -EINVAL; 400 401 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload); 402 *idcode = ret_payload[1]; 403 *version = ret_payload[2]; 404 405 return ret; 406 } 407 EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid); 408 409 /** 410 * zynqmp_pm_get_family_info() - Get family info of platform 411 * @family: Returned family code value 412 * @subfamily: Returned sub-family code value 413 * 414 * Return: Returns status, either success or error+reason 415 */ 416 static int zynqmp_pm_get_family_info(u32 *family, u32 *subfamily) 417 { 418 u32 ret_payload[PAYLOAD_ARG_CNT]; 419 u32 idcode; 420 int ret; 421 422 /* Check is family or sub-family code already received */ 423 if (pm_family_code && pm_sub_family_code) { 424 *family = pm_family_code; 425 *subfamily = pm_sub_family_code; 426 return 0; 427 } 428 429 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload); 430 if (ret < 0) 431 return ret; 432 433 idcode = ret_payload[1]; 434 pm_family_code = FIELD_GET(FAMILY_CODE_MASK, idcode); 435 pm_sub_family_code = FIELD_GET(SUB_FAMILY_CODE_MASK, idcode); 436 *family = pm_family_code; 437 *subfamily = pm_sub_family_code; 438 439 return 0; 440 } 441 442 /** 443 * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version 444 * @version: Returned version value 445 * 446 * Return: Returns status, either success or error+reason 447 */ 448 static int zynqmp_pm_get_trustzone_version(u32 *version) 449 { 450 u32 ret_payload[PAYLOAD_ARG_CNT]; 451 int ret; 452 453 if (!version) 454 return -EINVAL; 455 456 /* Check is PM trustzone version already verified */ 457 if (pm_tz_version > 0) { 458 *version = pm_tz_version; 459 return 0; 460 } 461 ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, 0, 0, 462 0, 0, ret_payload); 463 *version = ret_payload[1]; 464 465 return ret; 466 } 467 468 /** 469 * get_set_conduit_method() - Choose SMC or HVC based communication 470 * @np: Pointer to the device_node structure 471 * 472 * Use SMC or HVC-based functions to communicate with EL2/EL3. 473 * 474 * Return: Returns 0 on success or error code 475 */ 476 static int get_set_conduit_method(struct device_node *np) 477 { 478 const char *method; 479 480 if (of_property_read_string(np, "method", &method)) { 481 pr_warn("%s missing \"method\" property\n", __func__); 482 return -ENXIO; 483 } 484 485 if (!strcmp("hvc", method)) { 486 do_fw_call = do_fw_call_hvc; 487 } else if (!strcmp("smc", method)) { 488 do_fw_call = do_fw_call_smc; 489 } else { 490 pr_warn("%s Invalid \"method\" property: %s\n", 491 __func__, method); 492 return -EINVAL; 493 } 494 495 return 0; 496 } 497 498 /** 499 * zynqmp_pm_query_data() - Get query data from firmware 500 * @qdata: Variable to the zynqmp_pm_query_data structure 501 * @out: Returned output value 502 * 503 * Return: Returns status, either success or error+reason 504 */ 505 int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out) 506 { 507 int ret; 508 509 ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, qdata.qid, qdata.arg1, 510 qdata.arg2, qdata.arg3, out); 511 512 /* 513 * For clock name query, all bytes in SMC response are clock name 514 * characters and return code is always success. For invalid clocks, 515 * clock name bytes would be zeros. 516 */ 517 return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret; 518 } 519 EXPORT_SYMBOL_GPL(zynqmp_pm_query_data); 520 521 /** 522 * zynqmp_pm_clock_enable() - Enable the clock for given id 523 * @clock_id: ID of the clock to be enabled 524 * 525 * This function is used by master to enable the clock 526 * including peripherals and PLL clocks. 527 * 528 * Return: Returns status, either success or error+reason 529 */ 530 int zynqmp_pm_clock_enable(u32 clock_id) 531 { 532 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL); 533 } 534 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable); 535 536 /** 537 * zynqmp_pm_clock_disable() - Disable the clock for given id 538 * @clock_id: ID of the clock to be disable 539 * 540 * This function is used by master to disable the clock 541 * including peripherals and PLL clocks. 542 * 543 * Return: Returns status, either success or error+reason 544 */ 545 int zynqmp_pm_clock_disable(u32 clock_id) 546 { 547 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL); 548 } 549 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable); 550 551 /** 552 * zynqmp_pm_clock_getstate() - Get the clock state for given id 553 * @clock_id: ID of the clock to be queried 554 * @state: 1/0 (Enabled/Disabled) 555 * 556 * This function is used by master to get the state of clock 557 * including peripherals and PLL clocks. 558 * 559 * Return: Returns status, either success or error+reason 560 */ 561 int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state) 562 { 563 u32 ret_payload[PAYLOAD_ARG_CNT]; 564 int ret; 565 566 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, clock_id, 0, 567 0, 0, ret_payload); 568 *state = ret_payload[1]; 569 570 return ret; 571 } 572 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate); 573 574 /** 575 * zynqmp_pm_clock_setdivider() - Set the clock divider for given id 576 * @clock_id: ID of the clock 577 * @divider: divider value 578 * 579 * This function is used by master to set divider for any clock 580 * to achieve desired rate. 581 * 582 * Return: Returns status, either success or error+reason 583 */ 584 int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider) 585 { 586 return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider, 587 0, 0, NULL); 588 } 589 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider); 590 591 /** 592 * zynqmp_pm_clock_getdivider() - Get the clock divider for given id 593 * @clock_id: ID of the clock 594 * @divider: divider value 595 * 596 * This function is used by master to get divider values 597 * for any clock. 598 * 599 * Return: Returns status, either success or error+reason 600 */ 601 int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider) 602 { 603 u32 ret_payload[PAYLOAD_ARG_CNT]; 604 int ret; 605 606 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, clock_id, 0, 607 0, 0, ret_payload); 608 *divider = ret_payload[1]; 609 610 return ret; 611 } 612 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider); 613 614 /** 615 * zynqmp_pm_clock_setrate() - Set the clock rate for given id 616 * @clock_id: ID of the clock 617 * @rate: rate value in hz 618 * 619 * This function is used by master to set rate for any clock. 620 * 621 * Return: Returns status, either success or error+reason 622 */ 623 int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate) 624 { 625 return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id, 626 lower_32_bits(rate), 627 upper_32_bits(rate), 628 0, NULL); 629 } 630 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate); 631 632 /** 633 * zynqmp_pm_clock_getrate() - Get the clock rate for given id 634 * @clock_id: ID of the clock 635 * @rate: rate value in hz 636 * 637 * This function is used by master to get rate 638 * for any clock. 639 * 640 * Return: Returns status, either success or error+reason 641 */ 642 int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate) 643 { 644 u32 ret_payload[PAYLOAD_ARG_CNT]; 645 int ret; 646 647 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, clock_id, 0, 648 0, 0, ret_payload); 649 *rate = ((u64)ret_payload[2] << 32) | ret_payload[1]; 650 651 return ret; 652 } 653 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate); 654 655 /** 656 * zynqmp_pm_clock_setparent() - Set the clock parent for given id 657 * @clock_id: ID of the clock 658 * @parent_id: parent id 659 * 660 * This function is used by master to set parent for any clock. 661 * 662 * Return: Returns status, either success or error+reason 663 */ 664 int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) 665 { 666 return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id, 667 parent_id, 0, 0, NULL); 668 } 669 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent); 670 671 /** 672 * zynqmp_pm_clock_getparent() - Get the clock parent for given id 673 * @clock_id: ID of the clock 674 * @parent_id: parent id 675 * 676 * This function is used by master to get parent index 677 * for any clock. 678 * 679 * Return: Returns status, either success or error+reason 680 */ 681 int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) 682 { 683 u32 ret_payload[PAYLOAD_ARG_CNT]; 684 int ret; 685 686 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, clock_id, 0, 687 0, 0, ret_payload); 688 *parent_id = ret_payload[1]; 689 690 return ret; 691 } 692 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent); 693 694 /** 695 * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode 696 * 697 * @clk_id: PLL clock ID 698 * @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT) 699 * 700 * This function sets PLL mode 701 * 702 * Return: Returns status, either success or error+reason 703 */ 704 int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode) 705 { 706 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_MODE, 707 clk_id, mode, NULL); 708 } 709 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode); 710 711 /** 712 * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode 713 * 714 * @clk_id: PLL clock ID 715 * @mode: PLL mode 716 * 717 * This function return current PLL mode 718 * 719 * Return: Returns status, either success or error+reason 720 */ 721 int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode) 722 { 723 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_MODE, 724 clk_id, 0, mode); 725 } 726 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode); 727 728 /** 729 * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data 730 * 731 * @clk_id: PLL clock ID 732 * @data: fraction data 733 * 734 * This function sets fraction data. 735 * It is valid for fraction mode only. 736 * 737 * Return: Returns status, either success or error+reason 738 */ 739 int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data) 740 { 741 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_DATA, 742 clk_id, data, NULL); 743 } 744 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data); 745 746 /** 747 * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data 748 * 749 * @clk_id: PLL clock ID 750 * @data: fraction data 751 * 752 * This function returns fraction data value. 753 * 754 * Return: Returns status, either success or error+reason 755 */ 756 int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data) 757 { 758 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_DATA, 759 clk_id, 0, data); 760 } 761 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data); 762 763 /** 764 * zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device 765 * 766 * @node_id: Node ID of the device 767 * @type: Type of tap delay to set (input/output) 768 * @value: Value to set fot the tap delay 769 * 770 * This function sets input/output tap delay for the SD device. 771 * 772 * Return: Returns status, either success or error+reason 773 */ 774 int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value) 775 { 776 u32 reg = (type == PM_TAPDELAY_INPUT) ? SD_ITAPDLY : SD_OTAPDLYSEL; 777 u32 mask = (node_id == NODE_SD_0) ? GENMASK(15, 0) : GENMASK(31, 16); 778 779 if (value) { 780 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, 781 IOCTL_SET_SD_TAPDELAY, 782 type, value, NULL); 783 } 784 785 /* 786 * Work around completely misdesigned firmware API on Xilinx ZynqMP. 787 * The IOCTL_SET_SD_TAPDELAY firmware call allows the caller to only 788 * ever set IOU_SLCR SD_ITAPDLY Register SD0_ITAPDLYENA/SD1_ITAPDLYENA 789 * bits, but there is no matching call to clear those bits. If those 790 * bits are not cleared, SDMMC tuning may fail. 791 * 792 * Luckily, there are PM_MMIO_READ/PM_MMIO_WRITE calls which seem to 793 * allow complete unrestricted access to all address space, including 794 * IOU_SLCR SD_ITAPDLY Register and all the other registers, access 795 * to which was supposed to be protected by the current firmware API. 796 * 797 * Use PM_MMIO_READ/PM_MMIO_WRITE to re-implement the missing counter 798 * part of IOCTL_SET_SD_TAPDELAY which clears SDx_ITAPDLYENA bits. 799 */ 800 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, reg, mask, 0, 0, NULL); 801 } 802 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay); 803 804 /** 805 * zynqmp_pm_sd_dll_reset() - Reset DLL logic 806 * 807 * @node_id: Node ID of the device 808 * @type: Reset type 809 * 810 * This function resets DLL logic for the SD device. 811 * 812 * Return: Returns status, either success or error+reason 813 */ 814 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type) 815 { 816 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET, 817 type, 0, NULL); 818 } 819 EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset); 820 821 /** 822 * zynqmp_pm_ospi_mux_select() - OSPI Mux selection 823 * 824 * @dev_id: Device Id of the OSPI device. 825 * @select: OSPI Mux select value. 826 * 827 * This function select the OSPI Mux. 828 * 829 * Return: Returns status, either success or error+reason 830 */ 831 int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select) 832 { 833 return zynqmp_pm_invoke_fn(PM_IOCTL, dev_id, IOCTL_OSPI_MUX_SELECT, 834 select, 0, NULL); 835 } 836 EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select); 837 838 /** 839 * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs) 840 * @index: GGS register index 841 * @value: Register value to be written 842 * 843 * This function writes value to GGS register. 844 * 845 * Return: Returns status, either success or error+reason 846 */ 847 int zynqmp_pm_write_ggs(u32 index, u32 value) 848 { 849 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS, 850 index, value, NULL); 851 } 852 EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs); 853 854 /** 855 * zynqmp_pm_read_ggs() - PM API for reading global general storage (ggs) 856 * @index: GGS register index 857 * @value: Register value to be written 858 * 859 * This function returns GGS register value. 860 * 861 * Return: Returns status, either success or error+reason 862 */ 863 int zynqmp_pm_read_ggs(u32 index, u32 *value) 864 { 865 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS, 866 index, 0, value); 867 } 868 EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs); 869 870 /** 871 * zynqmp_pm_write_pggs() - PM API for writing persistent global general 872 * storage (pggs) 873 * @index: PGGS register index 874 * @value: Register value to be written 875 * 876 * This function writes value to PGGS register. 877 * 878 * Return: Returns status, either success or error+reason 879 */ 880 int zynqmp_pm_write_pggs(u32 index, u32 value) 881 { 882 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value, 883 NULL); 884 } 885 EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs); 886 887 /** 888 * zynqmp_pm_read_pggs() - PM API for reading persistent global general 889 * storage (pggs) 890 * @index: PGGS register index 891 * @value: Register value to be written 892 * 893 * This function returns PGGS register value. 894 * 895 * Return: Returns status, either success or error+reason 896 */ 897 int zynqmp_pm_read_pggs(u32 index, u32 *value) 898 { 899 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0, 900 value); 901 } 902 EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs); 903 904 int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value) 905 { 906 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_TAPDELAY_BYPASS, 907 index, value, NULL); 908 } 909 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass); 910 911 /** 912 * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status 913 * @value: Status value to be written 914 * 915 * This function sets healthy bit value to indicate boot health status 916 * to firmware. 917 * 918 * Return: Returns status, either success or error+reason 919 */ 920 int zynqmp_pm_set_boot_health_status(u32 value) 921 { 922 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS, 923 value, 0, NULL); 924 } 925 926 /** 927 * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release) 928 * @reset: Reset to be configured 929 * @assert_flag: Flag stating should reset be asserted (1) or 930 * released (0) 931 * 932 * Return: Returns status, either success or error+reason 933 */ 934 int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset, 935 const enum zynqmp_pm_reset_action assert_flag) 936 { 937 return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag, 938 0, 0, NULL); 939 } 940 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert); 941 942 /** 943 * zynqmp_pm_reset_get_status - Get status of the reset 944 * @reset: Reset whose status should be returned 945 * @status: Returned status 946 * 947 * Return: Returns status, either success or error+reason 948 */ 949 int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status) 950 { 951 u32 ret_payload[PAYLOAD_ARG_CNT]; 952 int ret; 953 954 if (!status) 955 return -EINVAL; 956 957 ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, reset, 0, 958 0, 0, ret_payload); 959 *status = ret_payload[1]; 960 961 return ret; 962 } 963 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status); 964 965 /** 966 * zynqmp_pm_fpga_load - Perform the fpga load 967 * @address: Address to write to 968 * @size: pl bitstream size 969 * @flags: Bitstream type 970 * -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration 971 * -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration 972 * 973 * This function provides access to pmufw. To transfer 974 * the required bitstream into PL. 975 * 976 * Return: Returns status, either success or error+reason 977 */ 978 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags) 979 { 980 u32 ret_payload[PAYLOAD_ARG_CNT]; 981 int ret; 982 983 ret = zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address), 984 upper_32_bits(address), size, flags, 985 ret_payload); 986 if (ret_payload[0]) 987 return -ret_payload[0]; 988 989 return ret; 990 } 991 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load); 992 993 /** 994 * zynqmp_pm_fpga_get_status - Read value from PCAP status register 995 * @value: Value to read 996 * 997 * This function provides access to the pmufw to get the PCAP 998 * status 999 * 1000 * Return: Returns status, either success or error+reason 1001 */ 1002 int zynqmp_pm_fpga_get_status(u32 *value) 1003 { 1004 u32 ret_payload[PAYLOAD_ARG_CNT]; 1005 int ret; 1006 1007 if (!value) 1008 return -EINVAL; 1009 1010 ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload); 1011 *value = ret_payload[1]; 1012 1013 return ret; 1014 } 1015 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status); 1016 1017 /** 1018 * zynqmp_pm_fpga_get_config_status - Get the FPGA configuration status. 1019 * @value: Buffer to store FPGA configuration status. 1020 * 1021 * This function provides access to the pmufw to get the FPGA configuration 1022 * status 1023 * 1024 * Return: 0 on success, a negative value on error 1025 */ 1026 int zynqmp_pm_fpga_get_config_status(u32 *value) 1027 { 1028 u32 ret_payload[PAYLOAD_ARG_CNT]; 1029 u32 buf, lower_addr, upper_addr; 1030 int ret; 1031 1032 if (!value) 1033 return -EINVAL; 1034 1035 lower_addr = lower_32_bits((u64)&buf); 1036 upper_addr = upper_32_bits((u64)&buf); 1037 1038 ret = zynqmp_pm_invoke_fn(PM_FPGA_READ, 1039 XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET, 1040 lower_addr, upper_addr, 1041 XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG, 1042 ret_payload); 1043 1044 *value = ret_payload[1]; 1045 1046 return ret; 1047 } 1048 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_config_status); 1049 1050 /** 1051 * zynqmp_pm_pinctrl_request - Request Pin from firmware 1052 * @pin: Pin number to request 1053 * 1054 * This function requests pin from firmware. 1055 * 1056 * Return: Returns status, either success or error+reason. 1057 */ 1058 int zynqmp_pm_pinctrl_request(const u32 pin) 1059 { 1060 return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, pin, 0, 0, 0, NULL); 1061 } 1062 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request); 1063 1064 /** 1065 * zynqmp_pm_pinctrl_release - Inform firmware that Pin control is released 1066 * @pin: Pin number to release 1067 * 1068 * This function release pin from firmware. 1069 * 1070 * Return: Returns status, either success or error+reason. 1071 */ 1072 int zynqmp_pm_pinctrl_release(const u32 pin) 1073 { 1074 return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, pin, 0, 0, 0, NULL); 1075 } 1076 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release); 1077 1078 /** 1079 * zynqmp_pm_pinctrl_get_function - Read function id set for the given pin 1080 * @pin: Pin number 1081 * @id: Buffer to store function ID 1082 * 1083 * This function provides the function currently set for the given pin. 1084 * 1085 * Return: Returns status, either success or error+reason 1086 */ 1087 int zynqmp_pm_pinctrl_get_function(const u32 pin, u32 *id) 1088 { 1089 u32 ret_payload[PAYLOAD_ARG_CNT]; 1090 int ret; 1091 1092 if (!id) 1093 return -EINVAL; 1094 1095 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_GET_FUNCTION, pin, 0, 1096 0, 0, ret_payload); 1097 *id = ret_payload[1]; 1098 1099 return ret; 1100 } 1101 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_function); 1102 1103 /** 1104 * zynqmp_pm_pinctrl_set_function - Set requested function for the pin 1105 * @pin: Pin number 1106 * @id: Function ID to set 1107 * 1108 * This function sets requested function for the given pin. 1109 * 1110 * Return: Returns status, either success or error+reason. 1111 */ 1112 int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id) 1113 { 1114 return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, pin, id, 1115 0, 0, NULL); 1116 } 1117 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function); 1118 1119 /** 1120 * zynqmp_pm_pinctrl_get_config - Get configuration parameter for the pin 1121 * @pin: Pin number 1122 * @param: Parameter to get 1123 * @value: Buffer to store parameter value 1124 * 1125 * This function gets requested configuration parameter for the given pin. 1126 * 1127 * Return: Returns status, either success or error+reason. 1128 */ 1129 int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param, 1130 u32 *value) 1131 { 1132 u32 ret_payload[PAYLOAD_ARG_CNT]; 1133 int ret; 1134 1135 if (!value) 1136 return -EINVAL; 1137 1138 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, pin, param, 1139 0, 0, ret_payload); 1140 *value = ret_payload[1]; 1141 1142 return ret; 1143 } 1144 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_config); 1145 1146 /** 1147 * zynqmp_pm_pinctrl_set_config - Set configuration parameter for the pin 1148 * @pin: Pin number 1149 * @param: Parameter to set 1150 * @value: Parameter value to set 1151 * 1152 * This function sets requested configuration parameter for the given pin. 1153 * 1154 * Return: Returns status, either success or error+reason. 1155 */ 1156 int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param, 1157 u32 value) 1158 { 1159 int ret; 1160 1161 if (pm_family_code == ZYNQMP_FAMILY_CODE && 1162 param == PM_PINCTRL_CONFIG_TRI_STATE) { 1163 ret = zynqmp_pm_feature(PM_PINCTRL_CONFIG_PARAM_SET); 1164 if (ret < PM_PINCTRL_PARAM_SET_VERSION) 1165 return -EOPNOTSUPP; 1166 } 1167 1168 return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, pin, 1169 param, value, 0, NULL); 1170 } 1171 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config); 1172 1173 /** 1174 * zynqmp_pm_bootmode_read() - PM Config API for read bootpin status 1175 * @ps_mode: Returned output value of ps_mode 1176 * 1177 * This API function is to be used for notify the power management controller 1178 * to read bootpin status. 1179 * 1180 * Return: status, either success or error+reason 1181 */ 1182 unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode) 1183 { 1184 unsigned int ret; 1185 u32 ret_payload[PAYLOAD_ARG_CNT]; 1186 1187 ret = zynqmp_pm_invoke_fn(PM_MMIO_READ, CRL_APB_BOOT_PIN_CTRL, 0, 1188 0, 0, ret_payload); 1189 1190 *ps_mode = ret_payload[1]; 1191 1192 return ret; 1193 } 1194 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_read); 1195 1196 /** 1197 * zynqmp_pm_bootmode_write() - PM Config API for Configure bootpin 1198 * @ps_mode: Value to be written to the bootpin ctrl register 1199 * 1200 * This API function is to be used for notify the power management controller 1201 * to configure bootpin. 1202 * 1203 * Return: Returns status, either success or error+reason 1204 */ 1205 int zynqmp_pm_bootmode_write(u32 ps_mode) 1206 { 1207 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, CRL_APB_BOOT_PIN_CTRL, 1208 CRL_APB_BOOTPIN_CTRL_MASK, ps_mode, 0, NULL); 1209 } 1210 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write); 1211 1212 /** 1213 * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller 1214 * master has initialized its own power management 1215 * 1216 * Return: Returns status, either success or error+reason 1217 * 1218 * This API function is to be used for notify the power management controller 1219 * about the completed power management initialization. 1220 */ 1221 int zynqmp_pm_init_finalize(void) 1222 { 1223 return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL); 1224 } 1225 EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize); 1226 1227 /** 1228 * zynqmp_pm_set_suspend_mode() - Set system suspend mode 1229 * @mode: Mode to set for system suspend 1230 * 1231 * This API function is used to set mode of system suspend. 1232 * 1233 * Return: Returns status, either success or error+reason 1234 */ 1235 int zynqmp_pm_set_suspend_mode(u32 mode) 1236 { 1237 return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL); 1238 } 1239 EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode); 1240 1241 /** 1242 * zynqmp_pm_request_node() - Request a node with specific capabilities 1243 * @node: Node ID of the slave 1244 * @capabilities: Requested capabilities of the slave 1245 * @qos: Quality of service (not supported) 1246 * @ack: Flag to specify whether acknowledge is requested 1247 * 1248 * This function is used by master to request particular node from firmware. 1249 * Every master must request node before using it. 1250 * 1251 * Return: Returns status, either success or error+reason 1252 */ 1253 int zynqmp_pm_request_node(const u32 node, const u32 capabilities, 1254 const u32 qos, const enum zynqmp_pm_request_ack ack) 1255 { 1256 return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities, 1257 qos, ack, NULL); 1258 } 1259 EXPORT_SYMBOL_GPL(zynqmp_pm_request_node); 1260 1261 /** 1262 * zynqmp_pm_release_node() - Release a node 1263 * @node: Node ID of the slave 1264 * 1265 * This function is used by master to inform firmware that master 1266 * has released node. Once released, master must not use that node 1267 * without re-request. 1268 * 1269 * Return: Returns status, either success or error+reason 1270 */ 1271 int zynqmp_pm_release_node(const u32 node) 1272 { 1273 return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL); 1274 } 1275 EXPORT_SYMBOL_GPL(zynqmp_pm_release_node); 1276 1277 /** 1278 * zynqmp_pm_get_rpu_mode() - Get RPU mode 1279 * @node_id: Node ID of the device 1280 * @rpu_mode: return by reference value 1281 * either split or lockstep 1282 * 1283 * Return: return 0 on success or error+reason. 1284 * if success, then rpu_mode will be set 1285 * to current rpu mode. 1286 */ 1287 int zynqmp_pm_get_rpu_mode(u32 node_id, enum rpu_oper_mode *rpu_mode) 1288 { 1289 u32 ret_payload[PAYLOAD_ARG_CNT]; 1290 int ret; 1291 1292 ret = zynqmp_pm_invoke_fn(PM_IOCTL, node_id, 1293 IOCTL_GET_RPU_OPER_MODE, 0, 0, ret_payload); 1294 1295 /* only set rpu_mode if no error */ 1296 if (ret == XST_PM_SUCCESS) 1297 *rpu_mode = ret_payload[0]; 1298 1299 return ret; 1300 } 1301 EXPORT_SYMBOL_GPL(zynqmp_pm_get_rpu_mode); 1302 1303 /** 1304 * zynqmp_pm_set_rpu_mode() - Set RPU mode 1305 * @node_id: Node ID of the device 1306 * @rpu_mode: Argument 1 to requested IOCTL call. either split or lockstep 1307 * 1308 * This function is used to set RPU mode to split or 1309 * lockstep 1310 * 1311 * Return: Returns status, either success or error+reason 1312 */ 1313 int zynqmp_pm_set_rpu_mode(u32 node_id, enum rpu_oper_mode rpu_mode) 1314 { 1315 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, 1316 IOCTL_SET_RPU_OPER_MODE, (u32)rpu_mode, 1317 0, NULL); 1318 } 1319 EXPORT_SYMBOL_GPL(zynqmp_pm_set_rpu_mode); 1320 1321 /** 1322 * zynqmp_pm_set_tcm_config - configure TCM 1323 * @node_id: Firmware specific TCM subsystem ID 1324 * @tcm_mode: Argument 1 to requested IOCTL call 1325 * either PM_RPU_TCM_COMB or PM_RPU_TCM_SPLIT 1326 * 1327 * This function is used to set RPU mode to split or combined 1328 * 1329 * Return: status: 0 for success, else failure 1330 */ 1331 int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode) 1332 { 1333 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, 1334 IOCTL_TCM_COMB_CONFIG, (u32)tcm_mode, 0, 1335 NULL); 1336 } 1337 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tcm_config); 1338 1339 /** 1340 * zynqmp_pm_force_pwrdwn - PM call to request for another PU or subsystem to 1341 * be powered down forcefully 1342 * @node: Node ID of the targeted PU or subsystem 1343 * @ack: Flag to specify whether acknowledge is requested 1344 * 1345 * Return: status, either success or error+reason 1346 */ 1347 int zynqmp_pm_force_pwrdwn(const u32 node, 1348 const enum zynqmp_pm_request_ack ack) 1349 { 1350 return zynqmp_pm_invoke_fn(PM_FORCE_POWERDOWN, node, ack, 0, 0, NULL); 1351 } 1352 EXPORT_SYMBOL_GPL(zynqmp_pm_force_pwrdwn); 1353 1354 /** 1355 * zynqmp_pm_request_wake - PM call to wake up selected master or subsystem 1356 * @node: Node ID of the master or subsystem 1357 * @set_addr: Specifies whether the address argument is relevant 1358 * @address: Address from which to resume when woken up 1359 * @ack: Flag to specify whether acknowledge requested 1360 * 1361 * Return: status, either success or error+reason 1362 */ 1363 int zynqmp_pm_request_wake(const u32 node, 1364 const bool set_addr, 1365 const u64 address, 1366 const enum zynqmp_pm_request_ack ack) 1367 { 1368 /* set_addr flag is encoded into 1st bit of address */ 1369 return zynqmp_pm_invoke_fn(PM_REQUEST_WAKEUP, node, address | set_addr, 1370 address >> 32, ack, NULL); 1371 } 1372 EXPORT_SYMBOL_GPL(zynqmp_pm_request_wake); 1373 1374 /** 1375 * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves 1376 * @node: Node ID of the slave 1377 * @capabilities: Requested capabilities of the slave 1378 * @qos: Quality of service (not supported) 1379 * @ack: Flag to specify whether acknowledge is requested 1380 * 1381 * This API function is to be used for slaves a PU already has requested 1382 * to change its capabilities. 1383 * 1384 * Return: Returns status, either success or error+reason 1385 */ 1386 int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, 1387 const u32 qos, 1388 const enum zynqmp_pm_request_ack ack) 1389 { 1390 return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities, 1391 qos, ack, NULL); 1392 } 1393 EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement); 1394 1395 /** 1396 * zynqmp_pm_load_pdi - Load and process PDI 1397 * @src: Source device where PDI is located 1398 * @address: PDI src address 1399 * 1400 * This function provides support to load PDI from linux 1401 * 1402 * Return: Returns status, either success or error+reason 1403 */ 1404 int zynqmp_pm_load_pdi(const u32 src, const u64 address) 1405 { 1406 return zynqmp_pm_invoke_fn(PM_LOAD_PDI, src, 1407 lower_32_bits(address), 1408 upper_32_bits(address), 0, NULL); 1409 } 1410 EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi); 1411 1412 /** 1413 * zynqmp_pm_aes_engine - Access AES hardware to encrypt/decrypt the data using 1414 * AES-GCM core. 1415 * @address: Address of the AesParams structure. 1416 * @out: Returned output value 1417 * 1418 * Return: Returns status, either success or error code. 1419 */ 1420 int zynqmp_pm_aes_engine(const u64 address, u32 *out) 1421 { 1422 u32 ret_payload[PAYLOAD_ARG_CNT]; 1423 int ret; 1424 1425 if (!out) 1426 return -EINVAL; 1427 1428 ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address), 1429 lower_32_bits(address), 1430 0, 0, ret_payload); 1431 *out = ret_payload[1]; 1432 1433 return ret; 1434 } 1435 EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine); 1436 1437 /** 1438 * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash 1439 * @address: Address of the data/ Address of output buffer where 1440 * hash should be stored. 1441 * @size: Size of the data. 1442 * @flags: 1443 * BIT(0) - for initializing csudma driver and SHA3(Here address 1444 * and size inputs can be NULL). 1445 * BIT(1) - to call Sha3_Update API which can be called multiple 1446 * times when data is not contiguous. 1447 * BIT(2) - to get final hash of the whole updated data. 1448 * Hash will be overwritten at provided address with 1449 * 48 bytes. 1450 * 1451 * Return: Returns status, either success or error code. 1452 */ 1453 int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags) 1454 { 1455 u32 lower_addr = lower_32_bits(address); 1456 u32 upper_addr = upper_32_bits(address); 1457 1458 return zynqmp_pm_invoke_fn(PM_SECURE_SHA, upper_addr, lower_addr, 1459 size, flags, NULL); 1460 } 1461 EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash); 1462 1463 /** 1464 * zynqmp_pm_register_notifier() - PM API for register a subsystem 1465 * to be notified about specific 1466 * event/error. 1467 * @node: Node ID to which the event is related. 1468 * @event: Event Mask of Error events for which wants to get notified. 1469 * @wake: Wake subsystem upon capturing the event if value 1 1470 * @enable: Enable the registration for value 1, disable for value 0 1471 * 1472 * This function is used to register/un-register for particular node-event 1473 * combination in firmware. 1474 * 1475 * Return: Returns status, either success or error+reason 1476 */ 1477 1478 int zynqmp_pm_register_notifier(const u32 node, const u32 event, 1479 const u32 wake, const u32 enable) 1480 { 1481 return zynqmp_pm_invoke_fn(PM_REGISTER_NOTIFIER, node, event, 1482 wake, enable, NULL); 1483 } 1484 EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier); 1485 1486 /** 1487 * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart 1488 * @type: Shutdown or restart? 0 for shutdown, 1 for restart 1489 * @subtype: Specifies which system should be restarted or shut down 1490 * 1491 * Return: Returns status, either success or error+reason 1492 */ 1493 int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype) 1494 { 1495 return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, type, subtype, 1496 0, 0, NULL); 1497 } 1498 1499 /** 1500 * zynqmp_pm_set_feature_config - PM call to request IOCTL for feature config 1501 * @id: The config ID of the feature to be configured 1502 * @value: The config value of the feature to be configured 1503 * 1504 * Return: Returns 0 on success or error value on failure. 1505 */ 1506 int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value) 1507 { 1508 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_FEATURE_CONFIG, 1509 id, value, NULL); 1510 } 1511 1512 /** 1513 * zynqmp_pm_get_feature_config - PM call to get value of configured feature 1514 * @id: The config id of the feature to be queried 1515 * @payload: Returned value array 1516 * 1517 * Return: Returns 0 on success or error value on failure. 1518 */ 1519 int zynqmp_pm_get_feature_config(enum pm_feature_config_id id, 1520 u32 *payload) 1521 { 1522 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_FEATURE_CONFIG, 1523 id, 0, payload); 1524 } 1525 1526 /** 1527 * zynqmp_pm_set_sd_config - PM call to set value of SD config registers 1528 * @node: SD node ID 1529 * @config: The config type of SD registers 1530 * @value: Value to be set 1531 * 1532 * Return: Returns 0 on success or error value on failure. 1533 */ 1534 int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value) 1535 { 1536 return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_SD_CONFIG, 1537 config, value, NULL); 1538 } 1539 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_config); 1540 1541 /** 1542 * zynqmp_pm_set_gem_config - PM call to set value of GEM config registers 1543 * @node: GEM node ID 1544 * @config: The config type of GEM registers 1545 * @value: Value to be set 1546 * 1547 * Return: Returns 0 on success or error value on failure. 1548 */ 1549 int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config, 1550 u32 value) 1551 { 1552 return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_GEM_CONFIG, 1553 config, value, NULL); 1554 } 1555 EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config); 1556 1557 /** 1558 * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope 1559 * @subtype: Shutdown subtype 1560 * @name: Matching string for scope argument 1561 * 1562 * This struct encapsulates mapping between shutdown scope ID and string. 1563 */ 1564 struct zynqmp_pm_shutdown_scope { 1565 const enum zynqmp_pm_shutdown_subtype subtype; 1566 const char *name; 1567 }; 1568 1569 static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = { 1570 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = { 1571 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM, 1572 .name = "subsystem", 1573 }, 1574 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = { 1575 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY, 1576 .name = "ps_only", 1577 }, 1578 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = { 1579 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM, 1580 .name = "system", 1581 }, 1582 }; 1583 1584 static struct zynqmp_pm_shutdown_scope *selected_scope = 1585 &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM]; 1586 1587 /** 1588 * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid 1589 * @scope_string: Shutdown scope string 1590 * 1591 * Return: Return pointer to matching shutdown scope struct from 1592 * array of available options in system if string is valid, 1593 * otherwise returns NULL. 1594 */ 1595 static struct zynqmp_pm_shutdown_scope* 1596 zynqmp_pm_is_shutdown_scope_valid(const char *scope_string) 1597 { 1598 int count; 1599 1600 for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++) 1601 if (sysfs_streq(scope_string, shutdown_scopes[count].name)) 1602 return &shutdown_scopes[count]; 1603 1604 return NULL; 1605 } 1606 1607 static ssize_t shutdown_scope_show(struct device *device, 1608 struct device_attribute *attr, 1609 char *buf) 1610 { 1611 int i; 1612 1613 for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) { 1614 if (&shutdown_scopes[i] == selected_scope) { 1615 strcat(buf, "["); 1616 strcat(buf, shutdown_scopes[i].name); 1617 strcat(buf, "]"); 1618 } else { 1619 strcat(buf, shutdown_scopes[i].name); 1620 } 1621 strcat(buf, " "); 1622 } 1623 strcat(buf, "\n"); 1624 1625 return strlen(buf); 1626 } 1627 1628 static ssize_t shutdown_scope_store(struct device *device, 1629 struct device_attribute *attr, 1630 const char *buf, size_t count) 1631 { 1632 int ret; 1633 struct zynqmp_pm_shutdown_scope *scope; 1634 1635 scope = zynqmp_pm_is_shutdown_scope_valid(buf); 1636 if (!scope) 1637 return -EINVAL; 1638 1639 ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY, 1640 scope->subtype); 1641 if (ret) { 1642 pr_err("unable to set shutdown scope %s\n", buf); 1643 return ret; 1644 } 1645 1646 selected_scope = scope; 1647 1648 return count; 1649 } 1650 1651 static DEVICE_ATTR_RW(shutdown_scope); 1652 1653 static ssize_t health_status_store(struct device *device, 1654 struct device_attribute *attr, 1655 const char *buf, size_t count) 1656 { 1657 int ret; 1658 unsigned int value; 1659 1660 ret = kstrtouint(buf, 10, &value); 1661 if (ret) 1662 return ret; 1663 1664 ret = zynqmp_pm_set_boot_health_status(value); 1665 if (ret) { 1666 dev_err(device, "unable to set healthy bit value to %u\n", 1667 value); 1668 return ret; 1669 } 1670 1671 return count; 1672 } 1673 1674 static DEVICE_ATTR_WO(health_status); 1675 1676 static ssize_t ggs_show(struct device *device, 1677 struct device_attribute *attr, 1678 char *buf, 1679 u32 reg) 1680 { 1681 int ret; 1682 u32 ret_payload[PAYLOAD_ARG_CNT]; 1683 1684 ret = zynqmp_pm_read_ggs(reg, ret_payload); 1685 if (ret) 1686 return ret; 1687 1688 return sprintf(buf, "0x%x\n", ret_payload[1]); 1689 } 1690 1691 static ssize_t ggs_store(struct device *device, 1692 struct device_attribute *attr, 1693 const char *buf, size_t count, 1694 u32 reg) 1695 { 1696 long value; 1697 int ret; 1698 1699 if (reg >= GSS_NUM_REGS) 1700 return -EINVAL; 1701 1702 ret = kstrtol(buf, 16, &value); 1703 if (ret) { 1704 count = -EFAULT; 1705 goto err; 1706 } 1707 1708 ret = zynqmp_pm_write_ggs(reg, value); 1709 if (ret) 1710 count = -EFAULT; 1711 err: 1712 return count; 1713 } 1714 1715 /* GGS register show functions */ 1716 #define GGS0_SHOW(N) \ 1717 ssize_t ggs##N##_show(struct device *device, \ 1718 struct device_attribute *attr, \ 1719 char *buf) \ 1720 { \ 1721 return ggs_show(device, attr, buf, N); \ 1722 } 1723 1724 static GGS0_SHOW(0); 1725 static GGS0_SHOW(1); 1726 static GGS0_SHOW(2); 1727 static GGS0_SHOW(3); 1728 1729 /* GGS register store function */ 1730 #define GGS0_STORE(N) \ 1731 ssize_t ggs##N##_store(struct device *device, \ 1732 struct device_attribute *attr, \ 1733 const char *buf, \ 1734 size_t count) \ 1735 { \ 1736 return ggs_store(device, attr, buf, count, N); \ 1737 } 1738 1739 static GGS0_STORE(0); 1740 static GGS0_STORE(1); 1741 static GGS0_STORE(2); 1742 static GGS0_STORE(3); 1743 1744 static ssize_t pggs_show(struct device *device, 1745 struct device_attribute *attr, 1746 char *buf, 1747 u32 reg) 1748 { 1749 int ret; 1750 u32 ret_payload[PAYLOAD_ARG_CNT]; 1751 1752 ret = zynqmp_pm_read_pggs(reg, ret_payload); 1753 if (ret) 1754 return ret; 1755 1756 return sprintf(buf, "0x%x\n", ret_payload[1]); 1757 } 1758 1759 static ssize_t pggs_store(struct device *device, 1760 struct device_attribute *attr, 1761 const char *buf, size_t count, 1762 u32 reg) 1763 { 1764 long value; 1765 int ret; 1766 1767 if (reg >= GSS_NUM_REGS) 1768 return -EINVAL; 1769 1770 ret = kstrtol(buf, 16, &value); 1771 if (ret) { 1772 count = -EFAULT; 1773 goto err; 1774 } 1775 1776 ret = zynqmp_pm_write_pggs(reg, value); 1777 if (ret) 1778 count = -EFAULT; 1779 1780 err: 1781 return count; 1782 } 1783 1784 #define PGGS0_SHOW(N) \ 1785 ssize_t pggs##N##_show(struct device *device, \ 1786 struct device_attribute *attr, \ 1787 char *buf) \ 1788 { \ 1789 return pggs_show(device, attr, buf, N); \ 1790 } 1791 1792 #define PGGS0_STORE(N) \ 1793 ssize_t pggs##N##_store(struct device *device, \ 1794 struct device_attribute *attr, \ 1795 const char *buf, \ 1796 size_t count) \ 1797 { \ 1798 return pggs_store(device, attr, buf, count, N); \ 1799 } 1800 1801 /* PGGS register show functions */ 1802 static PGGS0_SHOW(0); 1803 static PGGS0_SHOW(1); 1804 static PGGS0_SHOW(2); 1805 static PGGS0_SHOW(3); 1806 1807 /* PGGS register store functions */ 1808 static PGGS0_STORE(0); 1809 static PGGS0_STORE(1); 1810 static PGGS0_STORE(2); 1811 static PGGS0_STORE(3); 1812 1813 /* GGS register attributes */ 1814 static DEVICE_ATTR_RW(ggs0); 1815 static DEVICE_ATTR_RW(ggs1); 1816 static DEVICE_ATTR_RW(ggs2); 1817 static DEVICE_ATTR_RW(ggs3); 1818 1819 /* PGGS register attributes */ 1820 static DEVICE_ATTR_RW(pggs0); 1821 static DEVICE_ATTR_RW(pggs1); 1822 static DEVICE_ATTR_RW(pggs2); 1823 static DEVICE_ATTR_RW(pggs3); 1824 1825 static ssize_t feature_config_id_show(struct device *device, 1826 struct device_attribute *attr, 1827 char *buf) 1828 { 1829 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device); 1830 1831 return sysfs_emit(buf, "%d\n", devinfo->feature_conf_id); 1832 } 1833 1834 static ssize_t feature_config_id_store(struct device *device, 1835 struct device_attribute *attr, 1836 const char *buf, size_t count) 1837 { 1838 u32 config_id; 1839 int ret; 1840 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device); 1841 1842 if (!buf) 1843 return -EINVAL; 1844 1845 ret = kstrtou32(buf, 10, &config_id); 1846 if (ret) 1847 return ret; 1848 1849 devinfo->feature_conf_id = config_id; 1850 1851 return count; 1852 } 1853 1854 static DEVICE_ATTR_RW(feature_config_id); 1855 1856 static ssize_t feature_config_value_show(struct device *device, 1857 struct device_attribute *attr, 1858 char *buf) 1859 { 1860 int ret; 1861 u32 ret_payload[PAYLOAD_ARG_CNT]; 1862 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device); 1863 1864 ret = zynqmp_pm_get_feature_config(devinfo->feature_conf_id, 1865 ret_payload); 1866 if (ret) 1867 return ret; 1868 1869 return sysfs_emit(buf, "%d\n", ret_payload[1]); 1870 } 1871 1872 static ssize_t feature_config_value_store(struct device *device, 1873 struct device_attribute *attr, 1874 const char *buf, size_t count) 1875 { 1876 u32 value; 1877 int ret; 1878 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device); 1879 1880 if (!buf) 1881 return -EINVAL; 1882 1883 ret = kstrtou32(buf, 10, &value); 1884 if (ret) 1885 return ret; 1886 1887 ret = zynqmp_pm_set_feature_config(devinfo->feature_conf_id, 1888 value); 1889 if (ret) 1890 return ret; 1891 1892 return count; 1893 } 1894 1895 static DEVICE_ATTR_RW(feature_config_value); 1896 1897 static struct attribute *zynqmp_firmware_attrs[] = { 1898 &dev_attr_ggs0.attr, 1899 &dev_attr_ggs1.attr, 1900 &dev_attr_ggs2.attr, 1901 &dev_attr_ggs3.attr, 1902 &dev_attr_pggs0.attr, 1903 &dev_attr_pggs1.attr, 1904 &dev_attr_pggs2.attr, 1905 &dev_attr_pggs3.attr, 1906 &dev_attr_shutdown_scope.attr, 1907 &dev_attr_health_status.attr, 1908 &dev_attr_feature_config_id.attr, 1909 &dev_attr_feature_config_value.attr, 1910 NULL, 1911 }; 1912 1913 ATTRIBUTE_GROUPS(zynqmp_firmware); 1914 1915 static int zynqmp_firmware_probe(struct platform_device *pdev) 1916 { 1917 struct device *dev = &pdev->dev; 1918 struct device_node *np; 1919 struct zynqmp_devinfo *devinfo; 1920 int ret; 1921 1922 ret = get_set_conduit_method(dev->of_node); 1923 if (ret) 1924 return ret; 1925 1926 np = of_find_compatible_node(NULL, NULL, "xlnx,zynqmp"); 1927 if (!np) { 1928 np = of_find_compatible_node(NULL, NULL, "xlnx,versal"); 1929 if (!np) 1930 return 0; 1931 1932 feature_check_enabled = true; 1933 } 1934 1935 if (!feature_check_enabled) { 1936 ret = do_feature_check_call(PM_FEATURE_CHECK); 1937 if (ret >= 0) 1938 feature_check_enabled = true; 1939 } 1940 1941 of_node_put(np); 1942 1943 devinfo = devm_kzalloc(dev, sizeof(*devinfo), GFP_KERNEL); 1944 if (!devinfo) 1945 return -ENOMEM; 1946 1947 devinfo->dev = dev; 1948 1949 platform_set_drvdata(pdev, devinfo); 1950 1951 /* Check PM API version number */ 1952 ret = zynqmp_pm_get_api_version(&pm_api_version); 1953 if (ret) 1954 return ret; 1955 1956 if (pm_api_version < ZYNQMP_PM_VERSION) { 1957 panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n", 1958 __func__, 1959 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR, 1960 pm_api_version >> 16, pm_api_version & 0xFFFF); 1961 } 1962 1963 pr_info("%s Platform Management API v%d.%d\n", __func__, 1964 pm_api_version >> 16, pm_api_version & 0xFFFF); 1965 1966 /* Get the Family code and sub family code of platform */ 1967 ret = zynqmp_pm_get_family_info(&pm_family_code, &pm_sub_family_code); 1968 if (ret < 0) 1969 return ret; 1970 1971 /* Check trustzone version number */ 1972 ret = zynqmp_pm_get_trustzone_version(&pm_tz_version); 1973 if (ret) 1974 panic("Legacy trustzone found without version support\n"); 1975 1976 if (pm_tz_version < ZYNQMP_TZ_VERSION) 1977 panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n", 1978 __func__, 1979 ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR, 1980 pm_tz_version >> 16, pm_tz_version & 0xFFFF); 1981 1982 pr_info("%s Trustzone version v%d.%d\n", __func__, 1983 pm_tz_version >> 16, pm_tz_version & 0xFFFF); 1984 1985 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs, 1986 ARRAY_SIZE(firmware_devs), NULL, 0, NULL); 1987 if (ret) { 1988 dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret); 1989 return ret; 1990 } 1991 1992 zynqmp_pm_api_debugfs_init(); 1993 1994 np = of_find_compatible_node(NULL, NULL, "xlnx,versal"); 1995 if (np) { 1996 em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager", 1997 -1, NULL, 0); 1998 if (IS_ERR(em_dev)) 1999 dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n"); 2000 } 2001 of_node_put(np); 2002 2003 return of_platform_populate(dev->of_node, NULL, NULL, dev); 2004 } 2005 2006 static int zynqmp_firmware_remove(struct platform_device *pdev) 2007 { 2008 struct pm_api_feature_data *feature_data; 2009 struct hlist_node *tmp; 2010 int i; 2011 2012 mfd_remove_devices(&pdev->dev); 2013 zynqmp_pm_api_debugfs_exit(); 2014 2015 hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) { 2016 hash_del(&feature_data->hentry); 2017 kfree(feature_data); 2018 } 2019 2020 platform_device_unregister(em_dev); 2021 2022 return 0; 2023 } 2024 2025 static const struct of_device_id zynqmp_firmware_of_match[] = { 2026 {.compatible = "xlnx,zynqmp-firmware"}, 2027 {.compatible = "xlnx,versal-firmware"}, 2028 {}, 2029 }; 2030 MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match); 2031 2032 static struct platform_driver zynqmp_firmware_driver = { 2033 .driver = { 2034 .name = "zynqmp_firmware", 2035 .of_match_table = zynqmp_firmware_of_match, 2036 .dev_groups = zynqmp_firmware_groups, 2037 }, 2038 .probe = zynqmp_firmware_probe, 2039 .remove = zynqmp_firmware_remove, 2040 }; 2041 module_platform_driver(zynqmp_firmware_driver); 2042