1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Xilinx Zynq MPSoC Firmware layer 4 * 5 * Copyright (C) 2014-2022 Xilinx, Inc. 6 * 7 * Michal Simek <michal.simek@amd.com> 8 * Davorin Mista <davorin.mista@aggios.com> 9 * Jolly Shah <jollys@xilinx.com> 10 * Rajan Vaja <rajanv@xilinx.com> 11 */ 12 13 #include <linux/arm-smccc.h> 14 #include <linux/compiler.h> 15 #include <linux/device.h> 16 #include <linux/init.h> 17 #include <linux/mfd/core.h> 18 #include <linux/module.h> 19 #include <linux/of.h> 20 #include <linux/of_platform.h> 21 #include <linux/platform_device.h> 22 #include <linux/slab.h> 23 #include <linux/uaccess.h> 24 #include <linux/hashtable.h> 25 26 #include <linux/firmware/xlnx-zynqmp.h> 27 #include <linux/firmware/xlnx-event-manager.h> 28 #include "zynqmp-debug.h" 29 30 /* Max HashMap Order for PM API feature check (1<<7 = 128) */ 31 #define PM_API_FEATURE_CHECK_MAX_ORDER 7 32 33 /* CRL registers and bitfields */ 34 #define CRL_APB_BASE 0xFF5E0000U 35 /* BOOT_PIN_CTRL- Used to control the mode pins after boot */ 36 #define CRL_APB_BOOT_PIN_CTRL (CRL_APB_BASE + (0x250U)) 37 /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */ 38 #define CRL_APB_BOOTPIN_CTRL_MASK 0xF0FU 39 40 /* IOCTL/QUERY feature payload size */ 41 #define FEATURE_PAYLOAD_SIZE 2 42 43 /* Firmware feature check version mask */ 44 #define FIRMWARE_VERSION_MASK GENMASK(15, 0) 45 46 static bool feature_check_enabled; 47 static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER); 48 static u32 ioctl_features[FEATURE_PAYLOAD_SIZE]; 49 static u32 query_features[FEATURE_PAYLOAD_SIZE]; 50 51 static struct platform_device *em_dev; 52 53 /** 54 * struct zynqmp_devinfo - Structure for Zynqmp device instance 55 * @dev: Device Pointer 56 * @feature_conf_id: Feature conf id 57 */ 58 struct zynqmp_devinfo { 59 struct device *dev; 60 u32 feature_conf_id; 61 }; 62 63 /** 64 * struct pm_api_feature_data - PM API Feature data 65 * @pm_api_id: PM API Id, used as key to index into hashmap 66 * @feature_status: status of PM API feature: valid, invalid 67 * @hentry: hlist_node that hooks this entry into hashtable 68 */ 69 struct pm_api_feature_data { 70 u32 pm_api_id; 71 int feature_status; 72 struct hlist_node hentry; 73 }; 74 75 static const struct mfd_cell firmware_devs[] = { 76 { 77 .name = "zynqmp_power_controller", 78 }, 79 }; 80 81 /** 82 * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes 83 * @ret_status: PMUFW return code 84 * 85 * Return: corresponding Linux error code 86 */ 87 static int zynqmp_pm_ret_code(u32 ret_status) 88 { 89 switch (ret_status) { 90 case XST_PM_SUCCESS: 91 case XST_PM_DOUBLE_REQ: 92 return 0; 93 case XST_PM_NO_FEATURE: 94 return -ENOTSUPP; 95 case XST_PM_NO_ACCESS: 96 return -EACCES; 97 case XST_PM_ABORT_SUSPEND: 98 return -ECANCELED; 99 case XST_PM_MULT_USER: 100 return -EUSERS; 101 case XST_PM_INTERNAL: 102 case XST_PM_CONFLICT: 103 case XST_PM_INVALID_NODE: 104 default: 105 return -EINVAL; 106 } 107 } 108 109 static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2, 110 u32 *ret_payload) 111 { 112 return -ENODEV; 113 } 114 115 /* 116 * PM function call wrapper 117 * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration 118 */ 119 static int (*do_fw_call)(u64, u64, u64, u32 *ret_payload) = do_fw_call_fail; 120 121 /** 122 * do_fw_call_smc() - Call system-level platform management layer (SMC) 123 * @arg0: Argument 0 to SMC call 124 * @arg1: Argument 1 to SMC call 125 * @arg2: Argument 2 to SMC call 126 * @ret_payload: Returned value array 127 * 128 * Invoke platform management function via SMC call (no hypervisor present). 129 * 130 * Return: Returns status, either success or error+reason 131 */ 132 static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2, 133 u32 *ret_payload) 134 { 135 struct arm_smccc_res res; 136 137 arm_smccc_smc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res); 138 139 if (ret_payload) { 140 ret_payload[0] = lower_32_bits(res.a0); 141 ret_payload[1] = upper_32_bits(res.a0); 142 ret_payload[2] = lower_32_bits(res.a1); 143 ret_payload[3] = upper_32_bits(res.a1); 144 } 145 146 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0); 147 } 148 149 /** 150 * do_fw_call_hvc() - Call system-level platform management layer (HVC) 151 * @arg0: Argument 0 to HVC call 152 * @arg1: Argument 1 to HVC call 153 * @arg2: Argument 2 to HVC call 154 * @ret_payload: Returned value array 155 * 156 * Invoke platform management function via HVC 157 * HVC-based for communication through hypervisor 158 * (no direct communication with ATF). 159 * 160 * Return: Returns status, either success or error+reason 161 */ 162 static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2, 163 u32 *ret_payload) 164 { 165 struct arm_smccc_res res; 166 167 arm_smccc_hvc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res); 168 169 if (ret_payload) { 170 ret_payload[0] = lower_32_bits(res.a0); 171 ret_payload[1] = upper_32_bits(res.a0); 172 ret_payload[2] = lower_32_bits(res.a1); 173 ret_payload[3] = upper_32_bits(res.a1); 174 } 175 176 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0); 177 } 178 179 static int __do_feature_check_call(const u32 api_id, u32 *ret_payload) 180 { 181 int ret; 182 u64 smc_arg[2]; 183 184 smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK; 185 smc_arg[1] = api_id; 186 187 ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload); 188 if (ret) 189 ret = -EOPNOTSUPP; 190 else 191 ret = ret_payload[1]; 192 193 return ret; 194 } 195 196 static int do_feature_check_call(const u32 api_id) 197 { 198 int ret; 199 u32 ret_payload[PAYLOAD_ARG_CNT]; 200 struct pm_api_feature_data *feature_data; 201 202 /* Check for existing entry in hash table for given api */ 203 hash_for_each_possible(pm_api_features_map, feature_data, hentry, 204 api_id) { 205 if (feature_data->pm_api_id == api_id) 206 return feature_data->feature_status; 207 } 208 209 /* Add new entry if not present */ 210 feature_data = kmalloc(sizeof(*feature_data), GFP_ATOMIC); 211 if (!feature_data) 212 return -ENOMEM; 213 214 feature_data->pm_api_id = api_id; 215 ret = __do_feature_check_call(api_id, ret_payload); 216 217 feature_data->feature_status = ret; 218 hash_add(pm_api_features_map, &feature_data->hentry, api_id); 219 220 if (api_id == PM_IOCTL) 221 /* Store supported IOCTL IDs mask */ 222 memcpy(ioctl_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4); 223 else if (api_id == PM_QUERY_DATA) 224 /* Store supported QUERY IDs mask */ 225 memcpy(query_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4); 226 227 return ret; 228 } 229 EXPORT_SYMBOL_GPL(zynqmp_pm_feature); 230 231 /** 232 * zynqmp_pm_feature() - Check whether given feature is supported or not and 233 * store supported IOCTL/QUERY ID mask 234 * @api_id: API ID to check 235 * 236 * Return: Returns status, either success or error+reason 237 */ 238 int zynqmp_pm_feature(const u32 api_id) 239 { 240 int ret; 241 242 if (!feature_check_enabled) 243 return 0; 244 245 ret = do_feature_check_call(api_id); 246 247 return ret; 248 } 249 250 /** 251 * zynqmp_pm_is_function_supported() - Check whether given IOCTL/QUERY function 252 * is supported or not 253 * @api_id: PM_IOCTL or PM_QUERY_DATA 254 * @id: IOCTL or QUERY function IDs 255 * 256 * Return: Returns status, either success or error+reason 257 */ 258 int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id) 259 { 260 int ret; 261 u32 *bit_mask; 262 263 /* Input arguments validation */ 264 if (id >= 64 || (api_id != PM_IOCTL && api_id != PM_QUERY_DATA)) 265 return -EINVAL; 266 267 /* Check feature check API version */ 268 ret = do_feature_check_call(PM_FEATURE_CHECK); 269 if (ret < 0) 270 return ret; 271 272 /* Check if feature check version 2 is supported or not */ 273 if ((ret & FIRMWARE_VERSION_MASK) == PM_API_VERSION_2) { 274 /* 275 * Call feature check for IOCTL/QUERY API to get IOCTL ID or 276 * QUERY ID feature status. 277 */ 278 ret = do_feature_check_call(api_id); 279 if (ret < 0) 280 return ret; 281 282 bit_mask = (api_id == PM_IOCTL) ? ioctl_features : query_features; 283 284 if ((bit_mask[(id / 32)] & BIT((id % 32))) == 0U) 285 return -EOPNOTSUPP; 286 } else { 287 return -ENODATA; 288 } 289 290 return 0; 291 } 292 EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported); 293 294 /** 295 * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer 296 * caller function depending on the configuration 297 * @pm_api_id: Requested PM-API call 298 * @arg0: Argument 0 to requested PM-API call 299 * @arg1: Argument 1 to requested PM-API call 300 * @arg2: Argument 2 to requested PM-API call 301 * @arg3: Argument 3 to requested PM-API call 302 * @ret_payload: Returned value array 303 * 304 * Invoke platform management function for SMC or HVC call, depending on 305 * configuration. 306 * Following SMC Calling Convention (SMCCC) for SMC64: 307 * Pm Function Identifier, 308 * PM_SIP_SVC + PM_API_ID = 309 * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) 310 * ((SMC_64) << FUNCID_CC_SHIFT) 311 * ((SIP_START) << FUNCID_OEN_SHIFT) 312 * ((PM_API_ID) & FUNCID_NUM_MASK)) 313 * 314 * PM_SIP_SVC - Registered ZynqMP SIP Service Call. 315 * PM_API_ID - Platform Management API ID. 316 * 317 * Return: Returns status, either success or error+reason 318 */ 319 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, 320 u32 arg2, u32 arg3, u32 *ret_payload) 321 { 322 /* 323 * Added SIP service call Function Identifier 324 * Make sure to stay in x0 register 325 */ 326 u64 smc_arg[4]; 327 int ret; 328 329 /* Check if feature is supported or not */ 330 ret = zynqmp_pm_feature(pm_api_id); 331 if (ret < 0) 332 return ret; 333 334 smc_arg[0] = PM_SIP_SVC | pm_api_id; 335 smc_arg[1] = ((u64)arg1 << 32) | arg0; 336 smc_arg[2] = ((u64)arg3 << 32) | arg2; 337 338 return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], ret_payload); 339 } 340 341 static u32 pm_api_version; 342 static u32 pm_tz_version; 343 344 int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset) 345 { 346 int ret; 347 348 ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, sgi_num, reset, 0, 0, 349 NULL); 350 if (!ret) 351 return ret; 352 353 /* try old implementation as fallback strategy if above fails */ 354 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_REGISTER_SGI, sgi_num, 355 reset, NULL); 356 } 357 358 /** 359 * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware 360 * @version: Returned version value 361 * 362 * Return: Returns status, either success or error+reason 363 */ 364 int zynqmp_pm_get_api_version(u32 *version) 365 { 366 u32 ret_payload[PAYLOAD_ARG_CNT]; 367 int ret; 368 369 if (!version) 370 return -EINVAL; 371 372 /* Check is PM API version already verified */ 373 if (pm_api_version > 0) { 374 *version = pm_api_version; 375 return 0; 376 } 377 ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, ret_payload); 378 *version = ret_payload[1]; 379 380 return ret; 381 } 382 EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version); 383 384 /** 385 * zynqmp_pm_get_chipid - Get silicon ID registers 386 * @idcode: IDCODE register 387 * @version: version register 388 * 389 * Return: Returns the status of the operation and the idcode and version 390 * registers in @idcode and @version. 391 */ 392 int zynqmp_pm_get_chipid(u32 *idcode, u32 *version) 393 { 394 u32 ret_payload[PAYLOAD_ARG_CNT]; 395 int ret; 396 397 if (!idcode || !version) 398 return -EINVAL; 399 400 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload); 401 *idcode = ret_payload[1]; 402 *version = ret_payload[2]; 403 404 return ret; 405 } 406 EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid); 407 408 /** 409 * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version 410 * @version: Returned version value 411 * 412 * Return: Returns status, either success or error+reason 413 */ 414 static int zynqmp_pm_get_trustzone_version(u32 *version) 415 { 416 u32 ret_payload[PAYLOAD_ARG_CNT]; 417 int ret; 418 419 if (!version) 420 return -EINVAL; 421 422 /* Check is PM trustzone version already verified */ 423 if (pm_tz_version > 0) { 424 *version = pm_tz_version; 425 return 0; 426 } 427 ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, 0, 0, 428 0, 0, ret_payload); 429 *version = ret_payload[1]; 430 431 return ret; 432 } 433 434 /** 435 * get_set_conduit_method() - Choose SMC or HVC based communication 436 * @np: Pointer to the device_node structure 437 * 438 * Use SMC or HVC-based functions to communicate with EL2/EL3. 439 * 440 * Return: Returns 0 on success or error code 441 */ 442 static int get_set_conduit_method(struct device_node *np) 443 { 444 const char *method; 445 446 if (of_property_read_string(np, "method", &method)) { 447 pr_warn("%s missing \"method\" property\n", __func__); 448 return -ENXIO; 449 } 450 451 if (!strcmp("hvc", method)) { 452 do_fw_call = do_fw_call_hvc; 453 } else if (!strcmp("smc", method)) { 454 do_fw_call = do_fw_call_smc; 455 } else { 456 pr_warn("%s Invalid \"method\" property: %s\n", 457 __func__, method); 458 return -EINVAL; 459 } 460 461 return 0; 462 } 463 464 /** 465 * zynqmp_pm_query_data() - Get query data from firmware 466 * @qdata: Variable to the zynqmp_pm_query_data structure 467 * @out: Returned output value 468 * 469 * Return: Returns status, either success or error+reason 470 */ 471 int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out) 472 { 473 int ret; 474 475 ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, qdata.qid, qdata.arg1, 476 qdata.arg2, qdata.arg3, out); 477 478 /* 479 * For clock name query, all bytes in SMC response are clock name 480 * characters and return code is always success. For invalid clocks, 481 * clock name bytes would be zeros. 482 */ 483 return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret; 484 } 485 EXPORT_SYMBOL_GPL(zynqmp_pm_query_data); 486 487 /** 488 * zynqmp_pm_clock_enable() - Enable the clock for given id 489 * @clock_id: ID of the clock to be enabled 490 * 491 * This function is used by master to enable the clock 492 * including peripherals and PLL clocks. 493 * 494 * Return: Returns status, either success or error+reason 495 */ 496 int zynqmp_pm_clock_enable(u32 clock_id) 497 { 498 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL); 499 } 500 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable); 501 502 /** 503 * zynqmp_pm_clock_disable() - Disable the clock for given id 504 * @clock_id: ID of the clock to be disable 505 * 506 * This function is used by master to disable the clock 507 * including peripherals and PLL clocks. 508 * 509 * Return: Returns status, either success or error+reason 510 */ 511 int zynqmp_pm_clock_disable(u32 clock_id) 512 { 513 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL); 514 } 515 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable); 516 517 /** 518 * zynqmp_pm_clock_getstate() - Get the clock state for given id 519 * @clock_id: ID of the clock to be queried 520 * @state: 1/0 (Enabled/Disabled) 521 * 522 * This function is used by master to get the state of clock 523 * including peripherals and PLL clocks. 524 * 525 * Return: Returns status, either success or error+reason 526 */ 527 int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state) 528 { 529 u32 ret_payload[PAYLOAD_ARG_CNT]; 530 int ret; 531 532 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, clock_id, 0, 533 0, 0, ret_payload); 534 *state = ret_payload[1]; 535 536 return ret; 537 } 538 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate); 539 540 /** 541 * zynqmp_pm_clock_setdivider() - Set the clock divider for given id 542 * @clock_id: ID of the clock 543 * @divider: divider value 544 * 545 * This function is used by master to set divider for any clock 546 * to achieve desired rate. 547 * 548 * Return: Returns status, either success or error+reason 549 */ 550 int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider) 551 { 552 return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider, 553 0, 0, NULL); 554 } 555 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider); 556 557 /** 558 * zynqmp_pm_clock_getdivider() - Get the clock divider for given id 559 * @clock_id: ID of the clock 560 * @divider: divider value 561 * 562 * This function is used by master to get divider values 563 * for any clock. 564 * 565 * Return: Returns status, either success or error+reason 566 */ 567 int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider) 568 { 569 u32 ret_payload[PAYLOAD_ARG_CNT]; 570 int ret; 571 572 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, clock_id, 0, 573 0, 0, ret_payload); 574 *divider = ret_payload[1]; 575 576 return ret; 577 } 578 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider); 579 580 /** 581 * zynqmp_pm_clock_setrate() - Set the clock rate for given id 582 * @clock_id: ID of the clock 583 * @rate: rate value in hz 584 * 585 * This function is used by master to set rate for any clock. 586 * 587 * Return: Returns status, either success or error+reason 588 */ 589 int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate) 590 { 591 return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id, 592 lower_32_bits(rate), 593 upper_32_bits(rate), 594 0, NULL); 595 } 596 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate); 597 598 /** 599 * zynqmp_pm_clock_getrate() - Get the clock rate for given id 600 * @clock_id: ID of the clock 601 * @rate: rate value in hz 602 * 603 * This function is used by master to get rate 604 * for any clock. 605 * 606 * Return: Returns status, either success or error+reason 607 */ 608 int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate) 609 { 610 u32 ret_payload[PAYLOAD_ARG_CNT]; 611 int ret; 612 613 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, clock_id, 0, 614 0, 0, ret_payload); 615 *rate = ((u64)ret_payload[2] << 32) | ret_payload[1]; 616 617 return ret; 618 } 619 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate); 620 621 /** 622 * zynqmp_pm_clock_setparent() - Set the clock parent for given id 623 * @clock_id: ID of the clock 624 * @parent_id: parent id 625 * 626 * This function is used by master to set parent for any clock. 627 * 628 * Return: Returns status, either success or error+reason 629 */ 630 int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) 631 { 632 return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id, 633 parent_id, 0, 0, NULL); 634 } 635 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent); 636 637 /** 638 * zynqmp_pm_clock_getparent() - Get the clock parent for given id 639 * @clock_id: ID of the clock 640 * @parent_id: parent id 641 * 642 * This function is used by master to get parent index 643 * for any clock. 644 * 645 * Return: Returns status, either success or error+reason 646 */ 647 int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) 648 { 649 u32 ret_payload[PAYLOAD_ARG_CNT]; 650 int ret; 651 652 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, clock_id, 0, 653 0, 0, ret_payload); 654 *parent_id = ret_payload[1]; 655 656 return ret; 657 } 658 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent); 659 660 /** 661 * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode 662 * 663 * @clk_id: PLL clock ID 664 * @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT) 665 * 666 * This function sets PLL mode 667 * 668 * Return: Returns status, either success or error+reason 669 */ 670 int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode) 671 { 672 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_MODE, 673 clk_id, mode, NULL); 674 } 675 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode); 676 677 /** 678 * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode 679 * 680 * @clk_id: PLL clock ID 681 * @mode: PLL mode 682 * 683 * This function return current PLL mode 684 * 685 * Return: Returns status, either success or error+reason 686 */ 687 int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode) 688 { 689 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_MODE, 690 clk_id, 0, mode); 691 } 692 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode); 693 694 /** 695 * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data 696 * 697 * @clk_id: PLL clock ID 698 * @data: fraction data 699 * 700 * This function sets fraction data. 701 * It is valid for fraction mode only. 702 * 703 * Return: Returns status, either success or error+reason 704 */ 705 int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data) 706 { 707 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_DATA, 708 clk_id, data, NULL); 709 } 710 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data); 711 712 /** 713 * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data 714 * 715 * @clk_id: PLL clock ID 716 * @data: fraction data 717 * 718 * This function returns fraction data value. 719 * 720 * Return: Returns status, either success or error+reason 721 */ 722 int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data) 723 { 724 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_DATA, 725 clk_id, 0, data); 726 } 727 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data); 728 729 /** 730 * zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device 731 * 732 * @node_id: Node ID of the device 733 * @type: Type of tap delay to set (input/output) 734 * @value: Value to set fot the tap delay 735 * 736 * This function sets input/output tap delay for the SD device. 737 * 738 * Return: Returns status, either success or error+reason 739 */ 740 int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value) 741 { 742 u32 reg = (type == PM_TAPDELAY_INPUT) ? SD_ITAPDLY : SD_OTAPDLYSEL; 743 u32 mask = (node_id == NODE_SD_0) ? GENMASK(15, 0) : GENMASK(31, 16); 744 745 if (value) { 746 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, 747 IOCTL_SET_SD_TAPDELAY, 748 type, value, NULL); 749 } 750 751 /* 752 * Work around completely misdesigned firmware API on Xilinx ZynqMP. 753 * The IOCTL_SET_SD_TAPDELAY firmware call allows the caller to only 754 * ever set IOU_SLCR SD_ITAPDLY Register SD0_ITAPDLYENA/SD1_ITAPDLYENA 755 * bits, but there is no matching call to clear those bits. If those 756 * bits are not cleared, SDMMC tuning may fail. 757 * 758 * Luckily, there are PM_MMIO_READ/PM_MMIO_WRITE calls which seem to 759 * allow complete unrestricted access to all address space, including 760 * IOU_SLCR SD_ITAPDLY Register and all the other registers, access 761 * to which was supposed to be protected by the current firmware API. 762 * 763 * Use PM_MMIO_READ/PM_MMIO_WRITE to re-implement the missing counter 764 * part of IOCTL_SET_SD_TAPDELAY which clears SDx_ITAPDLYENA bits. 765 */ 766 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, reg, mask, 0, 0, NULL); 767 } 768 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay); 769 770 /** 771 * zynqmp_pm_sd_dll_reset() - Reset DLL logic 772 * 773 * @node_id: Node ID of the device 774 * @type: Reset type 775 * 776 * This function resets DLL logic for the SD device. 777 * 778 * Return: Returns status, either success or error+reason 779 */ 780 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type) 781 { 782 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET, 783 type, 0, NULL); 784 } 785 EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset); 786 787 /** 788 * zynqmp_pm_ospi_mux_select() - OSPI Mux selection 789 * 790 * @dev_id: Device Id of the OSPI device. 791 * @select: OSPI Mux select value. 792 * 793 * This function select the OSPI Mux. 794 * 795 * Return: Returns status, either success or error+reason 796 */ 797 int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select) 798 { 799 return zynqmp_pm_invoke_fn(PM_IOCTL, dev_id, IOCTL_OSPI_MUX_SELECT, 800 select, 0, NULL); 801 } 802 EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select); 803 804 /** 805 * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs) 806 * @index: GGS register index 807 * @value: Register value to be written 808 * 809 * This function writes value to GGS register. 810 * 811 * Return: Returns status, either success or error+reason 812 */ 813 int zynqmp_pm_write_ggs(u32 index, u32 value) 814 { 815 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS, 816 index, value, NULL); 817 } 818 EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs); 819 820 /** 821 * zynqmp_pm_read_ggs() - PM API for reading global general storage (ggs) 822 * @index: GGS register index 823 * @value: Register value to be written 824 * 825 * This function returns GGS register value. 826 * 827 * Return: Returns status, either success or error+reason 828 */ 829 int zynqmp_pm_read_ggs(u32 index, u32 *value) 830 { 831 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS, 832 index, 0, value); 833 } 834 EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs); 835 836 /** 837 * zynqmp_pm_write_pggs() - PM API for writing persistent global general 838 * storage (pggs) 839 * @index: PGGS register index 840 * @value: Register value to be written 841 * 842 * This function writes value to PGGS register. 843 * 844 * Return: Returns status, either success or error+reason 845 */ 846 int zynqmp_pm_write_pggs(u32 index, u32 value) 847 { 848 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value, 849 NULL); 850 } 851 EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs); 852 853 /** 854 * zynqmp_pm_read_pggs() - PM API for reading persistent global general 855 * storage (pggs) 856 * @index: PGGS register index 857 * @value: Register value to be written 858 * 859 * This function returns PGGS register value. 860 * 861 * Return: Returns status, either success or error+reason 862 */ 863 int zynqmp_pm_read_pggs(u32 index, u32 *value) 864 { 865 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0, 866 value); 867 } 868 EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs); 869 870 int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value) 871 { 872 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_TAPDELAY_BYPASS, 873 index, value, NULL); 874 } 875 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass); 876 877 /** 878 * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status 879 * @value: Status value to be written 880 * 881 * This function sets healthy bit value to indicate boot health status 882 * to firmware. 883 * 884 * Return: Returns status, either success or error+reason 885 */ 886 int zynqmp_pm_set_boot_health_status(u32 value) 887 { 888 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS, 889 value, 0, NULL); 890 } 891 892 /** 893 * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release) 894 * @reset: Reset to be configured 895 * @assert_flag: Flag stating should reset be asserted (1) or 896 * released (0) 897 * 898 * Return: Returns status, either success or error+reason 899 */ 900 int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset, 901 const enum zynqmp_pm_reset_action assert_flag) 902 { 903 return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag, 904 0, 0, NULL); 905 } 906 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert); 907 908 /** 909 * zynqmp_pm_reset_get_status - Get status of the reset 910 * @reset: Reset whose status should be returned 911 * @status: Returned status 912 * 913 * Return: Returns status, either success or error+reason 914 */ 915 int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status) 916 { 917 u32 ret_payload[PAYLOAD_ARG_CNT]; 918 int ret; 919 920 if (!status) 921 return -EINVAL; 922 923 ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, reset, 0, 924 0, 0, ret_payload); 925 *status = ret_payload[1]; 926 927 return ret; 928 } 929 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status); 930 931 /** 932 * zynqmp_pm_fpga_load - Perform the fpga load 933 * @address: Address to write to 934 * @size: pl bitstream size 935 * @flags: Bitstream type 936 * -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration 937 * -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration 938 * 939 * This function provides access to pmufw. To transfer 940 * the required bitstream into PL. 941 * 942 * Return: Returns status, either success or error+reason 943 */ 944 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags) 945 { 946 u32 ret_payload[PAYLOAD_ARG_CNT]; 947 int ret; 948 949 ret = zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address), 950 upper_32_bits(address), size, flags, 951 ret_payload); 952 if (ret_payload[0]) 953 return -ret_payload[0]; 954 955 return ret; 956 } 957 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load); 958 959 /** 960 * zynqmp_pm_fpga_get_status - Read value from PCAP status register 961 * @value: Value to read 962 * 963 * This function provides access to the pmufw to get the PCAP 964 * status 965 * 966 * Return: Returns status, either success or error+reason 967 */ 968 int zynqmp_pm_fpga_get_status(u32 *value) 969 { 970 u32 ret_payload[PAYLOAD_ARG_CNT]; 971 int ret; 972 973 if (!value) 974 return -EINVAL; 975 976 ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload); 977 *value = ret_payload[1]; 978 979 return ret; 980 } 981 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status); 982 983 /** 984 * zynqmp_pm_fpga_get_config_status - Get the FPGA configuration status. 985 * @value: Buffer to store FPGA configuration status. 986 * 987 * This function provides access to the pmufw to get the FPGA configuration 988 * status 989 * 990 * Return: 0 on success, a negative value on error 991 */ 992 int zynqmp_pm_fpga_get_config_status(u32 *value) 993 { 994 u32 ret_payload[PAYLOAD_ARG_CNT]; 995 u32 buf, lower_addr, upper_addr; 996 int ret; 997 998 if (!value) 999 return -EINVAL; 1000 1001 lower_addr = lower_32_bits((u64)&buf); 1002 upper_addr = upper_32_bits((u64)&buf); 1003 1004 ret = zynqmp_pm_invoke_fn(PM_FPGA_READ, 1005 XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET, 1006 lower_addr, upper_addr, 1007 XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG, 1008 ret_payload); 1009 1010 *value = ret_payload[1]; 1011 1012 return ret; 1013 } 1014 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_config_status); 1015 1016 /** 1017 * zynqmp_pm_pinctrl_request - Request Pin from firmware 1018 * @pin: Pin number to request 1019 * 1020 * This function requests pin from firmware. 1021 * 1022 * Return: Returns status, either success or error+reason. 1023 */ 1024 int zynqmp_pm_pinctrl_request(const u32 pin) 1025 { 1026 return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, pin, 0, 0, 0, NULL); 1027 } 1028 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request); 1029 1030 /** 1031 * zynqmp_pm_pinctrl_release - Inform firmware that Pin control is released 1032 * @pin: Pin number to release 1033 * 1034 * This function release pin from firmware. 1035 * 1036 * Return: Returns status, either success or error+reason. 1037 */ 1038 int zynqmp_pm_pinctrl_release(const u32 pin) 1039 { 1040 return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, pin, 0, 0, 0, NULL); 1041 } 1042 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release); 1043 1044 /** 1045 * zynqmp_pm_pinctrl_get_function - Read function id set for the given pin 1046 * @pin: Pin number 1047 * @id: Buffer to store function ID 1048 * 1049 * This function provides the function currently set for the given pin. 1050 * 1051 * Return: Returns status, either success or error+reason 1052 */ 1053 int zynqmp_pm_pinctrl_get_function(const u32 pin, u32 *id) 1054 { 1055 u32 ret_payload[PAYLOAD_ARG_CNT]; 1056 int ret; 1057 1058 if (!id) 1059 return -EINVAL; 1060 1061 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_GET_FUNCTION, pin, 0, 1062 0, 0, ret_payload); 1063 *id = ret_payload[1]; 1064 1065 return ret; 1066 } 1067 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_function); 1068 1069 /** 1070 * zynqmp_pm_pinctrl_set_function - Set requested function for the pin 1071 * @pin: Pin number 1072 * @id: Function ID to set 1073 * 1074 * This function sets requested function for the given pin. 1075 * 1076 * Return: Returns status, either success or error+reason. 1077 */ 1078 int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id) 1079 { 1080 return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, pin, id, 1081 0, 0, NULL); 1082 } 1083 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function); 1084 1085 /** 1086 * zynqmp_pm_pinctrl_get_config - Get configuration parameter for the pin 1087 * @pin: Pin number 1088 * @param: Parameter to get 1089 * @value: Buffer to store parameter value 1090 * 1091 * This function gets requested configuration parameter for the given pin. 1092 * 1093 * Return: Returns status, either success or error+reason. 1094 */ 1095 int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param, 1096 u32 *value) 1097 { 1098 u32 ret_payload[PAYLOAD_ARG_CNT]; 1099 int ret; 1100 1101 if (!value) 1102 return -EINVAL; 1103 1104 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, pin, param, 1105 0, 0, ret_payload); 1106 *value = ret_payload[1]; 1107 1108 return ret; 1109 } 1110 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_config); 1111 1112 /** 1113 * zynqmp_pm_pinctrl_set_config - Set configuration parameter for the pin 1114 * @pin: Pin number 1115 * @param: Parameter to set 1116 * @value: Parameter value to set 1117 * 1118 * This function sets requested configuration parameter for the given pin. 1119 * 1120 * Return: Returns status, either success or error+reason. 1121 */ 1122 int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param, 1123 u32 value) 1124 { 1125 return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, pin, 1126 param, value, 0, NULL); 1127 } 1128 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config); 1129 1130 /** 1131 * zynqmp_pm_bootmode_read() - PM Config API for read bootpin status 1132 * @ps_mode: Returned output value of ps_mode 1133 * 1134 * This API function is to be used for notify the power management controller 1135 * to read bootpin status. 1136 * 1137 * Return: status, either success or error+reason 1138 */ 1139 unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode) 1140 { 1141 unsigned int ret; 1142 u32 ret_payload[PAYLOAD_ARG_CNT]; 1143 1144 ret = zynqmp_pm_invoke_fn(PM_MMIO_READ, CRL_APB_BOOT_PIN_CTRL, 0, 1145 0, 0, ret_payload); 1146 1147 *ps_mode = ret_payload[1]; 1148 1149 return ret; 1150 } 1151 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_read); 1152 1153 /** 1154 * zynqmp_pm_bootmode_write() - PM Config API for Configure bootpin 1155 * @ps_mode: Value to be written to the bootpin ctrl register 1156 * 1157 * This API function is to be used for notify the power management controller 1158 * to configure bootpin. 1159 * 1160 * Return: Returns status, either success or error+reason 1161 */ 1162 int zynqmp_pm_bootmode_write(u32 ps_mode) 1163 { 1164 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, CRL_APB_BOOT_PIN_CTRL, 1165 CRL_APB_BOOTPIN_CTRL_MASK, ps_mode, 0, NULL); 1166 } 1167 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write); 1168 1169 /** 1170 * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller 1171 * master has initialized its own power management 1172 * 1173 * Return: Returns status, either success or error+reason 1174 * 1175 * This API function is to be used for notify the power management controller 1176 * about the completed power management initialization. 1177 */ 1178 int zynqmp_pm_init_finalize(void) 1179 { 1180 return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL); 1181 } 1182 EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize); 1183 1184 /** 1185 * zynqmp_pm_set_suspend_mode() - Set system suspend mode 1186 * @mode: Mode to set for system suspend 1187 * 1188 * This API function is used to set mode of system suspend. 1189 * 1190 * Return: Returns status, either success or error+reason 1191 */ 1192 int zynqmp_pm_set_suspend_mode(u32 mode) 1193 { 1194 return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL); 1195 } 1196 EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode); 1197 1198 /** 1199 * zynqmp_pm_request_node() - Request a node with specific capabilities 1200 * @node: Node ID of the slave 1201 * @capabilities: Requested capabilities of the slave 1202 * @qos: Quality of service (not supported) 1203 * @ack: Flag to specify whether acknowledge is requested 1204 * 1205 * This function is used by master to request particular node from firmware. 1206 * Every master must request node before using it. 1207 * 1208 * Return: Returns status, either success or error+reason 1209 */ 1210 int zynqmp_pm_request_node(const u32 node, const u32 capabilities, 1211 const u32 qos, const enum zynqmp_pm_request_ack ack) 1212 { 1213 return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities, 1214 qos, ack, NULL); 1215 } 1216 EXPORT_SYMBOL_GPL(zynqmp_pm_request_node); 1217 1218 /** 1219 * zynqmp_pm_release_node() - Release a node 1220 * @node: Node ID of the slave 1221 * 1222 * This function is used by master to inform firmware that master 1223 * has released node. Once released, master must not use that node 1224 * without re-request. 1225 * 1226 * Return: Returns status, either success or error+reason 1227 */ 1228 int zynqmp_pm_release_node(const u32 node) 1229 { 1230 return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL); 1231 } 1232 EXPORT_SYMBOL_GPL(zynqmp_pm_release_node); 1233 1234 /** 1235 * zynqmp_pm_get_rpu_mode() - Get RPU mode 1236 * @node_id: Node ID of the device 1237 * @rpu_mode: return by reference value 1238 * either split or lockstep 1239 * 1240 * Return: return 0 on success or error+reason. 1241 * if success, then rpu_mode will be set 1242 * to current rpu mode. 1243 */ 1244 int zynqmp_pm_get_rpu_mode(u32 node_id, enum rpu_oper_mode *rpu_mode) 1245 { 1246 u32 ret_payload[PAYLOAD_ARG_CNT]; 1247 int ret; 1248 1249 ret = zynqmp_pm_invoke_fn(PM_IOCTL, node_id, 1250 IOCTL_GET_RPU_OPER_MODE, 0, 0, ret_payload); 1251 1252 /* only set rpu_mode if no error */ 1253 if (ret == XST_PM_SUCCESS) 1254 *rpu_mode = ret_payload[0]; 1255 1256 return ret; 1257 } 1258 EXPORT_SYMBOL_GPL(zynqmp_pm_get_rpu_mode); 1259 1260 /** 1261 * zynqmp_pm_set_rpu_mode() - Set RPU mode 1262 * @node_id: Node ID of the device 1263 * @rpu_mode: Argument 1 to requested IOCTL call. either split or lockstep 1264 * 1265 * This function is used to set RPU mode to split or 1266 * lockstep 1267 * 1268 * Return: Returns status, either success or error+reason 1269 */ 1270 int zynqmp_pm_set_rpu_mode(u32 node_id, enum rpu_oper_mode rpu_mode) 1271 { 1272 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, 1273 IOCTL_SET_RPU_OPER_MODE, (u32)rpu_mode, 1274 0, NULL); 1275 } 1276 EXPORT_SYMBOL_GPL(zynqmp_pm_set_rpu_mode); 1277 1278 /** 1279 * zynqmp_pm_set_tcm_config - configure TCM 1280 * @node_id: Firmware specific TCM subsystem ID 1281 * @tcm_mode: Argument 1 to requested IOCTL call 1282 * either PM_RPU_TCM_COMB or PM_RPU_TCM_SPLIT 1283 * 1284 * This function is used to set RPU mode to split or combined 1285 * 1286 * Return: status: 0 for success, else failure 1287 */ 1288 int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode) 1289 { 1290 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, 1291 IOCTL_TCM_COMB_CONFIG, (u32)tcm_mode, 0, 1292 NULL); 1293 } 1294 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tcm_config); 1295 1296 /** 1297 * zynqmp_pm_force_pwrdwn - PM call to request for another PU or subsystem to 1298 * be powered down forcefully 1299 * @node: Node ID of the targeted PU or subsystem 1300 * @ack: Flag to specify whether acknowledge is requested 1301 * 1302 * Return: status, either success or error+reason 1303 */ 1304 int zynqmp_pm_force_pwrdwn(const u32 node, 1305 const enum zynqmp_pm_request_ack ack) 1306 { 1307 return zynqmp_pm_invoke_fn(PM_FORCE_POWERDOWN, node, ack, 0, 0, NULL); 1308 } 1309 EXPORT_SYMBOL_GPL(zynqmp_pm_force_pwrdwn); 1310 1311 /** 1312 * zynqmp_pm_request_wake - PM call to wake up selected master or subsystem 1313 * @node: Node ID of the master or subsystem 1314 * @set_addr: Specifies whether the address argument is relevant 1315 * @address: Address from which to resume when woken up 1316 * @ack: Flag to specify whether acknowledge requested 1317 * 1318 * Return: status, either success or error+reason 1319 */ 1320 int zynqmp_pm_request_wake(const u32 node, 1321 const bool set_addr, 1322 const u64 address, 1323 const enum zynqmp_pm_request_ack ack) 1324 { 1325 /* set_addr flag is encoded into 1st bit of address */ 1326 return zynqmp_pm_invoke_fn(PM_REQUEST_WAKEUP, node, address | set_addr, 1327 address >> 32, ack, NULL); 1328 } 1329 EXPORT_SYMBOL_GPL(zynqmp_pm_request_wake); 1330 1331 /** 1332 * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves 1333 * @node: Node ID of the slave 1334 * @capabilities: Requested capabilities of the slave 1335 * @qos: Quality of service (not supported) 1336 * @ack: Flag to specify whether acknowledge is requested 1337 * 1338 * This API function is to be used for slaves a PU already has requested 1339 * to change its capabilities. 1340 * 1341 * Return: Returns status, either success or error+reason 1342 */ 1343 int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, 1344 const u32 qos, 1345 const enum zynqmp_pm_request_ack ack) 1346 { 1347 return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities, 1348 qos, ack, NULL); 1349 } 1350 EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement); 1351 1352 /** 1353 * zynqmp_pm_load_pdi - Load and process PDI 1354 * @src: Source device where PDI is located 1355 * @address: PDI src address 1356 * 1357 * This function provides support to load PDI from linux 1358 * 1359 * Return: Returns status, either success or error+reason 1360 */ 1361 int zynqmp_pm_load_pdi(const u32 src, const u64 address) 1362 { 1363 return zynqmp_pm_invoke_fn(PM_LOAD_PDI, src, 1364 lower_32_bits(address), 1365 upper_32_bits(address), 0, NULL); 1366 } 1367 EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi); 1368 1369 /** 1370 * zynqmp_pm_aes_engine - Access AES hardware to encrypt/decrypt the data using 1371 * AES-GCM core. 1372 * @address: Address of the AesParams structure. 1373 * @out: Returned output value 1374 * 1375 * Return: Returns status, either success or error code. 1376 */ 1377 int zynqmp_pm_aes_engine(const u64 address, u32 *out) 1378 { 1379 u32 ret_payload[PAYLOAD_ARG_CNT]; 1380 int ret; 1381 1382 if (!out) 1383 return -EINVAL; 1384 1385 ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address), 1386 lower_32_bits(address), 1387 0, 0, ret_payload); 1388 *out = ret_payload[1]; 1389 1390 return ret; 1391 } 1392 EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine); 1393 1394 /** 1395 * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash 1396 * @address: Address of the data/ Address of output buffer where 1397 * hash should be stored. 1398 * @size: Size of the data. 1399 * @flags: 1400 * BIT(0) - for initializing csudma driver and SHA3(Here address 1401 * and size inputs can be NULL). 1402 * BIT(1) - to call Sha3_Update API which can be called multiple 1403 * times when data is not contiguous. 1404 * BIT(2) - to get final hash of the whole updated data. 1405 * Hash will be overwritten at provided address with 1406 * 48 bytes. 1407 * 1408 * Return: Returns status, either success or error code. 1409 */ 1410 int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags) 1411 { 1412 u32 lower_addr = lower_32_bits(address); 1413 u32 upper_addr = upper_32_bits(address); 1414 1415 return zynqmp_pm_invoke_fn(PM_SECURE_SHA, upper_addr, lower_addr, 1416 size, flags, NULL); 1417 } 1418 EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash); 1419 1420 /** 1421 * zynqmp_pm_register_notifier() - PM API for register a subsystem 1422 * to be notified about specific 1423 * event/error. 1424 * @node: Node ID to which the event is related. 1425 * @event: Event Mask of Error events for which wants to get notified. 1426 * @wake: Wake subsystem upon capturing the event if value 1 1427 * @enable: Enable the registration for value 1, disable for value 0 1428 * 1429 * This function is used to register/un-register for particular node-event 1430 * combination in firmware. 1431 * 1432 * Return: Returns status, either success or error+reason 1433 */ 1434 1435 int zynqmp_pm_register_notifier(const u32 node, const u32 event, 1436 const u32 wake, const u32 enable) 1437 { 1438 return zynqmp_pm_invoke_fn(PM_REGISTER_NOTIFIER, node, event, 1439 wake, enable, NULL); 1440 } 1441 EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier); 1442 1443 /** 1444 * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart 1445 * @type: Shutdown or restart? 0 for shutdown, 1 for restart 1446 * @subtype: Specifies which system should be restarted or shut down 1447 * 1448 * Return: Returns status, either success or error+reason 1449 */ 1450 int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype) 1451 { 1452 return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, type, subtype, 1453 0, 0, NULL); 1454 } 1455 1456 /** 1457 * zynqmp_pm_set_feature_config - PM call to request IOCTL for feature config 1458 * @id: The config ID of the feature to be configured 1459 * @value: The config value of the feature to be configured 1460 * 1461 * Return: Returns 0 on success or error value on failure. 1462 */ 1463 int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value) 1464 { 1465 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_FEATURE_CONFIG, 1466 id, value, NULL); 1467 } 1468 1469 /** 1470 * zynqmp_pm_get_feature_config - PM call to get value of configured feature 1471 * @id: The config id of the feature to be queried 1472 * @payload: Returned value array 1473 * 1474 * Return: Returns 0 on success or error value on failure. 1475 */ 1476 int zynqmp_pm_get_feature_config(enum pm_feature_config_id id, 1477 u32 *payload) 1478 { 1479 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_FEATURE_CONFIG, 1480 id, 0, payload); 1481 } 1482 1483 /** 1484 * zynqmp_pm_set_sd_config - PM call to set value of SD config registers 1485 * @node: SD node ID 1486 * @config: The config type of SD registers 1487 * @value: Value to be set 1488 * 1489 * Return: Returns 0 on success or error value on failure. 1490 */ 1491 int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value) 1492 { 1493 return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_SD_CONFIG, 1494 config, value, NULL); 1495 } 1496 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_config); 1497 1498 /** 1499 * zynqmp_pm_set_gem_config - PM call to set value of GEM config registers 1500 * @node: GEM node ID 1501 * @config: The config type of GEM registers 1502 * @value: Value to be set 1503 * 1504 * Return: Returns 0 on success or error value on failure. 1505 */ 1506 int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config, 1507 u32 value) 1508 { 1509 return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_GEM_CONFIG, 1510 config, value, NULL); 1511 } 1512 EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config); 1513 1514 /** 1515 * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope 1516 * @subtype: Shutdown subtype 1517 * @name: Matching string for scope argument 1518 * 1519 * This struct encapsulates mapping between shutdown scope ID and string. 1520 */ 1521 struct zynqmp_pm_shutdown_scope { 1522 const enum zynqmp_pm_shutdown_subtype subtype; 1523 const char *name; 1524 }; 1525 1526 static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = { 1527 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = { 1528 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM, 1529 .name = "subsystem", 1530 }, 1531 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = { 1532 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY, 1533 .name = "ps_only", 1534 }, 1535 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = { 1536 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM, 1537 .name = "system", 1538 }, 1539 }; 1540 1541 static struct zynqmp_pm_shutdown_scope *selected_scope = 1542 &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM]; 1543 1544 /** 1545 * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid 1546 * @scope_string: Shutdown scope string 1547 * 1548 * Return: Return pointer to matching shutdown scope struct from 1549 * array of available options in system if string is valid, 1550 * otherwise returns NULL. 1551 */ 1552 static struct zynqmp_pm_shutdown_scope* 1553 zynqmp_pm_is_shutdown_scope_valid(const char *scope_string) 1554 { 1555 int count; 1556 1557 for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++) 1558 if (sysfs_streq(scope_string, shutdown_scopes[count].name)) 1559 return &shutdown_scopes[count]; 1560 1561 return NULL; 1562 } 1563 1564 static ssize_t shutdown_scope_show(struct device *device, 1565 struct device_attribute *attr, 1566 char *buf) 1567 { 1568 int i; 1569 1570 for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) { 1571 if (&shutdown_scopes[i] == selected_scope) { 1572 strcat(buf, "["); 1573 strcat(buf, shutdown_scopes[i].name); 1574 strcat(buf, "]"); 1575 } else { 1576 strcat(buf, shutdown_scopes[i].name); 1577 } 1578 strcat(buf, " "); 1579 } 1580 strcat(buf, "\n"); 1581 1582 return strlen(buf); 1583 } 1584 1585 static ssize_t shutdown_scope_store(struct device *device, 1586 struct device_attribute *attr, 1587 const char *buf, size_t count) 1588 { 1589 int ret; 1590 struct zynqmp_pm_shutdown_scope *scope; 1591 1592 scope = zynqmp_pm_is_shutdown_scope_valid(buf); 1593 if (!scope) 1594 return -EINVAL; 1595 1596 ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY, 1597 scope->subtype); 1598 if (ret) { 1599 pr_err("unable to set shutdown scope %s\n", buf); 1600 return ret; 1601 } 1602 1603 selected_scope = scope; 1604 1605 return count; 1606 } 1607 1608 static DEVICE_ATTR_RW(shutdown_scope); 1609 1610 static ssize_t health_status_store(struct device *device, 1611 struct device_attribute *attr, 1612 const char *buf, size_t count) 1613 { 1614 int ret; 1615 unsigned int value; 1616 1617 ret = kstrtouint(buf, 10, &value); 1618 if (ret) 1619 return ret; 1620 1621 ret = zynqmp_pm_set_boot_health_status(value); 1622 if (ret) { 1623 dev_err(device, "unable to set healthy bit value to %u\n", 1624 value); 1625 return ret; 1626 } 1627 1628 return count; 1629 } 1630 1631 static DEVICE_ATTR_WO(health_status); 1632 1633 static ssize_t ggs_show(struct device *device, 1634 struct device_attribute *attr, 1635 char *buf, 1636 u32 reg) 1637 { 1638 int ret; 1639 u32 ret_payload[PAYLOAD_ARG_CNT]; 1640 1641 ret = zynqmp_pm_read_ggs(reg, ret_payload); 1642 if (ret) 1643 return ret; 1644 1645 return sprintf(buf, "0x%x\n", ret_payload[1]); 1646 } 1647 1648 static ssize_t ggs_store(struct device *device, 1649 struct device_attribute *attr, 1650 const char *buf, size_t count, 1651 u32 reg) 1652 { 1653 long value; 1654 int ret; 1655 1656 if (reg >= GSS_NUM_REGS) 1657 return -EINVAL; 1658 1659 ret = kstrtol(buf, 16, &value); 1660 if (ret) { 1661 count = -EFAULT; 1662 goto err; 1663 } 1664 1665 ret = zynqmp_pm_write_ggs(reg, value); 1666 if (ret) 1667 count = -EFAULT; 1668 err: 1669 return count; 1670 } 1671 1672 /* GGS register show functions */ 1673 #define GGS0_SHOW(N) \ 1674 ssize_t ggs##N##_show(struct device *device, \ 1675 struct device_attribute *attr, \ 1676 char *buf) \ 1677 { \ 1678 return ggs_show(device, attr, buf, N); \ 1679 } 1680 1681 static GGS0_SHOW(0); 1682 static GGS0_SHOW(1); 1683 static GGS0_SHOW(2); 1684 static GGS0_SHOW(3); 1685 1686 /* GGS register store function */ 1687 #define GGS0_STORE(N) \ 1688 ssize_t ggs##N##_store(struct device *device, \ 1689 struct device_attribute *attr, \ 1690 const char *buf, \ 1691 size_t count) \ 1692 { \ 1693 return ggs_store(device, attr, buf, count, N); \ 1694 } 1695 1696 static GGS0_STORE(0); 1697 static GGS0_STORE(1); 1698 static GGS0_STORE(2); 1699 static GGS0_STORE(3); 1700 1701 static ssize_t pggs_show(struct device *device, 1702 struct device_attribute *attr, 1703 char *buf, 1704 u32 reg) 1705 { 1706 int ret; 1707 u32 ret_payload[PAYLOAD_ARG_CNT]; 1708 1709 ret = zynqmp_pm_read_pggs(reg, ret_payload); 1710 if (ret) 1711 return ret; 1712 1713 return sprintf(buf, "0x%x\n", ret_payload[1]); 1714 } 1715 1716 static ssize_t pggs_store(struct device *device, 1717 struct device_attribute *attr, 1718 const char *buf, size_t count, 1719 u32 reg) 1720 { 1721 long value; 1722 int ret; 1723 1724 if (reg >= GSS_NUM_REGS) 1725 return -EINVAL; 1726 1727 ret = kstrtol(buf, 16, &value); 1728 if (ret) { 1729 count = -EFAULT; 1730 goto err; 1731 } 1732 1733 ret = zynqmp_pm_write_pggs(reg, value); 1734 if (ret) 1735 count = -EFAULT; 1736 1737 err: 1738 return count; 1739 } 1740 1741 #define PGGS0_SHOW(N) \ 1742 ssize_t pggs##N##_show(struct device *device, \ 1743 struct device_attribute *attr, \ 1744 char *buf) \ 1745 { \ 1746 return pggs_show(device, attr, buf, N); \ 1747 } 1748 1749 #define PGGS0_STORE(N) \ 1750 ssize_t pggs##N##_store(struct device *device, \ 1751 struct device_attribute *attr, \ 1752 const char *buf, \ 1753 size_t count) \ 1754 { \ 1755 return pggs_store(device, attr, buf, count, N); \ 1756 } 1757 1758 /* PGGS register show functions */ 1759 static PGGS0_SHOW(0); 1760 static PGGS0_SHOW(1); 1761 static PGGS0_SHOW(2); 1762 static PGGS0_SHOW(3); 1763 1764 /* PGGS register store functions */ 1765 static PGGS0_STORE(0); 1766 static PGGS0_STORE(1); 1767 static PGGS0_STORE(2); 1768 static PGGS0_STORE(3); 1769 1770 /* GGS register attributes */ 1771 static DEVICE_ATTR_RW(ggs0); 1772 static DEVICE_ATTR_RW(ggs1); 1773 static DEVICE_ATTR_RW(ggs2); 1774 static DEVICE_ATTR_RW(ggs3); 1775 1776 /* PGGS register attributes */ 1777 static DEVICE_ATTR_RW(pggs0); 1778 static DEVICE_ATTR_RW(pggs1); 1779 static DEVICE_ATTR_RW(pggs2); 1780 static DEVICE_ATTR_RW(pggs3); 1781 1782 static ssize_t feature_config_id_show(struct device *device, 1783 struct device_attribute *attr, 1784 char *buf) 1785 { 1786 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device); 1787 1788 return sysfs_emit(buf, "%d\n", devinfo->feature_conf_id); 1789 } 1790 1791 static ssize_t feature_config_id_store(struct device *device, 1792 struct device_attribute *attr, 1793 const char *buf, size_t count) 1794 { 1795 u32 config_id; 1796 int ret; 1797 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device); 1798 1799 if (!buf) 1800 return -EINVAL; 1801 1802 ret = kstrtou32(buf, 10, &config_id); 1803 if (ret) 1804 return ret; 1805 1806 devinfo->feature_conf_id = config_id; 1807 1808 return count; 1809 } 1810 1811 static DEVICE_ATTR_RW(feature_config_id); 1812 1813 static ssize_t feature_config_value_show(struct device *device, 1814 struct device_attribute *attr, 1815 char *buf) 1816 { 1817 int ret; 1818 u32 ret_payload[PAYLOAD_ARG_CNT]; 1819 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device); 1820 1821 ret = zynqmp_pm_get_feature_config(devinfo->feature_conf_id, 1822 ret_payload); 1823 if (ret) 1824 return ret; 1825 1826 return sysfs_emit(buf, "%d\n", ret_payload[1]); 1827 } 1828 1829 static ssize_t feature_config_value_store(struct device *device, 1830 struct device_attribute *attr, 1831 const char *buf, size_t count) 1832 { 1833 u32 value; 1834 int ret; 1835 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device); 1836 1837 if (!buf) 1838 return -EINVAL; 1839 1840 ret = kstrtou32(buf, 10, &value); 1841 if (ret) 1842 return ret; 1843 1844 ret = zynqmp_pm_set_feature_config(devinfo->feature_conf_id, 1845 value); 1846 if (ret) 1847 return ret; 1848 1849 return count; 1850 } 1851 1852 static DEVICE_ATTR_RW(feature_config_value); 1853 1854 static struct attribute *zynqmp_firmware_attrs[] = { 1855 &dev_attr_ggs0.attr, 1856 &dev_attr_ggs1.attr, 1857 &dev_attr_ggs2.attr, 1858 &dev_attr_ggs3.attr, 1859 &dev_attr_pggs0.attr, 1860 &dev_attr_pggs1.attr, 1861 &dev_attr_pggs2.attr, 1862 &dev_attr_pggs3.attr, 1863 &dev_attr_shutdown_scope.attr, 1864 &dev_attr_health_status.attr, 1865 &dev_attr_feature_config_id.attr, 1866 &dev_attr_feature_config_value.attr, 1867 NULL, 1868 }; 1869 1870 ATTRIBUTE_GROUPS(zynqmp_firmware); 1871 1872 static int zynqmp_firmware_probe(struct platform_device *pdev) 1873 { 1874 struct device *dev = &pdev->dev; 1875 struct device_node *np; 1876 struct zynqmp_devinfo *devinfo; 1877 int ret; 1878 1879 ret = get_set_conduit_method(dev->of_node); 1880 if (ret) 1881 return ret; 1882 1883 np = of_find_compatible_node(NULL, NULL, "xlnx,zynqmp"); 1884 if (!np) { 1885 np = of_find_compatible_node(NULL, NULL, "xlnx,versal"); 1886 if (!np) 1887 return 0; 1888 1889 feature_check_enabled = true; 1890 } 1891 1892 if (!feature_check_enabled) { 1893 ret = do_feature_check_call(PM_FEATURE_CHECK); 1894 if (ret >= 0) 1895 feature_check_enabled = true; 1896 } 1897 1898 of_node_put(np); 1899 1900 devinfo = devm_kzalloc(dev, sizeof(*devinfo), GFP_KERNEL); 1901 if (!devinfo) 1902 return -ENOMEM; 1903 1904 devinfo->dev = dev; 1905 1906 platform_set_drvdata(pdev, devinfo); 1907 1908 /* Check PM API version number */ 1909 ret = zynqmp_pm_get_api_version(&pm_api_version); 1910 if (ret) 1911 return ret; 1912 1913 if (pm_api_version < ZYNQMP_PM_VERSION) { 1914 panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n", 1915 __func__, 1916 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR, 1917 pm_api_version >> 16, pm_api_version & 0xFFFF); 1918 } 1919 1920 pr_info("%s Platform Management API v%d.%d\n", __func__, 1921 pm_api_version >> 16, pm_api_version & 0xFFFF); 1922 1923 /* Check trustzone version number */ 1924 ret = zynqmp_pm_get_trustzone_version(&pm_tz_version); 1925 if (ret) 1926 panic("Legacy trustzone found without version support\n"); 1927 1928 if (pm_tz_version < ZYNQMP_TZ_VERSION) 1929 panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n", 1930 __func__, 1931 ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR, 1932 pm_tz_version >> 16, pm_tz_version & 0xFFFF); 1933 1934 pr_info("%s Trustzone version v%d.%d\n", __func__, 1935 pm_tz_version >> 16, pm_tz_version & 0xFFFF); 1936 1937 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs, 1938 ARRAY_SIZE(firmware_devs), NULL, 0, NULL); 1939 if (ret) { 1940 dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret); 1941 return ret; 1942 } 1943 1944 zynqmp_pm_api_debugfs_init(); 1945 1946 np = of_find_compatible_node(NULL, NULL, "xlnx,versal"); 1947 if (np) { 1948 em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager", 1949 -1, NULL, 0); 1950 if (IS_ERR(em_dev)) 1951 dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n"); 1952 } 1953 of_node_put(np); 1954 1955 return of_platform_populate(dev->of_node, NULL, NULL, dev); 1956 } 1957 1958 static int zynqmp_firmware_remove(struct platform_device *pdev) 1959 { 1960 struct pm_api_feature_data *feature_data; 1961 struct hlist_node *tmp; 1962 int i; 1963 1964 mfd_remove_devices(&pdev->dev); 1965 zynqmp_pm_api_debugfs_exit(); 1966 1967 hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) { 1968 hash_del(&feature_data->hentry); 1969 kfree(feature_data); 1970 } 1971 1972 platform_device_unregister(em_dev); 1973 1974 return 0; 1975 } 1976 1977 static const struct of_device_id zynqmp_firmware_of_match[] = { 1978 {.compatible = "xlnx,zynqmp-firmware"}, 1979 {.compatible = "xlnx,versal-firmware"}, 1980 {}, 1981 }; 1982 MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match); 1983 1984 static struct platform_driver zynqmp_firmware_driver = { 1985 .driver = { 1986 .name = "zynqmp_firmware", 1987 .of_match_table = zynqmp_firmware_of_match, 1988 .dev_groups = zynqmp_firmware_groups, 1989 }, 1990 .probe = zynqmp_firmware_probe, 1991 .remove = zynqmp_firmware_remove, 1992 }; 1993 module_platform_driver(zynqmp_firmware_driver); 1994