1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * System Control and Management Interface (SCMI) Performance Protocol 4 * 5 * Copyright (C) 2018 ARM Ltd. 6 */ 7 8 #include <linux/bits.h> 9 #include <linux/of.h> 10 #include <linux/io.h> 11 #include <linux/io-64-nonatomic-hi-lo.h> 12 #include <linux/platform_device.h> 13 #include <linux/pm_opp.h> 14 #include <linux/sort.h> 15 16 #include "common.h" 17 18 enum scmi_performance_protocol_cmd { 19 PERF_DOMAIN_ATTRIBUTES = 0x3, 20 PERF_DESCRIBE_LEVELS = 0x4, 21 PERF_LIMITS_SET = 0x5, 22 PERF_LIMITS_GET = 0x6, 23 PERF_LEVEL_SET = 0x7, 24 PERF_LEVEL_GET = 0x8, 25 PERF_NOTIFY_LIMITS = 0x9, 26 PERF_NOTIFY_LEVEL = 0xa, 27 PERF_DESCRIBE_FASTCHANNEL = 0xb, 28 }; 29 30 enum scmi_performance_protocol_notify { 31 PERFORMANCE_LIMITS_CHANGED = 0x0, 32 PERFORMANCE_LEVEL_CHANGED = 0x1, 33 }; 34 35 struct scmi_opp { 36 u32 perf; 37 u32 power; 38 u32 trans_latency_us; 39 }; 40 41 struct scmi_msg_resp_perf_attributes { 42 __le16 num_domains; 43 __le16 flags; 44 #define POWER_SCALE_IN_MILLIWATT(x) ((x) & BIT(0)) 45 __le32 stats_addr_low; 46 __le32 stats_addr_high; 47 __le32 stats_size; 48 }; 49 50 struct scmi_msg_resp_perf_domain_attributes { 51 __le32 flags; 52 #define SUPPORTS_SET_LIMITS(x) ((x) & BIT(31)) 53 #define SUPPORTS_SET_PERF_LVL(x) ((x) & BIT(30)) 54 #define SUPPORTS_PERF_LIMIT_NOTIFY(x) ((x) & BIT(29)) 55 #define SUPPORTS_PERF_LEVEL_NOTIFY(x) ((x) & BIT(28)) 56 #define SUPPORTS_PERF_FASTCHANNELS(x) ((x) & BIT(27)) 57 __le32 rate_limit_us; 58 __le32 sustained_freq_khz; 59 __le32 sustained_perf_level; 60 u8 name[SCMI_MAX_STR_SIZE]; 61 }; 62 63 struct scmi_msg_perf_describe_levels { 64 __le32 domain; 65 __le32 level_index; 66 }; 67 68 struct scmi_perf_set_limits { 69 __le32 domain; 70 __le32 max_level; 71 __le32 min_level; 72 }; 73 74 struct scmi_perf_get_limits { 75 __le32 max_level; 76 __le32 min_level; 77 }; 78 79 struct scmi_perf_set_level { 80 __le32 domain; 81 __le32 level; 82 }; 83 84 struct scmi_perf_notify_level_or_limits { 85 __le32 domain; 86 __le32 notify_enable; 87 }; 88 89 struct scmi_msg_resp_perf_describe_levels { 90 __le16 num_returned; 91 __le16 num_remaining; 92 struct { 93 __le32 perf_val; 94 __le32 power; 95 __le16 transition_latency_us; 96 __le16 reserved; 97 } opp[]; 98 }; 99 100 struct scmi_perf_get_fc_info { 101 __le32 domain; 102 __le32 message_id; 103 }; 104 105 struct scmi_msg_resp_perf_desc_fc { 106 __le32 attr; 107 #define SUPPORTS_DOORBELL(x) ((x) & BIT(0)) 108 #define DOORBELL_REG_WIDTH(x) FIELD_GET(GENMASK(2, 1), (x)) 109 __le32 rate_limit; 110 __le32 chan_addr_low; 111 __le32 chan_addr_high; 112 __le32 chan_size; 113 __le32 db_addr_low; 114 __le32 db_addr_high; 115 __le32 db_set_lmask; 116 __le32 db_set_hmask; 117 __le32 db_preserve_lmask; 118 __le32 db_preserve_hmask; 119 }; 120 121 struct scmi_fc_db_info { 122 int width; 123 u64 set; 124 u64 mask; 125 void __iomem *addr; 126 }; 127 128 struct scmi_fc_info { 129 void __iomem *level_set_addr; 130 void __iomem *limit_set_addr; 131 void __iomem *level_get_addr; 132 void __iomem *limit_get_addr; 133 struct scmi_fc_db_info *level_set_db; 134 struct scmi_fc_db_info *limit_set_db; 135 }; 136 137 struct perf_dom_info { 138 bool set_limits; 139 bool set_perf; 140 bool perf_limit_notify; 141 bool perf_level_notify; 142 bool perf_fastchannels; 143 u32 opp_count; 144 u32 sustained_freq_khz; 145 u32 sustained_perf_level; 146 u32 mult_factor; 147 char name[SCMI_MAX_STR_SIZE]; 148 struct scmi_opp opp[MAX_OPPS]; 149 struct scmi_fc_info *fc_info; 150 }; 151 152 struct scmi_perf_info { 153 u32 version; 154 int num_domains; 155 bool power_scale_mw; 156 u64 stats_addr; 157 u32 stats_size; 158 struct perf_dom_info *dom_info; 159 }; 160 161 static int scmi_perf_attributes_get(const struct scmi_handle *handle, 162 struct scmi_perf_info *pi) 163 { 164 int ret; 165 struct scmi_xfer *t; 166 struct scmi_msg_resp_perf_attributes *attr; 167 168 ret = scmi_xfer_get_init(handle, PROTOCOL_ATTRIBUTES, 169 SCMI_PROTOCOL_PERF, 0, sizeof(*attr), &t); 170 if (ret) 171 return ret; 172 173 attr = t->rx.buf; 174 175 ret = scmi_do_xfer(handle, t); 176 if (!ret) { 177 u16 flags = le16_to_cpu(attr->flags); 178 179 pi->num_domains = le16_to_cpu(attr->num_domains); 180 pi->power_scale_mw = POWER_SCALE_IN_MILLIWATT(flags); 181 pi->stats_addr = le32_to_cpu(attr->stats_addr_low) | 182 (u64)le32_to_cpu(attr->stats_addr_high) << 32; 183 pi->stats_size = le32_to_cpu(attr->stats_size); 184 } 185 186 scmi_xfer_put(handle, t); 187 return ret; 188 } 189 190 static int 191 scmi_perf_domain_attributes_get(const struct scmi_handle *handle, u32 domain, 192 struct perf_dom_info *dom_info) 193 { 194 int ret; 195 struct scmi_xfer *t; 196 struct scmi_msg_resp_perf_domain_attributes *attr; 197 198 ret = scmi_xfer_get_init(handle, PERF_DOMAIN_ATTRIBUTES, 199 SCMI_PROTOCOL_PERF, sizeof(domain), 200 sizeof(*attr), &t); 201 if (ret) 202 return ret; 203 204 put_unaligned_le32(domain, t->tx.buf); 205 attr = t->rx.buf; 206 207 ret = scmi_do_xfer(handle, t); 208 if (!ret) { 209 u32 flags = le32_to_cpu(attr->flags); 210 211 dom_info->set_limits = SUPPORTS_SET_LIMITS(flags); 212 dom_info->set_perf = SUPPORTS_SET_PERF_LVL(flags); 213 dom_info->perf_limit_notify = SUPPORTS_PERF_LIMIT_NOTIFY(flags); 214 dom_info->perf_level_notify = SUPPORTS_PERF_LEVEL_NOTIFY(flags); 215 dom_info->perf_fastchannels = SUPPORTS_PERF_FASTCHANNELS(flags); 216 dom_info->sustained_freq_khz = 217 le32_to_cpu(attr->sustained_freq_khz); 218 dom_info->sustained_perf_level = 219 le32_to_cpu(attr->sustained_perf_level); 220 if (!dom_info->sustained_freq_khz || 221 !dom_info->sustained_perf_level) 222 /* CPUFreq converts to kHz, hence default 1000 */ 223 dom_info->mult_factor = 1000; 224 else 225 dom_info->mult_factor = 226 (dom_info->sustained_freq_khz * 1000) / 227 dom_info->sustained_perf_level; 228 strlcpy(dom_info->name, attr->name, SCMI_MAX_STR_SIZE); 229 } 230 231 scmi_xfer_put(handle, t); 232 return ret; 233 } 234 235 static int opp_cmp_func(const void *opp1, const void *opp2) 236 { 237 const struct scmi_opp *t1 = opp1, *t2 = opp2; 238 239 return t1->perf - t2->perf; 240 } 241 242 static int 243 scmi_perf_describe_levels_get(const struct scmi_handle *handle, u32 domain, 244 struct perf_dom_info *perf_dom) 245 { 246 int ret, cnt; 247 u32 tot_opp_cnt = 0; 248 u16 num_returned, num_remaining; 249 struct scmi_xfer *t; 250 struct scmi_opp *opp; 251 struct scmi_msg_perf_describe_levels *dom_info; 252 struct scmi_msg_resp_perf_describe_levels *level_info; 253 254 ret = scmi_xfer_get_init(handle, PERF_DESCRIBE_LEVELS, 255 SCMI_PROTOCOL_PERF, sizeof(*dom_info), 0, &t); 256 if (ret) 257 return ret; 258 259 dom_info = t->tx.buf; 260 level_info = t->rx.buf; 261 262 do { 263 dom_info->domain = cpu_to_le32(domain); 264 /* Set the number of OPPs to be skipped/already read */ 265 dom_info->level_index = cpu_to_le32(tot_opp_cnt); 266 267 ret = scmi_do_xfer(handle, t); 268 if (ret) 269 break; 270 271 num_returned = le16_to_cpu(level_info->num_returned); 272 num_remaining = le16_to_cpu(level_info->num_remaining); 273 if (tot_opp_cnt + num_returned > MAX_OPPS) { 274 dev_err(handle->dev, "No. of OPPs exceeded MAX_OPPS"); 275 break; 276 } 277 278 opp = &perf_dom->opp[tot_opp_cnt]; 279 for (cnt = 0; cnt < num_returned; cnt++, opp++) { 280 opp->perf = le32_to_cpu(level_info->opp[cnt].perf_val); 281 opp->power = le32_to_cpu(level_info->opp[cnt].power); 282 opp->trans_latency_us = le16_to_cpu 283 (level_info->opp[cnt].transition_latency_us); 284 285 dev_dbg(handle->dev, "Level %d Power %d Latency %dus\n", 286 opp->perf, opp->power, opp->trans_latency_us); 287 } 288 289 tot_opp_cnt += num_returned; 290 /* 291 * check for both returned and remaining to avoid infinite 292 * loop due to buggy firmware 293 */ 294 } while (num_returned && num_remaining); 295 296 perf_dom->opp_count = tot_opp_cnt; 297 scmi_xfer_put(handle, t); 298 299 sort(perf_dom->opp, tot_opp_cnt, sizeof(*opp), opp_cmp_func, NULL); 300 return ret; 301 } 302 303 #define SCMI_PERF_FC_RING_DB(w) \ 304 do { \ 305 u##w val = 0; \ 306 \ 307 if (db->mask) \ 308 val = ioread##w(db->addr) & db->mask; \ 309 iowrite##w((u##w)db->set | val, db->addr); \ 310 } while (0) 311 312 static void scmi_perf_fc_ring_db(struct scmi_fc_db_info *db) 313 { 314 if (!db || !db->addr) 315 return; 316 317 if (db->width == 1) 318 SCMI_PERF_FC_RING_DB(8); 319 else if (db->width == 2) 320 SCMI_PERF_FC_RING_DB(16); 321 else if (db->width == 4) 322 SCMI_PERF_FC_RING_DB(32); 323 else /* db->width == 8 */ 324 #ifdef CONFIG_64BIT 325 SCMI_PERF_FC_RING_DB(64); 326 #else 327 { 328 u64 val = 0; 329 330 if (db->mask) 331 val = ioread64_hi_lo(db->addr) & db->mask; 332 iowrite64_hi_lo(db->set | val, db->addr); 333 } 334 #endif 335 } 336 337 static int scmi_perf_mb_limits_set(const struct scmi_handle *handle, u32 domain, 338 u32 max_perf, u32 min_perf) 339 { 340 int ret; 341 struct scmi_xfer *t; 342 struct scmi_perf_set_limits *limits; 343 344 ret = scmi_xfer_get_init(handle, PERF_LIMITS_SET, SCMI_PROTOCOL_PERF, 345 sizeof(*limits), 0, &t); 346 if (ret) 347 return ret; 348 349 limits = t->tx.buf; 350 limits->domain = cpu_to_le32(domain); 351 limits->max_level = cpu_to_le32(max_perf); 352 limits->min_level = cpu_to_le32(min_perf); 353 354 ret = scmi_do_xfer(handle, t); 355 356 scmi_xfer_put(handle, t); 357 return ret; 358 } 359 360 static int scmi_perf_limits_set(const struct scmi_handle *handle, u32 domain, 361 u32 max_perf, u32 min_perf) 362 { 363 struct scmi_perf_info *pi = handle->perf_priv; 364 struct perf_dom_info *dom = pi->dom_info + domain; 365 366 if (dom->fc_info && dom->fc_info->limit_set_addr) { 367 iowrite32(max_perf, dom->fc_info->limit_set_addr); 368 iowrite32(min_perf, dom->fc_info->limit_set_addr + 4); 369 scmi_perf_fc_ring_db(dom->fc_info->limit_set_db); 370 return 0; 371 } 372 373 return scmi_perf_mb_limits_set(handle, domain, max_perf, min_perf); 374 } 375 376 static int scmi_perf_mb_limits_get(const struct scmi_handle *handle, u32 domain, 377 u32 *max_perf, u32 *min_perf) 378 { 379 int ret; 380 struct scmi_xfer *t; 381 struct scmi_perf_get_limits *limits; 382 383 ret = scmi_xfer_get_init(handle, PERF_LIMITS_GET, SCMI_PROTOCOL_PERF, 384 sizeof(__le32), 0, &t); 385 if (ret) 386 return ret; 387 388 put_unaligned_le32(domain, t->tx.buf); 389 390 ret = scmi_do_xfer(handle, t); 391 if (!ret) { 392 limits = t->rx.buf; 393 394 *max_perf = le32_to_cpu(limits->max_level); 395 *min_perf = le32_to_cpu(limits->min_level); 396 } 397 398 scmi_xfer_put(handle, t); 399 return ret; 400 } 401 402 static int scmi_perf_limits_get(const struct scmi_handle *handle, u32 domain, 403 u32 *max_perf, u32 *min_perf) 404 { 405 struct scmi_perf_info *pi = handle->perf_priv; 406 struct perf_dom_info *dom = pi->dom_info + domain; 407 408 if (dom->fc_info && dom->fc_info->limit_get_addr) { 409 *max_perf = ioread32(dom->fc_info->limit_get_addr); 410 *min_perf = ioread32(dom->fc_info->limit_get_addr + 4); 411 return 0; 412 } 413 414 return scmi_perf_mb_limits_get(handle, domain, max_perf, min_perf); 415 } 416 417 static int scmi_perf_mb_level_set(const struct scmi_handle *handle, u32 domain, 418 u32 level, bool poll) 419 { 420 int ret; 421 struct scmi_xfer *t; 422 struct scmi_perf_set_level *lvl; 423 424 ret = scmi_xfer_get_init(handle, PERF_LEVEL_SET, SCMI_PROTOCOL_PERF, 425 sizeof(*lvl), 0, &t); 426 if (ret) 427 return ret; 428 429 t->hdr.poll_completion = poll; 430 lvl = t->tx.buf; 431 lvl->domain = cpu_to_le32(domain); 432 lvl->level = cpu_to_le32(level); 433 434 ret = scmi_do_xfer(handle, t); 435 436 scmi_xfer_put(handle, t); 437 return ret; 438 } 439 440 static int scmi_perf_level_set(const struct scmi_handle *handle, u32 domain, 441 u32 level, bool poll) 442 { 443 struct scmi_perf_info *pi = handle->perf_priv; 444 struct perf_dom_info *dom = pi->dom_info + domain; 445 446 if (dom->fc_info && dom->fc_info->level_set_addr) { 447 iowrite32(level, dom->fc_info->level_set_addr); 448 scmi_perf_fc_ring_db(dom->fc_info->level_set_db); 449 return 0; 450 } 451 452 return scmi_perf_mb_level_set(handle, domain, level, poll); 453 } 454 455 static int scmi_perf_mb_level_get(const struct scmi_handle *handle, u32 domain, 456 u32 *level, bool poll) 457 { 458 int ret; 459 struct scmi_xfer *t; 460 461 ret = scmi_xfer_get_init(handle, PERF_LEVEL_GET, SCMI_PROTOCOL_PERF, 462 sizeof(u32), sizeof(u32), &t); 463 if (ret) 464 return ret; 465 466 t->hdr.poll_completion = poll; 467 put_unaligned_le32(domain, t->tx.buf); 468 469 ret = scmi_do_xfer(handle, t); 470 if (!ret) 471 *level = get_unaligned_le32(t->rx.buf); 472 473 scmi_xfer_put(handle, t); 474 return ret; 475 } 476 477 static int scmi_perf_level_get(const struct scmi_handle *handle, u32 domain, 478 u32 *level, bool poll) 479 { 480 struct scmi_perf_info *pi = handle->perf_priv; 481 struct perf_dom_info *dom = pi->dom_info + domain; 482 483 if (dom->fc_info && dom->fc_info->level_get_addr) { 484 *level = ioread32(dom->fc_info->level_get_addr); 485 return 0; 486 } 487 488 return scmi_perf_mb_level_get(handle, domain, level, poll); 489 } 490 491 static bool scmi_perf_fc_size_is_valid(u32 msg, u32 size) 492 { 493 if ((msg == PERF_LEVEL_GET || msg == PERF_LEVEL_SET) && size == 4) 494 return true; 495 if ((msg == PERF_LIMITS_GET || msg == PERF_LIMITS_SET) && size == 8) 496 return true; 497 return false; 498 } 499 500 static void 501 scmi_perf_domain_desc_fc(const struct scmi_handle *handle, u32 domain, 502 u32 message_id, void __iomem **p_addr, 503 struct scmi_fc_db_info **p_db) 504 { 505 int ret; 506 u32 flags; 507 u64 phys_addr; 508 u8 size; 509 void __iomem *addr; 510 struct scmi_xfer *t; 511 struct scmi_fc_db_info *db; 512 struct scmi_perf_get_fc_info *info; 513 struct scmi_msg_resp_perf_desc_fc *resp; 514 515 if (!p_addr) 516 return; 517 518 ret = scmi_xfer_get_init(handle, PERF_DESCRIBE_FASTCHANNEL, 519 SCMI_PROTOCOL_PERF, 520 sizeof(*info), sizeof(*resp), &t); 521 if (ret) 522 return; 523 524 info = t->tx.buf; 525 info->domain = cpu_to_le32(domain); 526 info->message_id = cpu_to_le32(message_id); 527 528 ret = scmi_do_xfer(handle, t); 529 if (ret) 530 goto err_xfer; 531 532 resp = t->rx.buf; 533 flags = le32_to_cpu(resp->attr); 534 size = le32_to_cpu(resp->chan_size); 535 if (!scmi_perf_fc_size_is_valid(message_id, size)) 536 goto err_xfer; 537 538 phys_addr = le32_to_cpu(resp->chan_addr_low); 539 phys_addr |= (u64)le32_to_cpu(resp->chan_addr_high) << 32; 540 addr = devm_ioremap(handle->dev, phys_addr, size); 541 if (!addr) 542 goto err_xfer; 543 *p_addr = addr; 544 545 if (p_db && SUPPORTS_DOORBELL(flags)) { 546 db = devm_kzalloc(handle->dev, sizeof(*db), GFP_KERNEL); 547 if (!db) 548 goto err_xfer; 549 550 size = 1 << DOORBELL_REG_WIDTH(flags); 551 phys_addr = le32_to_cpu(resp->db_addr_low); 552 phys_addr |= (u64)le32_to_cpu(resp->db_addr_high) << 32; 553 addr = devm_ioremap(handle->dev, phys_addr, size); 554 if (!addr) 555 goto err_xfer; 556 557 db->addr = addr; 558 db->width = size; 559 db->set = le32_to_cpu(resp->db_set_lmask); 560 db->set |= (u64)le32_to_cpu(resp->db_set_hmask) << 32; 561 db->mask = le32_to_cpu(resp->db_preserve_lmask); 562 db->mask |= (u64)le32_to_cpu(resp->db_preserve_hmask) << 32; 563 *p_db = db; 564 } 565 err_xfer: 566 scmi_xfer_put(handle, t); 567 } 568 569 static void scmi_perf_domain_init_fc(const struct scmi_handle *handle, 570 u32 domain, struct scmi_fc_info **p_fc) 571 { 572 struct scmi_fc_info *fc; 573 574 fc = devm_kzalloc(handle->dev, sizeof(*fc), GFP_KERNEL); 575 if (!fc) 576 return; 577 578 scmi_perf_domain_desc_fc(handle, domain, PERF_LEVEL_SET, 579 &fc->level_set_addr, &fc->level_set_db); 580 scmi_perf_domain_desc_fc(handle, domain, PERF_LEVEL_GET, 581 &fc->level_get_addr, NULL); 582 scmi_perf_domain_desc_fc(handle, domain, PERF_LIMITS_SET, 583 &fc->limit_set_addr, &fc->limit_set_db); 584 scmi_perf_domain_desc_fc(handle, domain, PERF_LIMITS_GET, 585 &fc->limit_get_addr, NULL); 586 *p_fc = fc; 587 } 588 589 /* Device specific ops */ 590 static int scmi_dev_domain_id(struct device *dev) 591 { 592 struct of_phandle_args clkspec; 593 594 if (of_parse_phandle_with_args(dev->of_node, "clocks", "#clock-cells", 595 0, &clkspec)) 596 return -EINVAL; 597 598 return clkspec.args[0]; 599 } 600 601 static int scmi_dvfs_device_opps_add(const struct scmi_handle *handle, 602 struct device *dev) 603 { 604 int idx, ret, domain; 605 unsigned long freq; 606 struct scmi_opp *opp; 607 struct perf_dom_info *dom; 608 struct scmi_perf_info *pi = handle->perf_priv; 609 610 domain = scmi_dev_domain_id(dev); 611 if (domain < 0) 612 return domain; 613 614 dom = pi->dom_info + domain; 615 616 for (opp = dom->opp, idx = 0; idx < dom->opp_count; idx++, opp++) { 617 freq = opp->perf * dom->mult_factor; 618 619 ret = dev_pm_opp_add(dev, freq, 0); 620 if (ret) { 621 dev_warn(dev, "failed to add opp %luHz\n", freq); 622 623 while (idx-- > 0) { 624 freq = (--opp)->perf * dom->mult_factor; 625 dev_pm_opp_remove(dev, freq); 626 } 627 return ret; 628 } 629 } 630 return 0; 631 } 632 633 static int scmi_dvfs_transition_latency_get(const struct scmi_handle *handle, 634 struct device *dev) 635 { 636 struct perf_dom_info *dom; 637 struct scmi_perf_info *pi = handle->perf_priv; 638 int domain = scmi_dev_domain_id(dev); 639 640 if (domain < 0) 641 return domain; 642 643 dom = pi->dom_info + domain; 644 /* uS to nS */ 645 return dom->opp[dom->opp_count - 1].trans_latency_us * 1000; 646 } 647 648 static int scmi_dvfs_freq_set(const struct scmi_handle *handle, u32 domain, 649 unsigned long freq, bool poll) 650 { 651 struct scmi_perf_info *pi = handle->perf_priv; 652 struct perf_dom_info *dom = pi->dom_info + domain; 653 654 return scmi_perf_level_set(handle, domain, freq / dom->mult_factor, 655 poll); 656 } 657 658 static int scmi_dvfs_freq_get(const struct scmi_handle *handle, u32 domain, 659 unsigned long *freq, bool poll) 660 { 661 int ret; 662 u32 level; 663 struct scmi_perf_info *pi = handle->perf_priv; 664 struct perf_dom_info *dom = pi->dom_info + domain; 665 666 ret = scmi_perf_level_get(handle, domain, &level, poll); 667 if (!ret) 668 *freq = level * dom->mult_factor; 669 670 return ret; 671 } 672 673 static int scmi_dvfs_est_power_get(const struct scmi_handle *handle, u32 domain, 674 unsigned long *freq, unsigned long *power) 675 { 676 struct scmi_perf_info *pi = handle->perf_priv; 677 struct perf_dom_info *dom; 678 unsigned long opp_freq; 679 int idx, ret = -EINVAL; 680 struct scmi_opp *opp; 681 682 dom = pi->dom_info + domain; 683 if (!dom) 684 return -EIO; 685 686 for (opp = dom->opp, idx = 0; idx < dom->opp_count; idx++, opp++) { 687 opp_freq = opp->perf * dom->mult_factor; 688 if (opp_freq < *freq) 689 continue; 690 691 *freq = opp_freq; 692 *power = opp->power; 693 ret = 0; 694 break; 695 } 696 697 return ret; 698 } 699 700 static struct scmi_perf_ops perf_ops = { 701 .limits_set = scmi_perf_limits_set, 702 .limits_get = scmi_perf_limits_get, 703 .level_set = scmi_perf_level_set, 704 .level_get = scmi_perf_level_get, 705 .device_domain_id = scmi_dev_domain_id, 706 .transition_latency_get = scmi_dvfs_transition_latency_get, 707 .device_opps_add = scmi_dvfs_device_opps_add, 708 .freq_set = scmi_dvfs_freq_set, 709 .freq_get = scmi_dvfs_freq_get, 710 .est_power_get = scmi_dvfs_est_power_get, 711 }; 712 713 static int scmi_perf_protocol_init(struct scmi_handle *handle) 714 { 715 int domain; 716 u32 version; 717 struct scmi_perf_info *pinfo; 718 719 scmi_version_get(handle, SCMI_PROTOCOL_PERF, &version); 720 721 dev_dbg(handle->dev, "Performance Version %d.%d\n", 722 PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version)); 723 724 pinfo = devm_kzalloc(handle->dev, sizeof(*pinfo), GFP_KERNEL); 725 if (!pinfo) 726 return -ENOMEM; 727 728 scmi_perf_attributes_get(handle, pinfo); 729 730 pinfo->dom_info = devm_kcalloc(handle->dev, pinfo->num_domains, 731 sizeof(*pinfo->dom_info), GFP_KERNEL); 732 if (!pinfo->dom_info) 733 return -ENOMEM; 734 735 for (domain = 0; domain < pinfo->num_domains; domain++) { 736 struct perf_dom_info *dom = pinfo->dom_info + domain; 737 738 scmi_perf_domain_attributes_get(handle, domain, dom); 739 scmi_perf_describe_levels_get(handle, domain, dom); 740 741 if (dom->perf_fastchannels) 742 scmi_perf_domain_init_fc(handle, domain, &dom->fc_info); 743 } 744 745 pinfo->version = version; 746 handle->perf_ops = &perf_ops; 747 handle->perf_priv = pinfo; 748 749 return 0; 750 } 751 752 static int __init scmi_perf_init(void) 753 { 754 return scmi_protocol_register(SCMI_PROTOCOL_PERF, 755 &scmi_perf_protocol_init); 756 } 757 subsys_initcall(scmi_perf_init); 758