1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * System Control and Management Interface (SCMI) Performance Protocol 4 * 5 * Copyright (C) 2018 ARM Ltd. 6 */ 7 8 #define pr_fmt(fmt) "SCMI Notifications PERF - " fmt 9 10 #include <linux/bits.h> 11 #include <linux/of.h> 12 #include <linux/io.h> 13 #include <linux/io-64-nonatomic-hi-lo.h> 14 #include <linux/platform_device.h> 15 #include <linux/pm_opp.h> 16 #include <linux/scmi_protocol.h> 17 #include <linux/sort.h> 18 19 #include "common.h" 20 #include "notify.h" 21 22 enum scmi_performance_protocol_cmd { 23 PERF_DOMAIN_ATTRIBUTES = 0x3, 24 PERF_DESCRIBE_LEVELS = 0x4, 25 PERF_LIMITS_SET = 0x5, 26 PERF_LIMITS_GET = 0x6, 27 PERF_LEVEL_SET = 0x7, 28 PERF_LEVEL_GET = 0x8, 29 PERF_NOTIFY_LIMITS = 0x9, 30 PERF_NOTIFY_LEVEL = 0xa, 31 PERF_DESCRIBE_FASTCHANNEL = 0xb, 32 }; 33 34 struct scmi_opp { 35 u32 perf; 36 u32 power; 37 u32 trans_latency_us; 38 }; 39 40 struct scmi_msg_resp_perf_attributes { 41 __le16 num_domains; 42 __le16 flags; 43 #define POWER_SCALE_IN_MILLIWATT(x) ((x) & BIT(0)) 44 __le32 stats_addr_low; 45 __le32 stats_addr_high; 46 __le32 stats_size; 47 }; 48 49 struct scmi_msg_resp_perf_domain_attributes { 50 __le32 flags; 51 #define SUPPORTS_SET_LIMITS(x) ((x) & BIT(31)) 52 #define SUPPORTS_SET_PERF_LVL(x) ((x) & BIT(30)) 53 #define SUPPORTS_PERF_LIMIT_NOTIFY(x) ((x) & BIT(29)) 54 #define SUPPORTS_PERF_LEVEL_NOTIFY(x) ((x) & BIT(28)) 55 #define SUPPORTS_PERF_FASTCHANNELS(x) ((x) & BIT(27)) 56 __le32 rate_limit_us; 57 __le32 sustained_freq_khz; 58 __le32 sustained_perf_level; 59 u8 name[SCMI_MAX_STR_SIZE]; 60 }; 61 62 struct scmi_msg_perf_describe_levels { 63 __le32 domain; 64 __le32 level_index; 65 }; 66 67 struct scmi_perf_set_limits { 68 __le32 domain; 69 __le32 max_level; 70 __le32 min_level; 71 }; 72 73 struct scmi_perf_get_limits { 74 __le32 max_level; 75 __le32 min_level; 76 }; 77 78 struct scmi_perf_set_level { 79 __le32 domain; 80 __le32 level; 81 }; 82 83 struct scmi_perf_notify_level_or_limits { 84 __le32 domain; 85 __le32 notify_enable; 86 }; 87 88 struct scmi_perf_limits_notify_payld { 89 __le32 agent_id; 90 __le32 domain_id; 91 __le32 range_max; 92 __le32 range_min; 93 }; 94 95 struct scmi_perf_level_notify_payld { 96 __le32 agent_id; 97 __le32 domain_id; 98 __le32 performance_level; 99 }; 100 101 struct scmi_msg_resp_perf_describe_levels { 102 __le16 num_returned; 103 __le16 num_remaining; 104 struct { 105 __le32 perf_val; 106 __le32 power; 107 __le16 transition_latency_us; 108 __le16 reserved; 109 } opp[]; 110 }; 111 112 struct scmi_perf_get_fc_info { 113 __le32 domain; 114 __le32 message_id; 115 }; 116 117 struct scmi_msg_resp_perf_desc_fc { 118 __le32 attr; 119 #define SUPPORTS_DOORBELL(x) ((x) & BIT(0)) 120 #define DOORBELL_REG_WIDTH(x) FIELD_GET(GENMASK(2, 1), (x)) 121 __le32 rate_limit; 122 __le32 chan_addr_low; 123 __le32 chan_addr_high; 124 __le32 chan_size; 125 __le32 db_addr_low; 126 __le32 db_addr_high; 127 __le32 db_set_lmask; 128 __le32 db_set_hmask; 129 __le32 db_preserve_lmask; 130 __le32 db_preserve_hmask; 131 }; 132 133 struct scmi_fc_db_info { 134 int width; 135 u64 set; 136 u64 mask; 137 void __iomem *addr; 138 }; 139 140 struct scmi_fc_info { 141 void __iomem *level_set_addr; 142 void __iomem *limit_set_addr; 143 void __iomem *level_get_addr; 144 void __iomem *limit_get_addr; 145 struct scmi_fc_db_info *level_set_db; 146 struct scmi_fc_db_info *limit_set_db; 147 }; 148 149 struct perf_dom_info { 150 bool set_limits; 151 bool set_perf; 152 bool perf_limit_notify; 153 bool perf_level_notify; 154 bool perf_fastchannels; 155 u32 opp_count; 156 u32 sustained_freq_khz; 157 u32 sustained_perf_level; 158 u32 mult_factor; 159 char name[SCMI_MAX_STR_SIZE]; 160 struct scmi_opp opp[MAX_OPPS]; 161 struct scmi_fc_info *fc_info; 162 }; 163 164 struct scmi_perf_info { 165 u32 version; 166 int num_domains; 167 bool power_scale_mw; 168 u64 stats_addr; 169 u32 stats_size; 170 struct perf_dom_info *dom_info; 171 }; 172 173 static enum scmi_performance_protocol_cmd evt_2_cmd[] = { 174 PERF_NOTIFY_LIMITS, 175 PERF_NOTIFY_LEVEL, 176 }; 177 178 static int scmi_perf_attributes_get(const struct scmi_handle *handle, 179 struct scmi_perf_info *pi) 180 { 181 int ret; 182 struct scmi_xfer *t; 183 struct scmi_msg_resp_perf_attributes *attr; 184 185 ret = scmi_xfer_get_init(handle, PROTOCOL_ATTRIBUTES, 186 SCMI_PROTOCOL_PERF, 0, sizeof(*attr), &t); 187 if (ret) 188 return ret; 189 190 attr = t->rx.buf; 191 192 ret = scmi_do_xfer(handle, t); 193 if (!ret) { 194 u16 flags = le16_to_cpu(attr->flags); 195 196 pi->num_domains = le16_to_cpu(attr->num_domains); 197 pi->power_scale_mw = POWER_SCALE_IN_MILLIWATT(flags); 198 pi->stats_addr = le32_to_cpu(attr->stats_addr_low) | 199 (u64)le32_to_cpu(attr->stats_addr_high) << 32; 200 pi->stats_size = le32_to_cpu(attr->stats_size); 201 } 202 203 scmi_xfer_put(handle, t); 204 return ret; 205 } 206 207 static int 208 scmi_perf_domain_attributes_get(const struct scmi_handle *handle, u32 domain, 209 struct perf_dom_info *dom_info) 210 { 211 int ret; 212 struct scmi_xfer *t; 213 struct scmi_msg_resp_perf_domain_attributes *attr; 214 215 ret = scmi_xfer_get_init(handle, PERF_DOMAIN_ATTRIBUTES, 216 SCMI_PROTOCOL_PERF, sizeof(domain), 217 sizeof(*attr), &t); 218 if (ret) 219 return ret; 220 221 put_unaligned_le32(domain, t->tx.buf); 222 attr = t->rx.buf; 223 224 ret = scmi_do_xfer(handle, t); 225 if (!ret) { 226 u32 flags = le32_to_cpu(attr->flags); 227 228 dom_info->set_limits = SUPPORTS_SET_LIMITS(flags); 229 dom_info->set_perf = SUPPORTS_SET_PERF_LVL(flags); 230 dom_info->perf_limit_notify = SUPPORTS_PERF_LIMIT_NOTIFY(flags); 231 dom_info->perf_level_notify = SUPPORTS_PERF_LEVEL_NOTIFY(flags); 232 dom_info->perf_fastchannels = SUPPORTS_PERF_FASTCHANNELS(flags); 233 dom_info->sustained_freq_khz = 234 le32_to_cpu(attr->sustained_freq_khz); 235 dom_info->sustained_perf_level = 236 le32_to_cpu(attr->sustained_perf_level); 237 if (!dom_info->sustained_freq_khz || 238 !dom_info->sustained_perf_level) 239 /* CPUFreq converts to kHz, hence default 1000 */ 240 dom_info->mult_factor = 1000; 241 else 242 dom_info->mult_factor = 243 (dom_info->sustained_freq_khz * 1000) / 244 dom_info->sustained_perf_level; 245 strlcpy(dom_info->name, attr->name, SCMI_MAX_STR_SIZE); 246 } 247 248 scmi_xfer_put(handle, t); 249 return ret; 250 } 251 252 static int opp_cmp_func(const void *opp1, const void *opp2) 253 { 254 const struct scmi_opp *t1 = opp1, *t2 = opp2; 255 256 return t1->perf - t2->perf; 257 } 258 259 static int 260 scmi_perf_describe_levels_get(const struct scmi_handle *handle, u32 domain, 261 struct perf_dom_info *perf_dom) 262 { 263 int ret, cnt; 264 u32 tot_opp_cnt = 0; 265 u16 num_returned, num_remaining; 266 struct scmi_xfer *t; 267 struct scmi_opp *opp; 268 struct scmi_msg_perf_describe_levels *dom_info; 269 struct scmi_msg_resp_perf_describe_levels *level_info; 270 271 ret = scmi_xfer_get_init(handle, PERF_DESCRIBE_LEVELS, 272 SCMI_PROTOCOL_PERF, sizeof(*dom_info), 0, &t); 273 if (ret) 274 return ret; 275 276 dom_info = t->tx.buf; 277 level_info = t->rx.buf; 278 279 do { 280 dom_info->domain = cpu_to_le32(domain); 281 /* Set the number of OPPs to be skipped/already read */ 282 dom_info->level_index = cpu_to_le32(tot_opp_cnt); 283 284 ret = scmi_do_xfer(handle, t); 285 if (ret) 286 break; 287 288 num_returned = le16_to_cpu(level_info->num_returned); 289 num_remaining = le16_to_cpu(level_info->num_remaining); 290 if (tot_opp_cnt + num_returned > MAX_OPPS) { 291 dev_err(handle->dev, "No. of OPPs exceeded MAX_OPPS"); 292 break; 293 } 294 295 opp = &perf_dom->opp[tot_opp_cnt]; 296 for (cnt = 0; cnt < num_returned; cnt++, opp++) { 297 opp->perf = le32_to_cpu(level_info->opp[cnt].perf_val); 298 opp->power = le32_to_cpu(level_info->opp[cnt].power); 299 opp->trans_latency_us = le16_to_cpu 300 (level_info->opp[cnt].transition_latency_us); 301 302 dev_dbg(handle->dev, "Level %d Power %d Latency %dus\n", 303 opp->perf, opp->power, opp->trans_latency_us); 304 } 305 306 tot_opp_cnt += num_returned; 307 /* 308 * check for both returned and remaining to avoid infinite 309 * loop due to buggy firmware 310 */ 311 } while (num_returned && num_remaining); 312 313 perf_dom->opp_count = tot_opp_cnt; 314 scmi_xfer_put(handle, t); 315 316 sort(perf_dom->opp, tot_opp_cnt, sizeof(*opp), opp_cmp_func, NULL); 317 return ret; 318 } 319 320 #define SCMI_PERF_FC_RING_DB(w) \ 321 do { \ 322 u##w val = 0; \ 323 \ 324 if (db->mask) \ 325 val = ioread##w(db->addr) & db->mask; \ 326 iowrite##w((u##w)db->set | val, db->addr); \ 327 } while (0) 328 329 static void scmi_perf_fc_ring_db(struct scmi_fc_db_info *db) 330 { 331 if (!db || !db->addr) 332 return; 333 334 if (db->width == 1) 335 SCMI_PERF_FC_RING_DB(8); 336 else if (db->width == 2) 337 SCMI_PERF_FC_RING_DB(16); 338 else if (db->width == 4) 339 SCMI_PERF_FC_RING_DB(32); 340 else /* db->width == 8 */ 341 #ifdef CONFIG_64BIT 342 SCMI_PERF_FC_RING_DB(64); 343 #else 344 { 345 u64 val = 0; 346 347 if (db->mask) 348 val = ioread64_hi_lo(db->addr) & db->mask; 349 iowrite64_hi_lo(db->set | val, db->addr); 350 } 351 #endif 352 } 353 354 static int scmi_perf_mb_limits_set(const struct scmi_handle *handle, u32 domain, 355 u32 max_perf, u32 min_perf) 356 { 357 int ret; 358 struct scmi_xfer *t; 359 struct scmi_perf_set_limits *limits; 360 361 ret = scmi_xfer_get_init(handle, PERF_LIMITS_SET, SCMI_PROTOCOL_PERF, 362 sizeof(*limits), 0, &t); 363 if (ret) 364 return ret; 365 366 limits = t->tx.buf; 367 limits->domain = cpu_to_le32(domain); 368 limits->max_level = cpu_to_le32(max_perf); 369 limits->min_level = cpu_to_le32(min_perf); 370 371 ret = scmi_do_xfer(handle, t); 372 373 scmi_xfer_put(handle, t); 374 return ret; 375 } 376 377 static int scmi_perf_limits_set(const struct scmi_handle *handle, u32 domain, 378 u32 max_perf, u32 min_perf) 379 { 380 struct scmi_perf_info *pi = handle->perf_priv; 381 struct perf_dom_info *dom = pi->dom_info + domain; 382 383 if (dom->fc_info && dom->fc_info->limit_set_addr) { 384 iowrite32(max_perf, dom->fc_info->limit_set_addr); 385 iowrite32(min_perf, dom->fc_info->limit_set_addr + 4); 386 scmi_perf_fc_ring_db(dom->fc_info->limit_set_db); 387 return 0; 388 } 389 390 return scmi_perf_mb_limits_set(handle, domain, max_perf, min_perf); 391 } 392 393 static int scmi_perf_mb_limits_get(const struct scmi_handle *handle, u32 domain, 394 u32 *max_perf, u32 *min_perf) 395 { 396 int ret; 397 struct scmi_xfer *t; 398 struct scmi_perf_get_limits *limits; 399 400 ret = scmi_xfer_get_init(handle, PERF_LIMITS_GET, SCMI_PROTOCOL_PERF, 401 sizeof(__le32), 0, &t); 402 if (ret) 403 return ret; 404 405 put_unaligned_le32(domain, t->tx.buf); 406 407 ret = scmi_do_xfer(handle, t); 408 if (!ret) { 409 limits = t->rx.buf; 410 411 *max_perf = le32_to_cpu(limits->max_level); 412 *min_perf = le32_to_cpu(limits->min_level); 413 } 414 415 scmi_xfer_put(handle, t); 416 return ret; 417 } 418 419 static int scmi_perf_limits_get(const struct scmi_handle *handle, u32 domain, 420 u32 *max_perf, u32 *min_perf) 421 { 422 struct scmi_perf_info *pi = handle->perf_priv; 423 struct perf_dom_info *dom = pi->dom_info + domain; 424 425 if (dom->fc_info && dom->fc_info->limit_get_addr) { 426 *max_perf = ioread32(dom->fc_info->limit_get_addr); 427 *min_perf = ioread32(dom->fc_info->limit_get_addr + 4); 428 return 0; 429 } 430 431 return scmi_perf_mb_limits_get(handle, domain, max_perf, min_perf); 432 } 433 434 static int scmi_perf_mb_level_set(const struct scmi_handle *handle, u32 domain, 435 u32 level, bool poll) 436 { 437 int ret; 438 struct scmi_xfer *t; 439 struct scmi_perf_set_level *lvl; 440 441 ret = scmi_xfer_get_init(handle, PERF_LEVEL_SET, SCMI_PROTOCOL_PERF, 442 sizeof(*lvl), 0, &t); 443 if (ret) 444 return ret; 445 446 t->hdr.poll_completion = poll; 447 lvl = t->tx.buf; 448 lvl->domain = cpu_to_le32(domain); 449 lvl->level = cpu_to_le32(level); 450 451 ret = scmi_do_xfer(handle, t); 452 453 scmi_xfer_put(handle, t); 454 return ret; 455 } 456 457 static int scmi_perf_level_set(const struct scmi_handle *handle, u32 domain, 458 u32 level, bool poll) 459 { 460 struct scmi_perf_info *pi = handle->perf_priv; 461 struct perf_dom_info *dom = pi->dom_info + domain; 462 463 if (dom->fc_info && dom->fc_info->level_set_addr) { 464 iowrite32(level, dom->fc_info->level_set_addr); 465 scmi_perf_fc_ring_db(dom->fc_info->level_set_db); 466 return 0; 467 } 468 469 return scmi_perf_mb_level_set(handle, domain, level, poll); 470 } 471 472 static int scmi_perf_mb_level_get(const struct scmi_handle *handle, u32 domain, 473 u32 *level, bool poll) 474 { 475 int ret; 476 struct scmi_xfer *t; 477 478 ret = scmi_xfer_get_init(handle, PERF_LEVEL_GET, SCMI_PROTOCOL_PERF, 479 sizeof(u32), sizeof(u32), &t); 480 if (ret) 481 return ret; 482 483 t->hdr.poll_completion = poll; 484 put_unaligned_le32(domain, t->tx.buf); 485 486 ret = scmi_do_xfer(handle, t); 487 if (!ret) 488 *level = get_unaligned_le32(t->rx.buf); 489 490 scmi_xfer_put(handle, t); 491 return ret; 492 } 493 494 static int scmi_perf_level_get(const struct scmi_handle *handle, u32 domain, 495 u32 *level, bool poll) 496 { 497 struct scmi_perf_info *pi = handle->perf_priv; 498 struct perf_dom_info *dom = pi->dom_info + domain; 499 500 if (dom->fc_info && dom->fc_info->level_get_addr) { 501 *level = ioread32(dom->fc_info->level_get_addr); 502 return 0; 503 } 504 505 return scmi_perf_mb_level_get(handle, domain, level, poll); 506 } 507 508 static int scmi_perf_level_limits_notify(const struct scmi_handle *handle, 509 u32 domain, int message_id, 510 bool enable) 511 { 512 int ret; 513 struct scmi_xfer *t; 514 struct scmi_perf_notify_level_or_limits *notify; 515 516 ret = scmi_xfer_get_init(handle, message_id, SCMI_PROTOCOL_PERF, 517 sizeof(*notify), 0, &t); 518 if (ret) 519 return ret; 520 521 notify = t->tx.buf; 522 notify->domain = cpu_to_le32(domain); 523 notify->notify_enable = enable ? cpu_to_le32(BIT(0)) : 0; 524 525 ret = scmi_do_xfer(handle, t); 526 527 scmi_xfer_put(handle, t); 528 return ret; 529 } 530 531 static bool scmi_perf_fc_size_is_valid(u32 msg, u32 size) 532 { 533 if ((msg == PERF_LEVEL_GET || msg == PERF_LEVEL_SET) && size == 4) 534 return true; 535 if ((msg == PERF_LIMITS_GET || msg == PERF_LIMITS_SET) && size == 8) 536 return true; 537 return false; 538 } 539 540 static void 541 scmi_perf_domain_desc_fc(const struct scmi_handle *handle, u32 domain, 542 u32 message_id, void __iomem **p_addr, 543 struct scmi_fc_db_info **p_db) 544 { 545 int ret; 546 u32 flags; 547 u64 phys_addr; 548 u8 size; 549 void __iomem *addr; 550 struct scmi_xfer *t; 551 struct scmi_fc_db_info *db; 552 struct scmi_perf_get_fc_info *info; 553 struct scmi_msg_resp_perf_desc_fc *resp; 554 555 if (!p_addr) 556 return; 557 558 ret = scmi_xfer_get_init(handle, PERF_DESCRIBE_FASTCHANNEL, 559 SCMI_PROTOCOL_PERF, 560 sizeof(*info), sizeof(*resp), &t); 561 if (ret) 562 return; 563 564 info = t->tx.buf; 565 info->domain = cpu_to_le32(domain); 566 info->message_id = cpu_to_le32(message_id); 567 568 ret = scmi_do_xfer(handle, t); 569 if (ret) 570 goto err_xfer; 571 572 resp = t->rx.buf; 573 flags = le32_to_cpu(resp->attr); 574 size = le32_to_cpu(resp->chan_size); 575 if (!scmi_perf_fc_size_is_valid(message_id, size)) 576 goto err_xfer; 577 578 phys_addr = le32_to_cpu(resp->chan_addr_low); 579 phys_addr |= (u64)le32_to_cpu(resp->chan_addr_high) << 32; 580 addr = devm_ioremap(handle->dev, phys_addr, size); 581 if (!addr) 582 goto err_xfer; 583 *p_addr = addr; 584 585 if (p_db && SUPPORTS_DOORBELL(flags)) { 586 db = devm_kzalloc(handle->dev, sizeof(*db), GFP_KERNEL); 587 if (!db) 588 goto err_xfer; 589 590 size = 1 << DOORBELL_REG_WIDTH(flags); 591 phys_addr = le32_to_cpu(resp->db_addr_low); 592 phys_addr |= (u64)le32_to_cpu(resp->db_addr_high) << 32; 593 addr = devm_ioremap(handle->dev, phys_addr, size); 594 if (!addr) 595 goto err_xfer; 596 597 db->addr = addr; 598 db->width = size; 599 db->set = le32_to_cpu(resp->db_set_lmask); 600 db->set |= (u64)le32_to_cpu(resp->db_set_hmask) << 32; 601 db->mask = le32_to_cpu(resp->db_preserve_lmask); 602 db->mask |= (u64)le32_to_cpu(resp->db_preserve_hmask) << 32; 603 *p_db = db; 604 } 605 err_xfer: 606 scmi_xfer_put(handle, t); 607 } 608 609 static void scmi_perf_domain_init_fc(const struct scmi_handle *handle, 610 u32 domain, struct scmi_fc_info **p_fc) 611 { 612 struct scmi_fc_info *fc; 613 614 fc = devm_kzalloc(handle->dev, sizeof(*fc), GFP_KERNEL); 615 if (!fc) 616 return; 617 618 scmi_perf_domain_desc_fc(handle, domain, PERF_LEVEL_SET, 619 &fc->level_set_addr, &fc->level_set_db); 620 scmi_perf_domain_desc_fc(handle, domain, PERF_LEVEL_GET, 621 &fc->level_get_addr, NULL); 622 scmi_perf_domain_desc_fc(handle, domain, PERF_LIMITS_SET, 623 &fc->limit_set_addr, &fc->limit_set_db); 624 scmi_perf_domain_desc_fc(handle, domain, PERF_LIMITS_GET, 625 &fc->limit_get_addr, NULL); 626 *p_fc = fc; 627 } 628 629 /* Device specific ops */ 630 static int scmi_dev_domain_id(struct device *dev) 631 { 632 struct of_phandle_args clkspec; 633 634 if (of_parse_phandle_with_args(dev->of_node, "clocks", "#clock-cells", 635 0, &clkspec)) 636 return -EINVAL; 637 638 return clkspec.args[0]; 639 } 640 641 static int scmi_dvfs_device_opps_add(const struct scmi_handle *handle, 642 struct device *dev) 643 { 644 int idx, ret, domain; 645 unsigned long freq; 646 struct scmi_opp *opp; 647 struct perf_dom_info *dom; 648 struct scmi_perf_info *pi = handle->perf_priv; 649 650 domain = scmi_dev_domain_id(dev); 651 if (domain < 0) 652 return domain; 653 654 dom = pi->dom_info + domain; 655 656 for (opp = dom->opp, idx = 0; idx < dom->opp_count; idx++, opp++) { 657 freq = opp->perf * dom->mult_factor; 658 659 ret = dev_pm_opp_add(dev, freq, 0); 660 if (ret) { 661 dev_warn(dev, "failed to add opp %luHz\n", freq); 662 663 while (idx-- > 0) { 664 freq = (--opp)->perf * dom->mult_factor; 665 dev_pm_opp_remove(dev, freq); 666 } 667 return ret; 668 } 669 } 670 return 0; 671 } 672 673 static int scmi_dvfs_transition_latency_get(const struct scmi_handle *handle, 674 struct device *dev) 675 { 676 struct perf_dom_info *dom; 677 struct scmi_perf_info *pi = handle->perf_priv; 678 int domain = scmi_dev_domain_id(dev); 679 680 if (domain < 0) 681 return domain; 682 683 dom = pi->dom_info + domain; 684 /* uS to nS */ 685 return dom->opp[dom->opp_count - 1].trans_latency_us * 1000; 686 } 687 688 static int scmi_dvfs_freq_set(const struct scmi_handle *handle, u32 domain, 689 unsigned long freq, bool poll) 690 { 691 struct scmi_perf_info *pi = handle->perf_priv; 692 struct perf_dom_info *dom = pi->dom_info + domain; 693 694 return scmi_perf_level_set(handle, domain, freq / dom->mult_factor, 695 poll); 696 } 697 698 static int scmi_dvfs_freq_get(const struct scmi_handle *handle, u32 domain, 699 unsigned long *freq, bool poll) 700 { 701 int ret; 702 u32 level; 703 struct scmi_perf_info *pi = handle->perf_priv; 704 struct perf_dom_info *dom = pi->dom_info + domain; 705 706 ret = scmi_perf_level_get(handle, domain, &level, poll); 707 if (!ret) 708 *freq = level * dom->mult_factor; 709 710 return ret; 711 } 712 713 static int scmi_dvfs_est_power_get(const struct scmi_handle *handle, u32 domain, 714 unsigned long *freq, unsigned long *power) 715 { 716 struct scmi_perf_info *pi = handle->perf_priv; 717 struct perf_dom_info *dom; 718 unsigned long opp_freq; 719 int idx, ret = -EINVAL; 720 struct scmi_opp *opp; 721 722 dom = pi->dom_info + domain; 723 if (!dom) 724 return -EIO; 725 726 for (opp = dom->opp, idx = 0; idx < dom->opp_count; idx++, opp++) { 727 opp_freq = opp->perf * dom->mult_factor; 728 if (opp_freq < *freq) 729 continue; 730 731 *freq = opp_freq; 732 *power = opp->power; 733 ret = 0; 734 break; 735 } 736 737 return ret; 738 } 739 740 static bool scmi_fast_switch_possible(const struct scmi_handle *handle, 741 struct device *dev) 742 { 743 struct perf_dom_info *dom; 744 struct scmi_perf_info *pi = handle->perf_priv; 745 746 dom = pi->dom_info + scmi_dev_domain_id(dev); 747 748 return dom->fc_info && dom->fc_info->level_set_addr; 749 } 750 751 static struct scmi_perf_ops perf_ops = { 752 .limits_set = scmi_perf_limits_set, 753 .limits_get = scmi_perf_limits_get, 754 .level_set = scmi_perf_level_set, 755 .level_get = scmi_perf_level_get, 756 .device_domain_id = scmi_dev_domain_id, 757 .transition_latency_get = scmi_dvfs_transition_latency_get, 758 .device_opps_add = scmi_dvfs_device_opps_add, 759 .freq_set = scmi_dvfs_freq_set, 760 .freq_get = scmi_dvfs_freq_get, 761 .est_power_get = scmi_dvfs_est_power_get, 762 .fast_switch_possible = scmi_fast_switch_possible, 763 }; 764 765 static int scmi_perf_set_notify_enabled(const struct scmi_handle *handle, 766 u8 evt_id, u32 src_id, bool enable) 767 { 768 int ret, cmd_id; 769 770 if (evt_id >= ARRAY_SIZE(evt_2_cmd)) 771 return -EINVAL; 772 773 cmd_id = evt_2_cmd[evt_id]; 774 ret = scmi_perf_level_limits_notify(handle, src_id, cmd_id, enable); 775 if (ret) 776 pr_debug("FAIL_ENABLED - evt[%X] dom[%d] - ret:%d\n", 777 evt_id, src_id, ret); 778 779 return ret; 780 } 781 782 static void *scmi_perf_fill_custom_report(const struct scmi_handle *handle, 783 u8 evt_id, ktime_t timestamp, 784 const void *payld, size_t payld_sz, 785 void *report, u32 *src_id) 786 { 787 void *rep = NULL; 788 789 switch (evt_id) { 790 case SCMI_EVENT_PERFORMANCE_LIMITS_CHANGED: 791 { 792 const struct scmi_perf_limits_notify_payld *p = payld; 793 struct scmi_perf_limits_report *r = report; 794 795 if (sizeof(*p) != payld_sz) 796 break; 797 798 r->timestamp = timestamp; 799 r->agent_id = le32_to_cpu(p->agent_id); 800 r->domain_id = le32_to_cpu(p->domain_id); 801 r->range_max = le32_to_cpu(p->range_max); 802 r->range_min = le32_to_cpu(p->range_min); 803 *src_id = r->domain_id; 804 rep = r; 805 break; 806 } 807 case SCMI_EVENT_PERFORMANCE_LEVEL_CHANGED: 808 { 809 const struct scmi_perf_level_notify_payld *p = payld; 810 struct scmi_perf_level_report *r = report; 811 812 if (sizeof(*p) != payld_sz) 813 break; 814 815 r->timestamp = timestamp; 816 r->agent_id = le32_to_cpu(p->agent_id); 817 r->domain_id = le32_to_cpu(p->domain_id); 818 r->performance_level = le32_to_cpu(p->performance_level); 819 *src_id = r->domain_id; 820 rep = r; 821 break; 822 } 823 default: 824 break; 825 } 826 827 return rep; 828 } 829 830 static const struct scmi_event perf_events[] = { 831 { 832 .id = SCMI_EVENT_PERFORMANCE_LIMITS_CHANGED, 833 .max_payld_sz = sizeof(struct scmi_perf_limits_notify_payld), 834 .max_report_sz = sizeof(struct scmi_perf_limits_report), 835 }, 836 { 837 .id = SCMI_EVENT_PERFORMANCE_LEVEL_CHANGED, 838 .max_payld_sz = sizeof(struct scmi_perf_level_notify_payld), 839 .max_report_sz = sizeof(struct scmi_perf_level_report), 840 }, 841 }; 842 843 static const struct scmi_event_ops perf_event_ops = { 844 .set_notify_enabled = scmi_perf_set_notify_enabled, 845 .fill_custom_report = scmi_perf_fill_custom_report, 846 }; 847 848 static int scmi_perf_protocol_init(struct scmi_handle *handle) 849 { 850 int domain; 851 u32 version; 852 struct scmi_perf_info *pinfo; 853 854 scmi_version_get(handle, SCMI_PROTOCOL_PERF, &version); 855 856 dev_dbg(handle->dev, "Performance Version %d.%d\n", 857 PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version)); 858 859 pinfo = devm_kzalloc(handle->dev, sizeof(*pinfo), GFP_KERNEL); 860 if (!pinfo) 861 return -ENOMEM; 862 863 scmi_perf_attributes_get(handle, pinfo); 864 865 pinfo->dom_info = devm_kcalloc(handle->dev, pinfo->num_domains, 866 sizeof(*pinfo->dom_info), GFP_KERNEL); 867 if (!pinfo->dom_info) 868 return -ENOMEM; 869 870 for (domain = 0; domain < pinfo->num_domains; domain++) { 871 struct perf_dom_info *dom = pinfo->dom_info + domain; 872 873 scmi_perf_domain_attributes_get(handle, domain, dom); 874 scmi_perf_describe_levels_get(handle, domain, dom); 875 876 if (dom->perf_fastchannels) 877 scmi_perf_domain_init_fc(handle, domain, &dom->fc_info); 878 } 879 880 scmi_register_protocol_events(handle, 881 SCMI_PROTOCOL_PERF, SCMI_PROTO_QUEUE_SZ, 882 &perf_event_ops, perf_events, 883 ARRAY_SIZE(perf_events), 884 pinfo->num_domains); 885 886 pinfo->version = version; 887 handle->perf_ops = &perf_ops; 888 handle->perf_priv = pinfo; 889 890 return 0; 891 } 892 893 static int __init scmi_perf_init(void) 894 { 895 return scmi_protocol_register(SCMI_PROTOCOL_PERF, 896 &scmi_perf_protocol_init); 897 } 898 subsys_initcall(scmi_perf_init); 899