1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _FIREWIRE_CORE_H 3 #define _FIREWIRE_CORE_H 4 5 #include <linux/compiler.h> 6 #include <linux/device.h> 7 #include <linux/dma-mapping.h> 8 #include <linux/fs.h> 9 #include <linux/list.h> 10 #include <linux/idr.h> 11 #include <linux/mm_types.h> 12 #include <linux/rwsem.h> 13 #include <linux/slab.h> 14 #include <linux/types.h> 15 16 #include <linux/refcount.h> 17 18 struct device; 19 struct fw_card; 20 struct fw_device; 21 struct fw_iso_buffer; 22 struct fw_iso_context; 23 struct fw_iso_packet; 24 struct fw_node; 25 struct fw_packet; 26 27 28 /* -card */ 29 30 extern __printf(2, 3) 31 void fw_err(const struct fw_card *card, const char *fmt, ...); 32 extern __printf(2, 3) 33 void fw_notice(const struct fw_card *card, const char *fmt, ...); 34 35 /* bitfields within the PHY registers */ 36 #define PHY_LINK_ACTIVE 0x80 37 #define PHY_CONTENDER 0x40 38 #define PHY_BUS_RESET 0x40 39 #define PHY_EXTENDED_REGISTERS 0xe0 40 #define PHY_BUS_SHORT_RESET 0x40 41 #define PHY_INT_STATUS_BITS 0x3c 42 #define PHY_ENABLE_ACCEL 0x02 43 #define PHY_ENABLE_MULTI 0x01 44 #define PHY_PAGE_SELECT 0xe0 45 46 #define BANDWIDTH_AVAILABLE_INITIAL 4915 47 #define BROADCAST_CHANNEL_INITIAL (1 << 31 | 31) 48 #define BROADCAST_CHANNEL_VALID (1 << 30) 49 50 #define CSR_STATE_BIT_CMSTR (1 << 8) 51 #define CSR_STATE_BIT_ABDICATE (1 << 10) 52 53 struct fw_card_driver { 54 /* 55 * Enable the given card with the given initial config rom. 56 * This function is expected to activate the card, and either 57 * enable the PHY or set the link_on bit and initiate a bus 58 * reset. 59 */ 60 int (*enable)(struct fw_card *card, 61 const __be32 *config_rom, size_t length); 62 63 int (*read_phy_reg)(struct fw_card *card, int address); 64 int (*update_phy_reg)(struct fw_card *card, int address, 65 int clear_bits, int set_bits); 66 67 /* 68 * Update the config rom for an enabled card. This function 69 * should change the config rom that is presented on the bus 70 * and initiate a bus reset. 71 */ 72 int (*set_config_rom)(struct fw_card *card, 73 const __be32 *config_rom, size_t length); 74 75 void (*send_request)(struct fw_card *card, struct fw_packet *packet); 76 void (*send_response)(struct fw_card *card, struct fw_packet *packet); 77 /* Calling cancel is valid once a packet has been submitted. */ 78 int (*cancel_packet)(struct fw_card *card, struct fw_packet *packet); 79 80 /* 81 * Allow the specified node ID to do direct DMA out and in of 82 * host memory. The card will disable this for all node when 83 * a bus reset happens, so driver need to reenable this after 84 * bus reset. Returns 0 on success, -ENODEV if the card 85 * doesn't support this, -ESTALE if the generation doesn't 86 * match. 87 */ 88 int (*enable_phys_dma)(struct fw_card *card, 89 int node_id, int generation); 90 91 u32 (*read_csr)(struct fw_card *card, int csr_offset); 92 void (*write_csr)(struct fw_card *card, int csr_offset, u32 value); 93 94 struct fw_iso_context * 95 (*allocate_iso_context)(struct fw_card *card, 96 int type, int channel, size_t header_size); 97 void (*free_iso_context)(struct fw_iso_context *ctx); 98 99 int (*start_iso)(struct fw_iso_context *ctx, 100 s32 cycle, u32 sync, u32 tags); 101 102 int (*set_iso_channels)(struct fw_iso_context *ctx, u64 *channels); 103 104 int (*queue_iso)(struct fw_iso_context *ctx, 105 struct fw_iso_packet *packet, 106 struct fw_iso_buffer *buffer, 107 unsigned long payload); 108 109 void (*flush_queue_iso)(struct fw_iso_context *ctx); 110 111 int (*flush_iso_completions)(struct fw_iso_context *ctx); 112 113 int (*stop_iso)(struct fw_iso_context *ctx); 114 }; 115 116 void fw_card_initialize(struct fw_card *card, 117 const struct fw_card_driver *driver, struct device *device); 118 int fw_card_add(struct fw_card *card, 119 u32 max_receive, u32 link_speed, u64 guid); 120 void fw_core_remove_card(struct fw_card *card); 121 int fw_compute_block_crc(__be32 *block); 122 void fw_schedule_bm_work(struct fw_card *card, unsigned long delay); 123 124 /* -cdev */ 125 126 extern const struct file_operations fw_device_ops; 127 128 void fw_device_cdev_update(struct fw_device *device); 129 void fw_device_cdev_remove(struct fw_device *device); 130 void fw_cdev_handle_phy_packet(struct fw_card *card, struct fw_packet *p); 131 132 133 /* -device */ 134 135 extern struct rw_semaphore fw_device_rwsem; 136 extern struct idr fw_device_idr; 137 extern int fw_cdev_major; 138 139 static inline struct fw_device *fw_device_get(struct fw_device *device) 140 { 141 get_device(&device->device); 142 143 return device; 144 } 145 146 static inline void fw_device_put(struct fw_device *device) 147 { 148 put_device(&device->device); 149 } 150 151 struct fw_device *fw_device_get_by_devt(dev_t devt); 152 int fw_device_set_broadcast_channel(struct device *dev, void *gen); 153 void fw_node_event(struct fw_card *card, struct fw_node *node, int event); 154 155 156 /* -iso */ 157 158 int fw_iso_buffer_alloc(struct fw_iso_buffer *buffer, int page_count); 159 int fw_iso_buffer_map_dma(struct fw_iso_buffer *buffer, struct fw_card *card, 160 enum dma_data_direction direction); 161 int fw_iso_buffer_map_vma(struct fw_iso_buffer *buffer, 162 struct vm_area_struct *vma); 163 164 165 /* -topology */ 166 167 enum { 168 FW_NODE_CREATED, 169 FW_NODE_UPDATED, 170 FW_NODE_DESTROYED, 171 FW_NODE_LINK_ON, 172 FW_NODE_LINK_OFF, 173 FW_NODE_INITIATED_RESET, 174 }; 175 176 struct fw_node { 177 u16 node_id; 178 u8 color; 179 u8 port_count; 180 u8 link_on:1; 181 u8 initiated_reset:1; 182 u8 b_path:1; 183 u8 phy_speed:2; /* As in the self ID packet. */ 184 u8 max_speed:2; /* Minimum of all phy-speeds on the path from the 185 * local node to this node. */ 186 u8 max_depth:4; /* Maximum depth to any leaf node */ 187 u8 max_hops:4; /* Max hops in this sub tree */ 188 refcount_t ref_count; 189 190 /* For serializing node topology into a list. */ 191 struct list_head link; 192 193 /* Upper layer specific data. */ 194 void *data; 195 196 struct fw_node *ports[0]; 197 }; 198 199 static inline struct fw_node *fw_node_get(struct fw_node *node) 200 { 201 refcount_inc(&node->ref_count); 202 203 return node; 204 } 205 206 static inline void fw_node_put(struct fw_node *node) 207 { 208 if (refcount_dec_and_test(&node->ref_count)) 209 kfree(node); 210 } 211 212 void fw_core_handle_bus_reset(struct fw_card *card, int node_id, 213 int generation, int self_id_count, u32 *self_ids, bool bm_abdicate); 214 void fw_destroy_nodes(struct fw_card *card); 215 216 /* 217 * Check whether new_generation is the immediate successor of old_generation. 218 * Take counter roll-over at 255 (as per OHCI) into account. 219 */ 220 static inline bool is_next_generation(int new_generation, int old_generation) 221 { 222 return (new_generation & 0xff) == ((old_generation + 1) & 0xff); 223 } 224 225 226 /* -transaction */ 227 228 #define TCODE_LINK_INTERNAL 0xe 229 230 #define TCODE_IS_READ_REQUEST(tcode) (((tcode) & ~1) == 4) 231 #define TCODE_IS_BLOCK_PACKET(tcode) (((tcode) & 1) != 0) 232 #define TCODE_IS_LINK_INTERNAL(tcode) ((tcode) == TCODE_LINK_INTERNAL) 233 #define TCODE_IS_REQUEST(tcode) (((tcode) & 2) == 0) 234 #define TCODE_IS_RESPONSE(tcode) (((tcode) & 2) != 0) 235 #define TCODE_HAS_REQUEST_DATA(tcode) (((tcode) & 12) != 4) 236 #define TCODE_HAS_RESPONSE_DATA(tcode) (((tcode) & 12) != 0) 237 238 #define LOCAL_BUS 0xffc0 239 240 /* OHCI-1394's default upper bound for physical DMA: 4 GB */ 241 #define FW_MAX_PHYSICAL_RANGE (1ULL << 32) 242 243 void fw_core_handle_request(struct fw_card *card, struct fw_packet *request); 244 void fw_core_handle_response(struct fw_card *card, struct fw_packet *packet); 245 int fw_get_response_length(struct fw_request *request); 246 void fw_fill_response(struct fw_packet *response, u32 *request_header, 247 int rcode, void *payload, size_t length); 248 249 #define FW_PHY_CONFIG_NO_NODE_ID -1 250 #define FW_PHY_CONFIG_CURRENT_GAP_COUNT -1 251 void fw_send_phy_config(struct fw_card *card, 252 int node_id, int generation, int gap_count); 253 254 static inline bool is_ping_packet(u32 *data) 255 { 256 return (data[0] & 0xc0ffffff) == 0 && ~data[0] == data[1]; 257 } 258 259 #endif /* _FIREWIRE_CORE_H */ 260