186a18ee2STero Kristo // SPDX-License-Identifier: GPL-2.0
286a18ee2STero Kristo /*
37d4c1ea2SAlexander A. Klimov * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
486a18ee2STero Kristo *
586a18ee2STero Kristo * Texas Instruments DDR3 ECC error correction and detection driver
686a18ee2STero Kristo *
786a18ee2STero Kristo * This program is free software; you can redistribute it and/or modify it
886a18ee2STero Kristo * under the terms and conditions of the GNU General Public License,
986a18ee2STero Kristo * version 2, as published by the Free Software Foundation.
1086a18ee2STero Kristo *
1186a18ee2STero Kristo * This program is distributed in the hope it will be useful, but WITHOUT
1286a18ee2STero Kristo * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1386a18ee2STero Kristo * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1486a18ee2STero Kristo * more details.
1586a18ee2STero Kristo *
1686a18ee2STero Kristo * You should have received a copy of the GNU General Public License along with
1786a18ee2STero Kristo * this program. If not, see <http://www.gnu.org/licenses/>.
1886a18ee2STero Kristo */
1986a18ee2STero Kristo
2086a18ee2STero Kristo #include <linux/init.h>
2186a18ee2STero Kristo #include <linux/edac.h>
2286a18ee2STero Kristo #include <linux/io.h>
2386a18ee2STero Kristo #include <linux/interrupt.h>
2486a18ee2STero Kristo #include <linux/of_address.h>
2586a18ee2STero Kristo #include <linux/of_device.h>
2686a18ee2STero Kristo #include <linux/module.h>
2786a18ee2STero Kristo
2886a18ee2STero Kristo #include "edac_module.h"
2986a18ee2STero Kristo
3086a18ee2STero Kristo /* EMIF controller registers */
3186a18ee2STero Kristo #define EMIF_SDRAM_CONFIG 0x008
3286a18ee2STero Kristo #define EMIF_IRQ_STATUS 0x0ac
3386a18ee2STero Kristo #define EMIF_IRQ_ENABLE_SET 0x0b4
3486a18ee2STero Kristo #define EMIF_ECC_CTRL 0x110
3586a18ee2STero Kristo #define EMIF_1B_ECC_ERR_CNT 0x130
3686a18ee2STero Kristo #define EMIF_1B_ECC_ERR_THRSH 0x134
3786a18ee2STero Kristo #define EMIF_1B_ECC_ERR_ADDR_LOG 0x13c
3886a18ee2STero Kristo #define EMIF_2B_ECC_ERR_ADDR_LOG 0x140
3986a18ee2STero Kristo
4086a18ee2STero Kristo /* Bit definitions for EMIF_SDRAM_CONFIG */
4186a18ee2STero Kristo #define SDRAM_TYPE_SHIFT 29
4286a18ee2STero Kristo #define SDRAM_TYPE_MASK GENMASK(31, 29)
4386a18ee2STero Kristo #define SDRAM_TYPE_DDR3 (3 << SDRAM_TYPE_SHIFT)
4486a18ee2STero Kristo #define SDRAM_TYPE_DDR2 (2 << SDRAM_TYPE_SHIFT)
4586a18ee2STero Kristo #define SDRAM_NARROW_MODE_MASK GENMASK(15, 14)
4686a18ee2STero Kristo #define SDRAM_K2_NARROW_MODE_SHIFT 12
4786a18ee2STero Kristo #define SDRAM_K2_NARROW_MODE_MASK GENMASK(13, 12)
4886a18ee2STero Kristo #define SDRAM_ROWSIZE_SHIFT 7
4986a18ee2STero Kristo #define SDRAM_ROWSIZE_MASK GENMASK(9, 7)
5086a18ee2STero Kristo #define SDRAM_IBANK_SHIFT 4
5186a18ee2STero Kristo #define SDRAM_IBANK_MASK GENMASK(6, 4)
5286a18ee2STero Kristo #define SDRAM_K2_IBANK_SHIFT 5
5386a18ee2STero Kristo #define SDRAM_K2_IBANK_MASK GENMASK(6, 5)
5486a18ee2STero Kristo #define SDRAM_K2_EBANK_SHIFT 3
5586a18ee2STero Kristo #define SDRAM_K2_EBANK_MASK BIT(SDRAM_K2_EBANK_SHIFT)
5686a18ee2STero Kristo #define SDRAM_PAGESIZE_SHIFT 0
5786a18ee2STero Kristo #define SDRAM_PAGESIZE_MASK GENMASK(2, 0)
5886a18ee2STero Kristo #define SDRAM_K2_PAGESIZE_SHIFT 0
5986a18ee2STero Kristo #define SDRAM_K2_PAGESIZE_MASK GENMASK(1, 0)
6086a18ee2STero Kristo
6186a18ee2STero Kristo #define EMIF_1B_ECC_ERR_THRSH_SHIFT 24
6286a18ee2STero Kristo
6386a18ee2STero Kristo /* IRQ bit definitions */
6486a18ee2STero Kristo #define EMIF_1B_ECC_ERR BIT(5)
6586a18ee2STero Kristo #define EMIF_2B_ECC_ERR BIT(4)
6686a18ee2STero Kristo #define EMIF_WR_ECC_ERR BIT(3)
6786a18ee2STero Kristo #define EMIF_SYS_ERR BIT(0)
6886a18ee2STero Kristo /* Bit 31 enables ECC and 28 enables RMW */
6986a18ee2STero Kristo #define ECC_ENABLED (BIT(31) | BIT(28))
7086a18ee2STero Kristo
7186a18ee2STero Kristo #define EDAC_MOD_NAME "ti-emif-edac"
7286a18ee2STero Kristo
7386a18ee2STero Kristo enum {
7486a18ee2STero Kristo EMIF_TYPE_DRA7,
7586a18ee2STero Kristo EMIF_TYPE_K2
7686a18ee2STero Kristo };
7786a18ee2STero Kristo
7886a18ee2STero Kristo struct ti_edac {
7986a18ee2STero Kristo void __iomem *reg;
8086a18ee2STero Kristo };
8186a18ee2STero Kristo
ti_edac_readl(struct ti_edac * edac,u16 offset)8286a18ee2STero Kristo static u32 ti_edac_readl(struct ti_edac *edac, u16 offset)
8386a18ee2STero Kristo {
8486a18ee2STero Kristo return readl_relaxed(edac->reg + offset);
8586a18ee2STero Kristo }
8686a18ee2STero Kristo
ti_edac_writel(struct ti_edac * edac,u32 val,u16 offset)8786a18ee2STero Kristo static void ti_edac_writel(struct ti_edac *edac, u32 val, u16 offset)
8886a18ee2STero Kristo {
8986a18ee2STero Kristo writel_relaxed(val, edac->reg + offset);
9086a18ee2STero Kristo }
9186a18ee2STero Kristo
ti_edac_isr(int irq,void * data)9286a18ee2STero Kristo static irqreturn_t ti_edac_isr(int irq, void *data)
9386a18ee2STero Kristo {
9486a18ee2STero Kristo struct mem_ctl_info *mci = data;
9586a18ee2STero Kristo struct ti_edac *edac = mci->pvt_info;
9686a18ee2STero Kristo u32 irq_status;
9786a18ee2STero Kristo u32 err_addr;
9886a18ee2STero Kristo int err_count;
9986a18ee2STero Kristo
10086a18ee2STero Kristo irq_status = ti_edac_readl(edac, EMIF_IRQ_STATUS);
10186a18ee2STero Kristo
10286a18ee2STero Kristo if (irq_status & EMIF_1B_ECC_ERR) {
10386a18ee2STero Kristo err_addr = ti_edac_readl(edac, EMIF_1B_ECC_ERR_ADDR_LOG);
10486a18ee2STero Kristo err_count = ti_edac_readl(edac, EMIF_1B_ECC_ERR_CNT);
10586a18ee2STero Kristo ti_edac_writel(edac, err_count, EMIF_1B_ECC_ERR_CNT);
10686a18ee2STero Kristo edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, err_count,
10786a18ee2STero Kristo err_addr >> PAGE_SHIFT,
10886a18ee2STero Kristo err_addr & ~PAGE_MASK, -1, 0, 0, 0,
10986a18ee2STero Kristo mci->ctl_name, "1B");
11086a18ee2STero Kristo }
11186a18ee2STero Kristo
11286a18ee2STero Kristo if (irq_status & EMIF_2B_ECC_ERR) {
11386a18ee2STero Kristo err_addr = ti_edac_readl(edac, EMIF_2B_ECC_ERR_ADDR_LOG);
11486a18ee2STero Kristo edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
11586a18ee2STero Kristo err_addr >> PAGE_SHIFT,
11686a18ee2STero Kristo err_addr & ~PAGE_MASK, -1, 0, 0, 0,
11786a18ee2STero Kristo mci->ctl_name, "2B");
11886a18ee2STero Kristo }
11986a18ee2STero Kristo
12086a18ee2STero Kristo if (irq_status & EMIF_WR_ECC_ERR)
12186a18ee2STero Kristo edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
12286a18ee2STero Kristo 0, 0, -1, 0, 0, 0,
12386a18ee2STero Kristo mci->ctl_name, "WR");
12486a18ee2STero Kristo
12586a18ee2STero Kristo ti_edac_writel(edac, irq_status, EMIF_IRQ_STATUS);
12686a18ee2STero Kristo
12786a18ee2STero Kristo return IRQ_HANDLED;
12886a18ee2STero Kristo }
12986a18ee2STero Kristo
ti_edac_setup_dimm(struct mem_ctl_info * mci,u32 type)13086a18ee2STero Kristo static void ti_edac_setup_dimm(struct mem_ctl_info *mci, u32 type)
13186a18ee2STero Kristo {
13286a18ee2STero Kristo struct dimm_info *dimm;
13386a18ee2STero Kristo struct ti_edac *edac = mci->pvt_info;
13486a18ee2STero Kristo int bits;
13586a18ee2STero Kristo u32 val;
13686a18ee2STero Kristo u32 memsize;
13786a18ee2STero Kristo
138bc9ad9e4SRobert Richter dimm = edac_get_dimm(mci, 0, 0, 0);
13986a18ee2STero Kristo
14086a18ee2STero Kristo val = ti_edac_readl(edac, EMIF_SDRAM_CONFIG);
14186a18ee2STero Kristo
14286a18ee2STero Kristo if (type == EMIF_TYPE_DRA7) {
14386a18ee2STero Kristo bits = ((val & SDRAM_PAGESIZE_MASK) >> SDRAM_PAGESIZE_SHIFT) + 8;
14486a18ee2STero Kristo bits += ((val & SDRAM_ROWSIZE_MASK) >> SDRAM_ROWSIZE_SHIFT) + 9;
14586a18ee2STero Kristo bits += (val & SDRAM_IBANK_MASK) >> SDRAM_IBANK_SHIFT;
14686a18ee2STero Kristo
14786a18ee2STero Kristo if (val & SDRAM_NARROW_MODE_MASK) {
14886a18ee2STero Kristo bits++;
14986a18ee2STero Kristo dimm->dtype = DEV_X16;
15086a18ee2STero Kristo } else {
15186a18ee2STero Kristo bits += 2;
15286a18ee2STero Kristo dimm->dtype = DEV_X32;
15386a18ee2STero Kristo }
15486a18ee2STero Kristo } else {
15586a18ee2STero Kristo bits = 16;
15686a18ee2STero Kristo bits += ((val & SDRAM_K2_PAGESIZE_MASK) >>
15786a18ee2STero Kristo SDRAM_K2_PAGESIZE_SHIFT) + 8;
15886a18ee2STero Kristo bits += (val & SDRAM_K2_IBANK_MASK) >> SDRAM_K2_IBANK_SHIFT;
15986a18ee2STero Kristo bits += (val & SDRAM_K2_EBANK_MASK) >> SDRAM_K2_EBANK_SHIFT;
16086a18ee2STero Kristo
16186a18ee2STero Kristo val = (val & SDRAM_K2_NARROW_MODE_MASK) >>
16286a18ee2STero Kristo SDRAM_K2_NARROW_MODE_SHIFT;
16386a18ee2STero Kristo switch (val) {
16486a18ee2STero Kristo case 0:
16586a18ee2STero Kristo bits += 3;
16686a18ee2STero Kristo dimm->dtype = DEV_X64;
16786a18ee2STero Kristo break;
16886a18ee2STero Kristo case 1:
16986a18ee2STero Kristo bits += 2;
17086a18ee2STero Kristo dimm->dtype = DEV_X32;
17186a18ee2STero Kristo break;
17286a18ee2STero Kristo case 2:
17386a18ee2STero Kristo bits++;
17486a18ee2STero Kristo dimm->dtype = DEV_X16;
17586a18ee2STero Kristo break;
17686a18ee2STero Kristo }
17786a18ee2STero Kristo }
17886a18ee2STero Kristo
17986a18ee2STero Kristo memsize = 1 << bits;
18086a18ee2STero Kristo
18186a18ee2STero Kristo dimm->nr_pages = memsize >> PAGE_SHIFT;
18286a18ee2STero Kristo dimm->grain = 4;
18386a18ee2STero Kristo if ((val & SDRAM_TYPE_MASK) == SDRAM_TYPE_DDR2)
18486a18ee2STero Kristo dimm->mtype = MEM_DDR2;
18586a18ee2STero Kristo else
18686a18ee2STero Kristo dimm->mtype = MEM_DDR3;
18786a18ee2STero Kristo
18886a18ee2STero Kristo val = ti_edac_readl(edac, EMIF_ECC_CTRL);
18986a18ee2STero Kristo if (val & ECC_ENABLED)
19086a18ee2STero Kristo dimm->edac_mode = EDAC_SECDED;
19186a18ee2STero Kristo else
19286a18ee2STero Kristo dimm->edac_mode = EDAC_NONE;
19386a18ee2STero Kristo }
19486a18ee2STero Kristo
19586a18ee2STero Kristo static const struct of_device_id ti_edac_of_match[] = {
19686a18ee2STero Kristo { .compatible = "ti,emif-keystone", .data = (void *)EMIF_TYPE_K2 },
19786a18ee2STero Kristo { .compatible = "ti,emif-dra7xx", .data = (void *)EMIF_TYPE_DRA7 },
19886a18ee2STero Kristo {},
19986a18ee2STero Kristo };
2000a37f32bSBixuan Cui MODULE_DEVICE_TABLE(of, ti_edac_of_match);
20186a18ee2STero Kristo
_emif_get_id(struct device_node * node)20286a18ee2STero Kristo static int _emif_get_id(struct device_node *node)
20386a18ee2STero Kristo {
20486a18ee2STero Kristo struct device_node *np;
20586a18ee2STero Kristo const __be32 *addrp;
20686a18ee2STero Kristo u32 addr, my_addr;
20786a18ee2STero Kristo int my_id = 0;
20886a18ee2STero Kristo
20986a18ee2STero Kristo addrp = of_get_address(node, 0, NULL, NULL);
21086a18ee2STero Kristo my_addr = (u32)of_translate_address(node, addrp);
21186a18ee2STero Kristo
21286a18ee2STero Kristo for_each_matching_node(np, ti_edac_of_match) {
21386a18ee2STero Kristo if (np == node)
21486a18ee2STero Kristo continue;
21586a18ee2STero Kristo
21686a18ee2STero Kristo addrp = of_get_address(np, 0, NULL, NULL);
21786a18ee2STero Kristo addr = (u32)of_translate_address(np, addrp);
21886a18ee2STero Kristo
21986a18ee2STero Kristo edac_printk(KERN_INFO, EDAC_MOD_NAME,
22086a18ee2STero Kristo "addr=%x, my_addr=%x\n",
22186a18ee2STero Kristo addr, my_addr);
22286a18ee2STero Kristo
22386a18ee2STero Kristo if (addr < my_addr)
22486a18ee2STero Kristo my_id++;
22586a18ee2STero Kristo }
22686a18ee2STero Kristo
22786a18ee2STero Kristo return my_id;
22886a18ee2STero Kristo }
22986a18ee2STero Kristo
ti_edac_probe(struct platform_device * pdev)23086a18ee2STero Kristo static int ti_edac_probe(struct platform_device *pdev)
23186a18ee2STero Kristo {
23286a18ee2STero Kristo int error_irq = 0, ret = -ENODEV;
23386a18ee2STero Kristo struct device *dev = &pdev->dev;
23486a18ee2STero Kristo struct resource *res;
23586a18ee2STero Kristo void __iomem *reg;
23686a18ee2STero Kristo struct mem_ctl_info *mci;
23786a18ee2STero Kristo struct edac_mc_layer layers[1];
23886a18ee2STero Kristo const struct of_device_id *id;
23986a18ee2STero Kristo struct ti_edac *edac;
24086a18ee2STero Kristo int emif_id;
24186a18ee2STero Kristo
24286a18ee2STero Kristo id = of_match_device(ti_edac_of_match, &pdev->dev);
24386a18ee2STero Kristo if (!id)
24486a18ee2STero Kristo return -ENODEV;
24586a18ee2STero Kristo
24686a18ee2STero Kristo res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
24786a18ee2STero Kristo reg = devm_ioremap_resource(dev, res);
248*0b6d4ab2STang Bin if (IS_ERR(reg))
24986a18ee2STero Kristo return PTR_ERR(reg);
25086a18ee2STero Kristo
25186a18ee2STero Kristo layers[0].type = EDAC_MC_LAYER_ALL_MEM;
25286a18ee2STero Kristo layers[0].size = 1;
25386a18ee2STero Kristo
25486a18ee2STero Kristo /* Allocate ID number for our EMIF controller */
25586a18ee2STero Kristo emif_id = _emif_get_id(pdev->dev.of_node);
25686a18ee2STero Kristo if (emif_id < 0)
25786a18ee2STero Kristo return -EINVAL;
25886a18ee2STero Kristo
25986a18ee2STero Kristo mci = edac_mc_alloc(emif_id, 1, layers, sizeof(*edac));
26086a18ee2STero Kristo if (!mci)
26186a18ee2STero Kristo return -ENOMEM;
26286a18ee2STero Kristo
26386a18ee2STero Kristo mci->pdev = &pdev->dev;
26486a18ee2STero Kristo edac = mci->pvt_info;
26586a18ee2STero Kristo edac->reg = reg;
26686a18ee2STero Kristo platform_set_drvdata(pdev, mci);
26786a18ee2STero Kristo
26886a18ee2STero Kristo mci->mtype_cap = MEM_FLAG_DDR3 | MEM_FLAG_DDR2;
26986a18ee2STero Kristo mci->edac_ctl_cap = EDAC_FLAG_SECDED | EDAC_FLAG_NONE;
27086a18ee2STero Kristo mci->mod_name = EDAC_MOD_NAME;
27186a18ee2STero Kristo mci->ctl_name = id->compatible;
27286a18ee2STero Kristo mci->dev_name = dev_name(&pdev->dev);
27386a18ee2STero Kristo
27486a18ee2STero Kristo /* Setup memory layout */
27586a18ee2STero Kristo ti_edac_setup_dimm(mci, (u32)(id->data));
27686a18ee2STero Kristo
27786a18ee2STero Kristo /* add EMIF ECC error handler */
27886a18ee2STero Kristo error_irq = platform_get_irq(pdev, 0);
27966077adbSKrzysztof Kozlowski if (error_irq < 0) {
28066077adbSKrzysztof Kozlowski ret = error_irq;
28186a18ee2STero Kristo goto err;
28286a18ee2STero Kristo }
28386a18ee2STero Kristo
28486a18ee2STero Kristo ret = devm_request_irq(dev, error_irq, ti_edac_isr, 0,
28586a18ee2STero Kristo "emif-edac-irq", mci);
28686a18ee2STero Kristo if (ret) {
28786a18ee2STero Kristo edac_printk(KERN_ERR, EDAC_MOD_NAME,
28886a18ee2STero Kristo "request_irq fail for EMIF EDAC irq\n");
28986a18ee2STero Kristo goto err;
29086a18ee2STero Kristo }
29186a18ee2STero Kristo
29286a18ee2STero Kristo ret = edac_mc_add_mc(mci);
29386a18ee2STero Kristo if (ret) {
29486a18ee2STero Kristo edac_printk(KERN_ERR, EDAC_MOD_NAME,
29586a18ee2STero Kristo "Failed to register mci: %d.\n", ret);
29686a18ee2STero Kristo goto err;
29786a18ee2STero Kristo }
29886a18ee2STero Kristo
29986a18ee2STero Kristo /* Generate an interrupt with each 1b error */
30086a18ee2STero Kristo ti_edac_writel(edac, 1 << EMIF_1B_ECC_ERR_THRSH_SHIFT,
30186a18ee2STero Kristo EMIF_1B_ECC_ERR_THRSH);
30286a18ee2STero Kristo
30386a18ee2STero Kristo /* Enable interrupts */
30486a18ee2STero Kristo ti_edac_writel(edac,
30586a18ee2STero Kristo EMIF_1B_ECC_ERR | EMIF_2B_ECC_ERR | EMIF_WR_ECC_ERR,
30686a18ee2STero Kristo EMIF_IRQ_ENABLE_SET);
30786a18ee2STero Kristo
30886a18ee2STero Kristo return 0;
30986a18ee2STero Kristo
31086a18ee2STero Kristo err:
31186a18ee2STero Kristo edac_mc_free(mci);
31286a18ee2STero Kristo return ret;
31386a18ee2STero Kristo }
31486a18ee2STero Kristo
ti_edac_remove(struct platform_device * pdev)31586a18ee2STero Kristo static int ti_edac_remove(struct platform_device *pdev)
31686a18ee2STero Kristo {
31786a18ee2STero Kristo struct mem_ctl_info *mci = platform_get_drvdata(pdev);
31886a18ee2STero Kristo
31986a18ee2STero Kristo edac_mc_del_mc(&pdev->dev);
32086a18ee2STero Kristo edac_mc_free(mci);
32186a18ee2STero Kristo
32286a18ee2STero Kristo return 0;
32386a18ee2STero Kristo }
32486a18ee2STero Kristo
32586a18ee2STero Kristo static struct platform_driver ti_edac_driver = {
32686a18ee2STero Kristo .probe = ti_edac_probe,
32786a18ee2STero Kristo .remove = ti_edac_remove,
32886a18ee2STero Kristo .driver = {
32986a18ee2STero Kristo .name = EDAC_MOD_NAME,
33086a18ee2STero Kristo .of_match_table = ti_edac_of_match,
33186a18ee2STero Kristo },
33286a18ee2STero Kristo };
33386a18ee2STero Kristo
33486a18ee2STero Kristo module_platform_driver(ti_edac_driver);
33586a18ee2STero Kristo
33686a18ee2STero Kristo MODULE_AUTHOR("Texas Instruments Inc.");
33786a18ee2STero Kristo MODULE_DESCRIPTION("EDAC Driver for Texas Instruments DDR3 MC");
33886a18ee2STero Kristo MODULE_LICENSE("GPL v2");
339