1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Common codes for both the skx_edac driver and Intel 10nm server EDAC driver. 4 * Originally split out from the skx_edac driver. 5 * 6 * Copyright (c) 2018, Intel Corporation. 7 */ 8 9 #ifndef _SKX_COMM_EDAC_H 10 #define _SKX_COMM_EDAC_H 11 12 #define MSG_SIZE 1024 13 14 /* 15 * Debug macros 16 */ 17 #define skx_printk(level, fmt, arg...) \ 18 edac_printk(level, "skx", fmt, ##arg) 19 20 #define skx_mc_printk(mci, level, fmt, arg...) \ 21 edac_mc_chipset_printk(mci, level, "skx", fmt, ##arg) 22 23 /* 24 * Get a bit field at register value <v>, from bit <lo> to bit <hi> 25 */ 26 #define GET_BITFIELD(v, lo, hi) \ 27 (((v) & GENMASK_ULL((hi), (lo))) >> (lo)) 28 29 #define SKX_NUM_IMC 2 /* Memory controllers per socket */ 30 #define SKX_NUM_CHANNELS 3 /* Channels per memory controller */ 31 #define SKX_NUM_DIMMS 2 /* Max DIMMS per channel */ 32 33 #define I10NM_NUM_IMC 4 34 #define I10NM_NUM_CHANNELS 2 35 #define I10NM_NUM_DIMMS 2 36 37 #define MAX(a, b) ((a) > (b) ? (a) : (b)) 38 #define NUM_IMC MAX(SKX_NUM_IMC, I10NM_NUM_IMC) 39 #define NUM_CHANNELS MAX(SKX_NUM_CHANNELS, I10NM_NUM_CHANNELS) 40 #define NUM_DIMMS MAX(SKX_NUM_DIMMS, I10NM_NUM_DIMMS) 41 42 #define IS_DIMM_PRESENT(r) GET_BITFIELD(r, 15, 15) 43 #define IS_NVDIMM_PRESENT(r, i) GET_BITFIELD(r, i, i) 44 45 /* 46 * Each cpu socket contains some pci devices that provide global 47 * information, and also some that are local to each of the two 48 * memory controllers on the die. 49 */ 50 struct skx_dev { 51 struct list_head list; 52 u8 bus[4]; 53 int seg; 54 struct pci_dev *sad_all; 55 struct pci_dev *util_all; 56 struct pci_dev *uracu; /* for i10nm CPU */ 57 u32 mcroute; 58 struct skx_imc { 59 struct mem_ctl_info *mci; 60 struct pci_dev *mdev; /* for i10nm CPU */ 61 void __iomem *mbase; /* for i10nm CPU */ 62 u8 mc; /* system wide mc# */ 63 u8 lmc; /* socket relative mc# */ 64 u8 src_id, node_id; 65 struct skx_channel { 66 struct pci_dev *cdev; 67 struct pci_dev *edev; 68 struct skx_dimm { 69 u8 close_pg; 70 u8 bank_xor_enable; 71 u8 fine_grain_bank; 72 u8 rowbits; 73 u8 colbits; 74 } dimms[NUM_DIMMS]; 75 } chan[NUM_CHANNELS]; 76 } imc[NUM_IMC]; 77 }; 78 79 struct skx_pvt { 80 struct skx_imc *imc; 81 }; 82 83 enum type { 84 SKX, 85 I10NM 86 }; 87 88 enum { 89 INDEX_SOCKET, 90 INDEX_MEMCTRL, 91 INDEX_CHANNEL, 92 INDEX_DIMM, 93 INDEX_MAX 94 }; 95 96 struct decoded_addr { 97 struct skx_dev *dev; 98 u64 addr; 99 int socket; 100 int imc; 101 int channel; 102 u64 chan_addr; 103 int sktways; 104 int chanways; 105 int dimm; 106 int rank; 107 int channel_rank; 108 u64 rank_address; 109 int row; 110 int column; 111 int bank_address; 112 int bank_group; 113 }; 114 115 typedef int (*get_dimm_config_f)(struct mem_ctl_info *mci); 116 typedef bool (*skx_decode_f)(struct decoded_addr *res); 117 typedef void (*skx_show_retry_log_f)(struct decoded_addr *res, char *msg, int len); 118 119 int __init skx_adxl_get(void); 120 void __exit skx_adxl_put(void); 121 void skx_set_decode(skx_decode_f decode, skx_show_retry_log_f show_retry_log); 122 123 int skx_get_src_id(struct skx_dev *d, int off, u8 *id); 124 int skx_get_node_id(struct skx_dev *d, u8 *id); 125 126 int skx_get_all_bus_mappings(unsigned int did, int off, enum type, 127 struct list_head **list); 128 129 int skx_get_hi_lo(unsigned int did, int off[], u64 *tolm, u64 *tohm); 130 131 int skx_get_dimm_info(u32 mtr, u32 amap, struct dimm_info *dimm, 132 struct skx_imc *imc, int chan, int dimmno); 133 134 int skx_get_nvdimm_info(struct dimm_info *dimm, struct skx_imc *imc, 135 int chan, int dimmno, const char *mod_str); 136 137 int skx_register_mci(struct skx_imc *imc, struct pci_dev *pdev, 138 const char *ctl_name, const char *mod_str, 139 get_dimm_config_f get_dimm_config); 140 141 int skx_mce_check_error(struct notifier_block *nb, unsigned long val, 142 void *data); 143 144 void skx_remove(void); 145 146 #endif /* _SKX_COMM_EDAC_H */ 147