xref: /openbmc/linux/drivers/edac/skx_common.h (revision 413d6ed3)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Common codes for both the skx_edac driver and Intel 10nm server EDAC driver.
4  * Originally split out from the skx_edac driver.
5  *
6  * Copyright (c) 2018, Intel Corporation.
7  */
8 
9 #ifndef _SKX_COMM_EDAC_H
10 #define _SKX_COMM_EDAC_H
11 
12 #define MSG_SIZE		1024
13 
14 /*
15  * Debug macros
16  */
17 #define skx_printk(level, fmt, arg...)			\
18 	edac_printk(level, "skx", fmt, ##arg)
19 
20 #define skx_mc_printk(mci, level, fmt, arg...)		\
21 	edac_mc_chipset_printk(mci, level, "skx", fmt, ##arg)
22 
23 /*
24  * Get a bit field at register value <v>, from bit <lo> to bit <hi>
25  */
26 #define GET_BITFIELD(v, lo, hi) \
27 	(((v) & GENMASK_ULL((hi), (lo))) >> (lo))
28 
29 #define SKX_NUM_IMC		2	/* Memory controllers per socket */
30 #define SKX_NUM_CHANNELS	3	/* Channels per memory controller */
31 #define SKX_NUM_DIMMS		2	/* Max DIMMS per channel */
32 
33 #define I10NM_NUM_IMC		4
34 #define I10NM_NUM_CHANNELS	2
35 #define I10NM_NUM_DIMMS		2
36 
37 #define MAX(a, b)	((a) > (b) ? (a) : (b))
38 #define NUM_IMC		MAX(SKX_NUM_IMC, I10NM_NUM_IMC)
39 #define NUM_CHANNELS	MAX(SKX_NUM_CHANNELS, I10NM_NUM_CHANNELS)
40 #define NUM_DIMMS	MAX(SKX_NUM_DIMMS, I10NM_NUM_DIMMS)
41 
42 #define IS_DIMM_PRESENT(r)		GET_BITFIELD(r, 15, 15)
43 #define IS_NVDIMM_PRESENT(r, i)		GET_BITFIELD(r, i, i)
44 
45 /*
46  * Each cpu socket contains some pci devices that provide global
47  * information, and also some that are local to each of the two
48  * memory controllers on the die.
49  */
50 struct skx_dev {
51 	struct list_head list;
52 	u8 bus[4];
53 	int seg;
54 	struct pci_dev *sad_all;
55 	struct pci_dev *util_all;
56 	struct pci_dev *uracu; /* for i10nm CPU */
57 	u32 mcroute;
58 	struct skx_imc {
59 		struct mem_ctl_info *mci;
60 		struct pci_dev *mdev; /* for i10nm CPU */
61 		void __iomem *mbase;  /* for i10nm CPU */
62 		int chan_mmio_sz;     /* for i10nm CPU */
63 		u8 mc;	/* system wide mc# */
64 		u8 lmc;	/* socket relative mc# */
65 		u8 src_id, node_id;
66 		struct skx_channel {
67 			struct pci_dev	*cdev;
68 			struct pci_dev	*edev;
69 			struct skx_dimm {
70 				u8 close_pg;
71 				u8 bank_xor_enable;
72 				u8 fine_grain_bank;
73 				u8 rowbits;
74 				u8 colbits;
75 			} dimms[NUM_DIMMS];
76 		} chan[NUM_CHANNELS];
77 	} imc[NUM_IMC];
78 };
79 
80 struct skx_pvt {
81 	struct skx_imc	*imc;
82 };
83 
84 enum type {
85 	SKX,
86 	I10NM,
87 	SPR
88 };
89 
90 enum {
91 	INDEX_SOCKET,
92 	INDEX_MEMCTRL,
93 	INDEX_CHANNEL,
94 	INDEX_DIMM,
95 	INDEX_MAX
96 };
97 
98 struct decoded_addr {
99 	struct skx_dev *dev;
100 	u64	addr;
101 	int	socket;
102 	int	imc;
103 	int	channel;
104 	u64	chan_addr;
105 	int	sktways;
106 	int	chanways;
107 	int	dimm;
108 	int	rank;
109 	int	channel_rank;
110 	u64	rank_address;
111 	int	row;
112 	int	column;
113 	int	bank_address;
114 	int	bank_group;
115 };
116 
117 struct res_config {
118 	enum type type;
119 	/* Configuration agent device ID */
120 	unsigned int decs_did;
121 	/* Default bus number configuration register offset */
122 	int busno_cfg_offset;
123 	/* Per DDR channel memory-mapped I/O size */
124 	int ddr_chan_mmio_sz;
125 	bool support_ddr5;
126 };
127 
128 typedef int (*get_dimm_config_f)(struct mem_ctl_info *mci,
129 				 struct res_config *cfg);
130 typedef bool (*skx_decode_f)(struct decoded_addr *res);
131 typedef void (*skx_show_retry_log_f)(struct decoded_addr *res, char *msg, int len);
132 
133 int __init skx_adxl_get(void);
134 void __exit skx_adxl_put(void);
135 void skx_set_decode(skx_decode_f decode, skx_show_retry_log_f show_retry_log);
136 
137 int skx_get_src_id(struct skx_dev *d, int off, u8 *id);
138 int skx_get_node_id(struct skx_dev *d, u8 *id);
139 
140 int skx_get_all_bus_mappings(struct res_config *cfg, struct list_head **list);
141 
142 int skx_get_hi_lo(unsigned int did, int off[], u64 *tolm, u64 *tohm);
143 
144 int skx_get_dimm_info(u32 mtr, u32 mcmtr, u32 amap, struct dimm_info *dimm,
145 		      struct skx_imc *imc, int chan, int dimmno,
146 		      struct res_config *cfg);
147 
148 int skx_get_nvdimm_info(struct dimm_info *dimm, struct skx_imc *imc,
149 			int chan, int dimmno, const char *mod_str);
150 
151 int skx_register_mci(struct skx_imc *imc, struct pci_dev *pdev,
152 		     const char *ctl_name, const char *mod_str,
153 		     get_dimm_config_f get_dimm_config,
154 		     struct res_config *cfg);
155 
156 int skx_mce_check_error(struct notifier_block *nb, unsigned long val,
157 			void *data);
158 
159 void skx_remove(void);
160 
161 #endif /* _SKX_COMM_EDAC_H */
162