1 #ifndef _EDAC_MCE_AMD_H 2 #define _EDAC_MCE_AMD_H 3 4 #include <linux/notifier.h> 5 6 #include <asm/mce.h> 7 8 #define BIT_64(n) (U64_C(1) << (n)) 9 10 #define EC(x) ((x) & 0xffff) 11 #define XEC(x, mask) (((x) >> 16) & mask) 12 13 #define LOW_SYNDROME(x) (((x) >> 15) & 0xff) 14 #define HIGH_SYNDROME(x) (((x) >> 24) & 0xff) 15 16 #define TLB_ERROR(x) (((x) & 0xFFF0) == 0x0010) 17 #define MEM_ERROR(x) (((x) & 0xFF00) == 0x0100) 18 #define BUS_ERROR(x) (((x) & 0xF800) == 0x0800) 19 20 #define TT(x) (((x) >> 2) & 0x3) 21 #define TT_MSG(x) tt_msgs[TT(x)] 22 #define II(x) (((x) >> 2) & 0x3) 23 #define II_MSG(x) ii_msgs[II(x)] 24 #define LL(x) ((x) & 0x3) 25 #define LL_MSG(x) ll_msgs[LL(x)] 26 #define TO(x) (((x) >> 8) & 0x1) 27 #define TO_MSG(x) to_msgs[TO(x)] 28 #define PP(x) (((x) >> 9) & 0x3) 29 #define PP_MSG(x) pp_msgs[PP(x)] 30 31 #define R4(x) (((x) >> 4) & 0xf) 32 #define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!") 33 34 /* 35 * F3x4C bits (MCi_STATUS' high half) 36 */ 37 #define NBSH_ERR_CPU_VAL BIT(24) 38 39 enum tt_ids { 40 TT_INSTR = 0, 41 TT_DATA, 42 TT_GEN, 43 TT_RESV, 44 }; 45 46 enum ll_ids { 47 LL_RESV = 0, 48 LL_L1, 49 LL_L2, 50 LL_LG, 51 }; 52 53 enum ii_ids { 54 II_MEM = 0, 55 II_RESV, 56 II_IO, 57 II_GEN, 58 }; 59 60 enum rrrr_ids { 61 R4_GEN = 0, 62 R4_RD, 63 R4_WR, 64 R4_DRD, 65 R4_DWR, 66 R4_IRD, 67 R4_PREF, 68 R4_EVICT, 69 R4_SNOOP, 70 }; 71 72 extern const char *tt_msgs[]; 73 extern const char *ll_msgs[]; 74 extern const char *rrrr_msgs[]; 75 extern const char *pp_msgs[]; 76 extern const char *to_msgs[]; 77 extern const char *ii_msgs[]; 78 79 /* 80 * per-family decoder ops 81 */ 82 struct amd_decoder_ops { 83 bool (*dc_mce)(u16, u8); 84 bool (*ic_mce)(u16, u8); 85 bool (*nb_mce)(u16, u8); 86 }; 87 88 void amd_report_gart_errors(bool); 89 void amd_register_ecc_decoder(void (*f)(int, struct mce *)); 90 void amd_unregister_ecc_decoder(void (*f)(int, struct mce *)); 91 void amd_decode_nb_mce(struct mce *); 92 int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data); 93 94 #endif /* _EDAC_MCE_AMD_H */ 95