1 #ifndef _EDAC_MCE_AMD_H 2 #define _EDAC_MCE_AMD_H 3 4 #include <linux/notifier.h> 5 6 #include <asm/mce.h> 7 8 #define EC(x) ((x) & 0xffff) 9 #define XEC(x, mask) (((x) >> 16) & mask) 10 11 #define LOW_SYNDROME(x) (((x) >> 15) & 0xff) 12 #define HIGH_SYNDROME(x) (((x) >> 24) & 0xff) 13 14 #define TLB_ERROR(x) (((x) & 0xFFF0) == 0x0010) 15 #define MEM_ERROR(x) (((x) & 0xFF00) == 0x0100) 16 #define BUS_ERROR(x) (((x) & 0xF800) == 0x0800) 17 #define INT_ERROR(x) (((x) & 0xF4FF) == 0x0400) 18 19 #define TT(x) (((x) >> 2) & 0x3) 20 #define TT_MSG(x) tt_msgs[TT(x)] 21 #define II(x) (((x) >> 2) & 0x3) 22 #define II_MSG(x) ii_msgs[II(x)] 23 #define LL(x) ((x) & 0x3) 24 #define LL_MSG(x) ll_msgs[LL(x)] 25 #define TO(x) (((x) >> 8) & 0x1) 26 #define TO_MSG(x) to_msgs[TO(x)] 27 #define PP(x) (((x) >> 9) & 0x3) 28 #define PP_MSG(x) pp_msgs[PP(x)] 29 #define UU(x) (((x) >> 8) & 0x3) 30 #define UU_MSG(x) uu_msgs[UU(x)] 31 32 #define R4(x) (((x) >> 4) & 0xf) 33 #define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!") 34 35 extern const char * const pp_msgs[]; 36 37 enum tt_ids { 38 TT_INSTR = 0, 39 TT_DATA, 40 TT_GEN, 41 TT_RESV, 42 }; 43 44 enum ll_ids { 45 LL_RESV = 0, 46 LL_L1, 47 LL_L2, 48 LL_LG, 49 }; 50 51 enum ii_ids { 52 II_MEM = 0, 53 II_RESV, 54 II_IO, 55 II_GEN, 56 }; 57 58 enum rrrr_ids { 59 R4_GEN = 0, 60 R4_RD, 61 R4_WR, 62 R4_DRD, 63 R4_DWR, 64 R4_IRD, 65 R4_PREF, 66 R4_EVICT, 67 R4_SNOOP, 68 }; 69 70 /* 71 * per-family decoder ops 72 */ 73 struct amd_decoder_ops { 74 bool (*mc0_mce)(u16, u8); 75 bool (*mc1_mce)(u16, u8); 76 bool (*mc2_mce)(u16, u8); 77 }; 78 79 void amd_report_gart_errors(bool); 80 void amd_register_ecc_decoder(void (*f)(int, struct mce *)); 81 void amd_unregister_ecc_decoder(void (*f)(int, struct mce *)); 82 int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data); 83 84 #endif /* _EDAC_MCE_AMD_H */ 85