1 /* 2 * Copyright 2011-2012 Calxeda, Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * You should have received a copy of the GNU General Public License along with 14 * this program. If not, see <http://www.gnu.org/licenses/>. 15 */ 16 #include <linux/types.h> 17 #include <linux/kernel.h> 18 #include <linux/ctype.h> 19 #include <linux/edac.h> 20 #include <linux/interrupt.h> 21 #include <linux/platform_device.h> 22 #include <linux/of_platform.h> 23 24 #include "edac_module.h" 25 26 #define SR_CLR_SB_ECC_INTR 0x0 27 #define SR_CLR_DB_ECC_INTR 0x4 28 29 struct hb_l2_drvdata { 30 void __iomem *base; 31 int sb_irq; 32 int db_irq; 33 }; 34 35 static irqreturn_t highbank_l2_err_handler(int irq, void *dev_id) 36 { 37 struct edac_device_ctl_info *dci = dev_id; 38 struct hb_l2_drvdata *drvdata = dci->pvt_info; 39 40 if (irq == drvdata->sb_irq) { 41 writel(1, drvdata->base + SR_CLR_SB_ECC_INTR); 42 edac_device_handle_ce(dci, 0, 0, dci->ctl_name); 43 } 44 if (irq == drvdata->db_irq) { 45 writel(1, drvdata->base + SR_CLR_DB_ECC_INTR); 46 edac_device_handle_ue(dci, 0, 0, dci->ctl_name); 47 } 48 49 return IRQ_HANDLED; 50 } 51 52 static const struct of_device_id hb_l2_err_of_match[] = { 53 { .compatible = "calxeda,hb-sregs-l2-ecc", }, 54 {}, 55 }; 56 MODULE_DEVICE_TABLE(of, hb_l2_err_of_match); 57 58 static int highbank_l2_err_probe(struct platform_device *pdev) 59 { 60 const struct of_device_id *id; 61 struct edac_device_ctl_info *dci; 62 struct hb_l2_drvdata *drvdata; 63 struct resource *r; 64 int res = 0; 65 66 dci = edac_device_alloc_ctl_info(sizeof(*drvdata), "cpu", 67 1, "L", 1, 2, NULL, 0, 0); 68 if (!dci) 69 return -ENOMEM; 70 71 drvdata = dci->pvt_info; 72 dci->dev = &pdev->dev; 73 platform_set_drvdata(pdev, dci); 74 75 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL)) 76 return -ENOMEM; 77 78 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 79 if (!r) { 80 dev_err(&pdev->dev, "Unable to get mem resource\n"); 81 res = -ENODEV; 82 goto err; 83 } 84 85 if (!devm_request_mem_region(&pdev->dev, r->start, 86 resource_size(r), dev_name(&pdev->dev))) { 87 dev_err(&pdev->dev, "Error while requesting mem region\n"); 88 res = -EBUSY; 89 goto err; 90 } 91 92 drvdata->base = devm_ioremap(&pdev->dev, r->start, resource_size(r)); 93 if (!drvdata->base) { 94 dev_err(&pdev->dev, "Unable to map regs\n"); 95 res = -ENOMEM; 96 goto err; 97 } 98 99 id = of_match_device(hb_l2_err_of_match, &pdev->dev); 100 dci->mod_name = pdev->dev.driver->name; 101 dci->ctl_name = id ? id->compatible : "unknown"; 102 dci->dev_name = dev_name(&pdev->dev); 103 104 if (edac_device_add_device(dci)) 105 goto err; 106 107 drvdata->db_irq = platform_get_irq(pdev, 0); 108 res = devm_request_irq(&pdev->dev, drvdata->db_irq, 109 highbank_l2_err_handler, 110 0, dev_name(&pdev->dev), dci); 111 if (res < 0) 112 goto err2; 113 114 drvdata->sb_irq = platform_get_irq(pdev, 1); 115 res = devm_request_irq(&pdev->dev, drvdata->sb_irq, 116 highbank_l2_err_handler, 117 0, dev_name(&pdev->dev), dci); 118 if (res < 0) 119 goto err2; 120 121 devres_close_group(&pdev->dev, NULL); 122 return 0; 123 err2: 124 edac_device_del_device(&pdev->dev); 125 err: 126 devres_release_group(&pdev->dev, NULL); 127 edac_device_free_ctl_info(dci); 128 return res; 129 } 130 131 static int highbank_l2_err_remove(struct platform_device *pdev) 132 { 133 struct edac_device_ctl_info *dci = platform_get_drvdata(pdev); 134 135 edac_device_del_device(&pdev->dev); 136 edac_device_free_ctl_info(dci); 137 return 0; 138 } 139 140 static struct platform_driver highbank_l2_edac_driver = { 141 .probe = highbank_l2_err_probe, 142 .remove = highbank_l2_err_remove, 143 .driver = { 144 .name = "hb_l2_edac", 145 .of_match_table = hb_l2_err_of_match, 146 }, 147 }; 148 149 module_platform_driver(highbank_l2_edac_driver); 150 151 MODULE_LICENSE("GPL v2"); 152 MODULE_AUTHOR("Calxeda, Inc."); 153 MODULE_DESCRIPTION("EDAC Driver for Calxeda Highbank L2 Cache"); 154