1 /* 2 * edac_mc kernel module 3 * (C) 2005-2007 Linux Networx (http://lnxi.com) 4 * 5 * This file may be distributed under the terms of the 6 * GNU General Public License. 7 * 8 * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com 9 * 10 * (c) 2012-2013 - Mauro Carvalho Chehab <mchehab@redhat.com> 11 * The entire API were re-written, and ported to use struct device 12 * 13 */ 14 15 #include <linux/ctype.h> 16 #include <linux/slab.h> 17 #include <linux/edac.h> 18 #include <linux/bug.h> 19 #include <linux/pm_runtime.h> 20 #include <linux/uaccess.h> 21 22 #include "edac_core.h" 23 #include "edac_module.h" 24 25 /* MC EDAC Controls, setable by module parameter, and sysfs */ 26 static int edac_mc_log_ue = 1; 27 static int edac_mc_log_ce = 1; 28 static int edac_mc_panic_on_ue; 29 static int edac_mc_poll_msec = 1000; 30 31 /* Getter functions for above */ 32 int edac_mc_get_log_ue(void) 33 { 34 return edac_mc_log_ue; 35 } 36 37 int edac_mc_get_log_ce(void) 38 { 39 return edac_mc_log_ce; 40 } 41 42 int edac_mc_get_panic_on_ue(void) 43 { 44 return edac_mc_panic_on_ue; 45 } 46 47 /* this is temporary */ 48 int edac_mc_get_poll_msec(void) 49 { 50 return edac_mc_poll_msec; 51 } 52 53 static int edac_set_poll_msec(const char *val, struct kernel_param *kp) 54 { 55 long l; 56 int ret; 57 58 if (!val) 59 return -EINVAL; 60 61 ret = strict_strtol(val, 0, &l); 62 if (ret == -EINVAL || ((int)l != l)) 63 return -EINVAL; 64 *((int *)kp->arg) = l; 65 66 /* notify edac_mc engine to reset the poll period */ 67 edac_mc_reset_delay_period(l); 68 69 return 0; 70 } 71 72 /* Parameter declarations for above */ 73 module_param(edac_mc_panic_on_ue, int, 0644); 74 MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on"); 75 module_param(edac_mc_log_ue, int, 0644); 76 MODULE_PARM_DESC(edac_mc_log_ue, 77 "Log uncorrectable error to console: 0=off 1=on"); 78 module_param(edac_mc_log_ce, int, 0644); 79 MODULE_PARM_DESC(edac_mc_log_ce, 80 "Log correctable error to console: 0=off 1=on"); 81 module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int, 82 &edac_mc_poll_msec, 0644); 83 MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds"); 84 85 static struct device *mci_pdev; 86 87 /* 88 * various constants for Memory Controllers 89 */ 90 static const char * const mem_types[] = { 91 [MEM_EMPTY] = "Empty", 92 [MEM_RESERVED] = "Reserved", 93 [MEM_UNKNOWN] = "Unknown", 94 [MEM_FPM] = "FPM", 95 [MEM_EDO] = "EDO", 96 [MEM_BEDO] = "BEDO", 97 [MEM_SDR] = "Unbuffered-SDR", 98 [MEM_RDR] = "Registered-SDR", 99 [MEM_DDR] = "Unbuffered-DDR", 100 [MEM_RDDR] = "Registered-DDR", 101 [MEM_RMBS] = "RMBS", 102 [MEM_DDR2] = "Unbuffered-DDR2", 103 [MEM_FB_DDR2] = "FullyBuffered-DDR2", 104 [MEM_RDDR2] = "Registered-DDR2", 105 [MEM_XDR] = "XDR", 106 [MEM_DDR3] = "Unbuffered-DDR3", 107 [MEM_RDDR3] = "Registered-DDR3" 108 }; 109 110 static const char * const dev_types[] = { 111 [DEV_UNKNOWN] = "Unknown", 112 [DEV_X1] = "x1", 113 [DEV_X2] = "x2", 114 [DEV_X4] = "x4", 115 [DEV_X8] = "x8", 116 [DEV_X16] = "x16", 117 [DEV_X32] = "x32", 118 [DEV_X64] = "x64" 119 }; 120 121 static const char * const edac_caps[] = { 122 [EDAC_UNKNOWN] = "Unknown", 123 [EDAC_NONE] = "None", 124 [EDAC_RESERVED] = "Reserved", 125 [EDAC_PARITY] = "PARITY", 126 [EDAC_EC] = "EC", 127 [EDAC_SECDED] = "SECDED", 128 [EDAC_S2ECD2ED] = "S2ECD2ED", 129 [EDAC_S4ECD4ED] = "S4ECD4ED", 130 [EDAC_S8ECD8ED] = "S8ECD8ED", 131 [EDAC_S16ECD16ED] = "S16ECD16ED" 132 }; 133 134 #ifdef CONFIG_EDAC_LEGACY_SYSFS 135 /* 136 * EDAC sysfs CSROW data structures and methods 137 */ 138 139 #define to_csrow(k) container_of(k, struct csrow_info, dev) 140 141 /* 142 * We need it to avoid namespace conflicts between the legacy API 143 * and the per-dimm/per-rank one 144 */ 145 #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \ 146 static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store) 147 148 struct dev_ch_attribute { 149 struct device_attribute attr; 150 int channel; 151 }; 152 153 #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \ 154 struct dev_ch_attribute dev_attr_legacy_##_name = \ 155 { __ATTR(_name, _mode, _show, _store), (_var) } 156 157 #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel) 158 159 /* Set of more default csrow<id> attribute show/store functions */ 160 static ssize_t csrow_ue_count_show(struct device *dev, 161 struct device_attribute *mattr, char *data) 162 { 163 struct csrow_info *csrow = to_csrow(dev); 164 165 return sprintf(data, "%u\n", csrow->ue_count); 166 } 167 168 static ssize_t csrow_ce_count_show(struct device *dev, 169 struct device_attribute *mattr, char *data) 170 { 171 struct csrow_info *csrow = to_csrow(dev); 172 173 return sprintf(data, "%u\n", csrow->ce_count); 174 } 175 176 static ssize_t csrow_size_show(struct device *dev, 177 struct device_attribute *mattr, char *data) 178 { 179 struct csrow_info *csrow = to_csrow(dev); 180 int i; 181 u32 nr_pages = 0; 182 183 for (i = 0; i < csrow->nr_channels; i++) 184 nr_pages += csrow->channels[i]->dimm->nr_pages; 185 return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages)); 186 } 187 188 static ssize_t csrow_mem_type_show(struct device *dev, 189 struct device_attribute *mattr, char *data) 190 { 191 struct csrow_info *csrow = to_csrow(dev); 192 193 return sprintf(data, "%s\n", mem_types[csrow->channels[0]->dimm->mtype]); 194 } 195 196 static ssize_t csrow_dev_type_show(struct device *dev, 197 struct device_attribute *mattr, char *data) 198 { 199 struct csrow_info *csrow = to_csrow(dev); 200 201 return sprintf(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]); 202 } 203 204 static ssize_t csrow_edac_mode_show(struct device *dev, 205 struct device_attribute *mattr, 206 char *data) 207 { 208 struct csrow_info *csrow = to_csrow(dev); 209 210 return sprintf(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]); 211 } 212 213 /* show/store functions for DIMM Label attributes */ 214 static ssize_t channel_dimm_label_show(struct device *dev, 215 struct device_attribute *mattr, 216 char *data) 217 { 218 struct csrow_info *csrow = to_csrow(dev); 219 unsigned chan = to_channel(mattr); 220 struct rank_info *rank = csrow->channels[chan]; 221 222 /* if field has not been initialized, there is nothing to send */ 223 if (!rank->dimm->label[0]) 224 return 0; 225 226 return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", 227 rank->dimm->label); 228 } 229 230 static ssize_t channel_dimm_label_store(struct device *dev, 231 struct device_attribute *mattr, 232 const char *data, size_t count) 233 { 234 struct csrow_info *csrow = to_csrow(dev); 235 unsigned chan = to_channel(mattr); 236 struct rank_info *rank = csrow->channels[chan]; 237 238 ssize_t max_size = 0; 239 240 max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1); 241 strncpy(rank->dimm->label, data, max_size); 242 rank->dimm->label[max_size] = '\0'; 243 244 return max_size; 245 } 246 247 /* show function for dynamic chX_ce_count attribute */ 248 static ssize_t channel_ce_count_show(struct device *dev, 249 struct device_attribute *mattr, char *data) 250 { 251 struct csrow_info *csrow = to_csrow(dev); 252 unsigned chan = to_channel(mattr); 253 struct rank_info *rank = csrow->channels[chan]; 254 255 return sprintf(data, "%u\n", rank->ce_count); 256 } 257 258 /* cwrow<id>/attribute files */ 259 DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL); 260 DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL); 261 DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL); 262 DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL); 263 DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL); 264 DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL); 265 266 /* default attributes of the CSROW<id> object */ 267 static struct attribute *csrow_attrs[] = { 268 &dev_attr_legacy_dev_type.attr, 269 &dev_attr_legacy_mem_type.attr, 270 &dev_attr_legacy_edac_mode.attr, 271 &dev_attr_legacy_size_mb.attr, 272 &dev_attr_legacy_ue_count.attr, 273 &dev_attr_legacy_ce_count.attr, 274 NULL, 275 }; 276 277 static struct attribute_group csrow_attr_grp = { 278 .attrs = csrow_attrs, 279 }; 280 281 static const struct attribute_group *csrow_attr_groups[] = { 282 &csrow_attr_grp, 283 NULL 284 }; 285 286 static void csrow_attr_release(struct device *dev) 287 { 288 struct csrow_info *csrow = container_of(dev, struct csrow_info, dev); 289 290 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev)); 291 kfree(csrow); 292 } 293 294 static struct device_type csrow_attr_type = { 295 .groups = csrow_attr_groups, 296 .release = csrow_attr_release, 297 }; 298 299 /* 300 * possible dynamic channel DIMM Label attribute files 301 * 302 */ 303 304 #define EDAC_NR_CHANNELS 6 305 306 DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR, 307 channel_dimm_label_show, channel_dimm_label_store, 0); 308 DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR, 309 channel_dimm_label_show, channel_dimm_label_store, 1); 310 DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR, 311 channel_dimm_label_show, channel_dimm_label_store, 2); 312 DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR, 313 channel_dimm_label_show, channel_dimm_label_store, 3); 314 DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR, 315 channel_dimm_label_show, channel_dimm_label_store, 4); 316 DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR, 317 channel_dimm_label_show, channel_dimm_label_store, 5); 318 319 /* Total possible dynamic DIMM Label attribute file table */ 320 static struct device_attribute *dynamic_csrow_dimm_attr[] = { 321 &dev_attr_legacy_ch0_dimm_label.attr, 322 &dev_attr_legacy_ch1_dimm_label.attr, 323 &dev_attr_legacy_ch2_dimm_label.attr, 324 &dev_attr_legacy_ch3_dimm_label.attr, 325 &dev_attr_legacy_ch4_dimm_label.attr, 326 &dev_attr_legacy_ch5_dimm_label.attr 327 }; 328 329 /* possible dynamic channel ce_count attribute files */ 330 DEVICE_CHANNEL(ch0_ce_count, S_IRUGO, 331 channel_ce_count_show, NULL, 0); 332 DEVICE_CHANNEL(ch1_ce_count, S_IRUGO, 333 channel_ce_count_show, NULL, 1); 334 DEVICE_CHANNEL(ch2_ce_count, S_IRUGO, 335 channel_ce_count_show, NULL, 2); 336 DEVICE_CHANNEL(ch3_ce_count, S_IRUGO, 337 channel_ce_count_show, NULL, 3); 338 DEVICE_CHANNEL(ch4_ce_count, S_IRUGO, 339 channel_ce_count_show, NULL, 4); 340 DEVICE_CHANNEL(ch5_ce_count, S_IRUGO, 341 channel_ce_count_show, NULL, 5); 342 343 /* Total possible dynamic ce_count attribute file table */ 344 static struct device_attribute *dynamic_csrow_ce_count_attr[] = { 345 &dev_attr_legacy_ch0_ce_count.attr, 346 &dev_attr_legacy_ch1_ce_count.attr, 347 &dev_attr_legacy_ch2_ce_count.attr, 348 &dev_attr_legacy_ch3_ce_count.attr, 349 &dev_attr_legacy_ch4_ce_count.attr, 350 &dev_attr_legacy_ch5_ce_count.attr 351 }; 352 353 static inline int nr_pages_per_csrow(struct csrow_info *csrow) 354 { 355 int chan, nr_pages = 0; 356 357 for (chan = 0; chan < csrow->nr_channels; chan++) 358 nr_pages += csrow->channels[chan]->dimm->nr_pages; 359 360 return nr_pages; 361 } 362 363 /* Create a CSROW object under specifed edac_mc_device */ 364 static int edac_create_csrow_object(struct mem_ctl_info *mci, 365 struct csrow_info *csrow, int index) 366 { 367 int err, chan; 368 369 if (csrow->nr_channels >= EDAC_NR_CHANNELS) 370 return -ENODEV; 371 372 csrow->dev.type = &csrow_attr_type; 373 csrow->dev.bus = mci->bus; 374 device_initialize(&csrow->dev); 375 csrow->dev.parent = &mci->dev; 376 csrow->mci = mci; 377 dev_set_name(&csrow->dev, "csrow%d", index); 378 dev_set_drvdata(&csrow->dev, csrow); 379 380 edac_dbg(0, "creating (virtual) csrow node %s\n", 381 dev_name(&csrow->dev)); 382 383 err = device_add(&csrow->dev); 384 if (err < 0) 385 return err; 386 387 for (chan = 0; chan < csrow->nr_channels; chan++) { 388 /* Only expose populated DIMMs */ 389 if (!csrow->channels[chan]->dimm->nr_pages) 390 continue; 391 err = device_create_file(&csrow->dev, 392 dynamic_csrow_dimm_attr[chan]); 393 if (err < 0) 394 goto error; 395 err = device_create_file(&csrow->dev, 396 dynamic_csrow_ce_count_attr[chan]); 397 if (err < 0) { 398 device_remove_file(&csrow->dev, 399 dynamic_csrow_dimm_attr[chan]); 400 goto error; 401 } 402 } 403 404 return 0; 405 406 error: 407 for (--chan; chan >= 0; chan--) { 408 device_remove_file(&csrow->dev, 409 dynamic_csrow_dimm_attr[chan]); 410 device_remove_file(&csrow->dev, 411 dynamic_csrow_ce_count_attr[chan]); 412 } 413 put_device(&csrow->dev); 414 415 return err; 416 } 417 418 /* Create a CSROW object under specifed edac_mc_device */ 419 static int edac_create_csrow_objects(struct mem_ctl_info *mci) 420 { 421 int err, i, chan; 422 struct csrow_info *csrow; 423 424 for (i = 0; i < mci->nr_csrows; i++) { 425 csrow = mci->csrows[i]; 426 if (!nr_pages_per_csrow(csrow)) 427 continue; 428 err = edac_create_csrow_object(mci, mci->csrows[i], i); 429 if (err < 0) { 430 edac_dbg(1, 431 "failure: create csrow objects for csrow %d\n", 432 i); 433 goto error; 434 } 435 } 436 return 0; 437 438 error: 439 for (--i; i >= 0; i--) { 440 csrow = mci->csrows[i]; 441 if (!nr_pages_per_csrow(csrow)) 442 continue; 443 for (chan = csrow->nr_channels - 1; chan >= 0; chan--) { 444 if (!csrow->channels[chan]->dimm->nr_pages) 445 continue; 446 device_remove_file(&csrow->dev, 447 dynamic_csrow_dimm_attr[chan]); 448 device_remove_file(&csrow->dev, 449 dynamic_csrow_ce_count_attr[chan]); 450 } 451 put_device(&mci->csrows[i]->dev); 452 } 453 454 return err; 455 } 456 457 static void edac_delete_csrow_objects(struct mem_ctl_info *mci) 458 { 459 int i, chan; 460 struct csrow_info *csrow; 461 462 for (i = mci->nr_csrows - 1; i >= 0; i--) { 463 csrow = mci->csrows[i]; 464 if (!nr_pages_per_csrow(csrow)) 465 continue; 466 for (chan = csrow->nr_channels - 1; chan >= 0; chan--) { 467 if (!csrow->channels[chan]->dimm->nr_pages) 468 continue; 469 edac_dbg(1, "Removing csrow %d channel %d sysfs nodes\n", 470 i, chan); 471 device_remove_file(&csrow->dev, 472 dynamic_csrow_dimm_attr[chan]); 473 device_remove_file(&csrow->dev, 474 dynamic_csrow_ce_count_attr[chan]); 475 } 476 device_unregister(&mci->csrows[i]->dev); 477 } 478 } 479 #endif 480 481 /* 482 * Per-dimm (or per-rank) devices 483 */ 484 485 #define to_dimm(k) container_of(k, struct dimm_info, dev) 486 487 /* show/store functions for DIMM Label attributes */ 488 static ssize_t dimmdev_location_show(struct device *dev, 489 struct device_attribute *mattr, char *data) 490 { 491 struct dimm_info *dimm = to_dimm(dev); 492 493 return edac_dimm_info_location(dimm, data, PAGE_SIZE); 494 } 495 496 static ssize_t dimmdev_label_show(struct device *dev, 497 struct device_attribute *mattr, char *data) 498 { 499 struct dimm_info *dimm = to_dimm(dev); 500 501 /* if field has not been initialized, there is nothing to send */ 502 if (!dimm->label[0]) 503 return 0; 504 505 return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", dimm->label); 506 } 507 508 static ssize_t dimmdev_label_store(struct device *dev, 509 struct device_attribute *mattr, 510 const char *data, 511 size_t count) 512 { 513 struct dimm_info *dimm = to_dimm(dev); 514 515 ssize_t max_size = 0; 516 517 max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1); 518 strncpy(dimm->label, data, max_size); 519 dimm->label[max_size] = '\0'; 520 521 return max_size; 522 } 523 524 static ssize_t dimmdev_size_show(struct device *dev, 525 struct device_attribute *mattr, char *data) 526 { 527 struct dimm_info *dimm = to_dimm(dev); 528 529 return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages)); 530 } 531 532 static ssize_t dimmdev_mem_type_show(struct device *dev, 533 struct device_attribute *mattr, char *data) 534 { 535 struct dimm_info *dimm = to_dimm(dev); 536 537 return sprintf(data, "%s\n", mem_types[dimm->mtype]); 538 } 539 540 static ssize_t dimmdev_dev_type_show(struct device *dev, 541 struct device_attribute *mattr, char *data) 542 { 543 struct dimm_info *dimm = to_dimm(dev); 544 545 return sprintf(data, "%s\n", dev_types[dimm->dtype]); 546 } 547 548 static ssize_t dimmdev_edac_mode_show(struct device *dev, 549 struct device_attribute *mattr, 550 char *data) 551 { 552 struct dimm_info *dimm = to_dimm(dev); 553 554 return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]); 555 } 556 557 /* dimm/rank attribute files */ 558 static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR, 559 dimmdev_label_show, dimmdev_label_store); 560 static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL); 561 static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL); 562 static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL); 563 static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL); 564 static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL); 565 566 /* attributes of the dimm<id>/rank<id> object */ 567 static struct attribute *dimm_attrs[] = { 568 &dev_attr_dimm_label.attr, 569 &dev_attr_dimm_location.attr, 570 &dev_attr_size.attr, 571 &dev_attr_dimm_mem_type.attr, 572 &dev_attr_dimm_dev_type.attr, 573 &dev_attr_dimm_edac_mode.attr, 574 NULL, 575 }; 576 577 static struct attribute_group dimm_attr_grp = { 578 .attrs = dimm_attrs, 579 }; 580 581 static const struct attribute_group *dimm_attr_groups[] = { 582 &dimm_attr_grp, 583 NULL 584 }; 585 586 static void dimm_attr_release(struct device *dev) 587 { 588 struct dimm_info *dimm = container_of(dev, struct dimm_info, dev); 589 590 edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev)); 591 kfree(dimm); 592 } 593 594 static struct device_type dimm_attr_type = { 595 .groups = dimm_attr_groups, 596 .release = dimm_attr_release, 597 }; 598 599 /* Create a DIMM object under specifed memory controller device */ 600 static int edac_create_dimm_object(struct mem_ctl_info *mci, 601 struct dimm_info *dimm, 602 int index) 603 { 604 int err; 605 dimm->mci = mci; 606 607 dimm->dev.type = &dimm_attr_type; 608 dimm->dev.bus = mci->bus; 609 device_initialize(&dimm->dev); 610 611 dimm->dev.parent = &mci->dev; 612 if (mci->csbased) 613 dev_set_name(&dimm->dev, "rank%d", index); 614 else 615 dev_set_name(&dimm->dev, "dimm%d", index); 616 dev_set_drvdata(&dimm->dev, dimm); 617 pm_runtime_forbid(&mci->dev); 618 619 err = device_add(&dimm->dev); 620 621 edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm->dev)); 622 623 return err; 624 } 625 626 /* 627 * Memory controller device 628 */ 629 630 #define to_mci(k) container_of(k, struct mem_ctl_info, dev) 631 632 static ssize_t mci_reset_counters_store(struct device *dev, 633 struct device_attribute *mattr, 634 const char *data, size_t count) 635 { 636 struct mem_ctl_info *mci = to_mci(dev); 637 int cnt, row, chan, i; 638 mci->ue_mc = 0; 639 mci->ce_mc = 0; 640 mci->ue_noinfo_count = 0; 641 mci->ce_noinfo_count = 0; 642 643 for (row = 0; row < mci->nr_csrows; row++) { 644 struct csrow_info *ri = mci->csrows[row]; 645 646 ri->ue_count = 0; 647 ri->ce_count = 0; 648 649 for (chan = 0; chan < ri->nr_channels; chan++) 650 ri->channels[chan]->ce_count = 0; 651 } 652 653 cnt = 1; 654 for (i = 0; i < mci->n_layers; i++) { 655 cnt *= mci->layers[i].size; 656 memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32)); 657 memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32)); 658 } 659 660 mci->start_time = jiffies; 661 return count; 662 } 663 664 /* Memory scrubbing interface: 665 * 666 * A MC driver can limit the scrubbing bandwidth based on the CPU type. 667 * Therefore, ->set_sdram_scrub_rate should be made to return the actual 668 * bandwidth that is accepted or 0 when scrubbing is to be disabled. 669 * 670 * Negative value still means that an error has occurred while setting 671 * the scrub rate. 672 */ 673 static ssize_t mci_sdram_scrub_rate_store(struct device *dev, 674 struct device_attribute *mattr, 675 const char *data, size_t count) 676 { 677 struct mem_ctl_info *mci = to_mci(dev); 678 unsigned long bandwidth = 0; 679 int new_bw = 0; 680 681 if (kstrtoul(data, 10, &bandwidth) < 0) 682 return -EINVAL; 683 684 new_bw = mci->set_sdram_scrub_rate(mci, bandwidth); 685 if (new_bw < 0) { 686 edac_printk(KERN_WARNING, EDAC_MC, 687 "Error setting scrub rate to: %lu\n", bandwidth); 688 return -EINVAL; 689 } 690 691 return count; 692 } 693 694 /* 695 * ->get_sdram_scrub_rate() return value semantics same as above. 696 */ 697 static ssize_t mci_sdram_scrub_rate_show(struct device *dev, 698 struct device_attribute *mattr, 699 char *data) 700 { 701 struct mem_ctl_info *mci = to_mci(dev); 702 int bandwidth = 0; 703 704 bandwidth = mci->get_sdram_scrub_rate(mci); 705 if (bandwidth < 0) { 706 edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n"); 707 return bandwidth; 708 } 709 710 return sprintf(data, "%d\n", bandwidth); 711 } 712 713 /* default attribute files for the MCI object */ 714 static ssize_t mci_ue_count_show(struct device *dev, 715 struct device_attribute *mattr, 716 char *data) 717 { 718 struct mem_ctl_info *mci = to_mci(dev); 719 720 return sprintf(data, "%d\n", mci->ue_mc); 721 } 722 723 static ssize_t mci_ce_count_show(struct device *dev, 724 struct device_attribute *mattr, 725 char *data) 726 { 727 struct mem_ctl_info *mci = to_mci(dev); 728 729 return sprintf(data, "%d\n", mci->ce_mc); 730 } 731 732 static ssize_t mci_ce_noinfo_show(struct device *dev, 733 struct device_attribute *mattr, 734 char *data) 735 { 736 struct mem_ctl_info *mci = to_mci(dev); 737 738 return sprintf(data, "%d\n", mci->ce_noinfo_count); 739 } 740 741 static ssize_t mci_ue_noinfo_show(struct device *dev, 742 struct device_attribute *mattr, 743 char *data) 744 { 745 struct mem_ctl_info *mci = to_mci(dev); 746 747 return sprintf(data, "%d\n", mci->ue_noinfo_count); 748 } 749 750 static ssize_t mci_seconds_show(struct device *dev, 751 struct device_attribute *mattr, 752 char *data) 753 { 754 struct mem_ctl_info *mci = to_mci(dev); 755 756 return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ); 757 } 758 759 static ssize_t mci_ctl_name_show(struct device *dev, 760 struct device_attribute *mattr, 761 char *data) 762 { 763 struct mem_ctl_info *mci = to_mci(dev); 764 765 return sprintf(data, "%s\n", mci->ctl_name); 766 } 767 768 static ssize_t mci_size_mb_show(struct device *dev, 769 struct device_attribute *mattr, 770 char *data) 771 { 772 struct mem_ctl_info *mci = to_mci(dev); 773 int total_pages = 0, csrow_idx, j; 774 775 for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) { 776 struct csrow_info *csrow = mci->csrows[csrow_idx]; 777 778 for (j = 0; j < csrow->nr_channels; j++) { 779 struct dimm_info *dimm = csrow->channels[j]->dimm; 780 781 total_pages += dimm->nr_pages; 782 } 783 } 784 785 return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages)); 786 } 787 788 static ssize_t mci_max_location_show(struct device *dev, 789 struct device_attribute *mattr, 790 char *data) 791 { 792 struct mem_ctl_info *mci = to_mci(dev); 793 int i; 794 char *p = data; 795 796 for (i = 0; i < mci->n_layers; i++) { 797 p += sprintf(p, "%s %d ", 798 edac_layer_name[mci->layers[i].type], 799 mci->layers[i].size - 1); 800 } 801 802 return p - data; 803 } 804 805 #ifdef CONFIG_EDAC_DEBUG 806 static ssize_t edac_fake_inject_write(struct file *file, 807 const char __user *data, 808 size_t count, loff_t *ppos) 809 { 810 struct device *dev = file->private_data; 811 struct mem_ctl_info *mci = to_mci(dev); 812 static enum hw_event_mc_err_type type; 813 u16 errcount = mci->fake_inject_count; 814 815 if (!errcount) 816 errcount = 1; 817 818 type = mci->fake_inject_ue ? HW_EVENT_ERR_UNCORRECTED 819 : HW_EVENT_ERR_CORRECTED; 820 821 printk(KERN_DEBUG 822 "Generating %d %s fake error%s to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n", 823 errcount, 824 (type == HW_EVENT_ERR_UNCORRECTED) ? "UE" : "CE", 825 errcount > 1 ? "s" : "", 826 mci->fake_inject_layer[0], 827 mci->fake_inject_layer[1], 828 mci->fake_inject_layer[2] 829 ); 830 edac_mc_handle_error(type, mci, errcount, 0, 0, 0, 831 mci->fake_inject_layer[0], 832 mci->fake_inject_layer[1], 833 mci->fake_inject_layer[2], 834 "FAKE ERROR", "for EDAC testing only"); 835 836 return count; 837 } 838 839 static const struct file_operations debug_fake_inject_fops = { 840 .open = simple_open, 841 .write = edac_fake_inject_write, 842 .llseek = generic_file_llseek, 843 }; 844 #endif 845 846 /* default Control file */ 847 DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store); 848 849 /* default Attribute files */ 850 DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL); 851 DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL); 852 DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL); 853 DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL); 854 DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL); 855 DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL); 856 DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL); 857 DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL); 858 859 /* memory scrubber attribute file */ 860 DEVICE_ATTR(sdram_scrub_rate, 0, NULL, NULL); 861 862 static struct attribute *mci_attrs[] = { 863 &dev_attr_reset_counters.attr, 864 &dev_attr_mc_name.attr, 865 &dev_attr_size_mb.attr, 866 &dev_attr_seconds_since_reset.attr, 867 &dev_attr_ue_noinfo_count.attr, 868 &dev_attr_ce_noinfo_count.attr, 869 &dev_attr_ue_count.attr, 870 &dev_attr_ce_count.attr, 871 &dev_attr_max_location.attr, 872 NULL 873 }; 874 875 static struct attribute_group mci_attr_grp = { 876 .attrs = mci_attrs, 877 }; 878 879 static const struct attribute_group *mci_attr_groups[] = { 880 &mci_attr_grp, 881 NULL 882 }; 883 884 static void mci_attr_release(struct device *dev) 885 { 886 struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev); 887 888 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev)); 889 kfree(mci); 890 } 891 892 static struct device_type mci_attr_type = { 893 .groups = mci_attr_groups, 894 .release = mci_attr_release, 895 }; 896 897 #ifdef CONFIG_EDAC_DEBUG 898 static struct dentry *edac_debugfs; 899 900 int __init edac_debugfs_init(void) 901 { 902 edac_debugfs = debugfs_create_dir("edac", NULL); 903 if (IS_ERR(edac_debugfs)) { 904 edac_debugfs = NULL; 905 return -ENOMEM; 906 } 907 return 0; 908 } 909 910 void __exit edac_debugfs_exit(void) 911 { 912 debugfs_remove(edac_debugfs); 913 } 914 915 int edac_create_debug_nodes(struct mem_ctl_info *mci) 916 { 917 struct dentry *d, *parent; 918 char name[80]; 919 int i; 920 921 if (!edac_debugfs) 922 return -ENODEV; 923 924 d = debugfs_create_dir(mci->dev.kobj.name, edac_debugfs); 925 if (!d) 926 return -ENOMEM; 927 parent = d; 928 929 for (i = 0; i < mci->n_layers; i++) { 930 sprintf(name, "fake_inject_%s", 931 edac_layer_name[mci->layers[i].type]); 932 d = debugfs_create_u8(name, S_IRUGO | S_IWUSR, parent, 933 &mci->fake_inject_layer[i]); 934 if (!d) 935 goto nomem; 936 } 937 938 d = debugfs_create_bool("fake_inject_ue", S_IRUGO | S_IWUSR, parent, 939 &mci->fake_inject_ue); 940 if (!d) 941 goto nomem; 942 943 d = debugfs_create_u16("fake_inject_count", S_IRUGO | S_IWUSR, parent, 944 &mci->fake_inject_count); 945 if (!d) 946 goto nomem; 947 948 d = debugfs_create_file("fake_inject", S_IWUSR, parent, 949 &mci->dev, 950 &debug_fake_inject_fops); 951 if (!d) 952 goto nomem; 953 954 mci->debugfs = parent; 955 return 0; 956 nomem: 957 debugfs_remove(mci->debugfs); 958 return -ENOMEM; 959 } 960 #endif 961 962 /* 963 * Create a new Memory Controller kobject instance, 964 * mc<id> under the 'mc' directory 965 * 966 * Return: 967 * 0 Success 968 * !0 Failure 969 */ 970 int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) 971 { 972 int i, err; 973 974 /* 975 * The memory controller needs its own bus, in order to avoid 976 * namespace conflicts at /sys/bus/edac. 977 */ 978 mci->bus->name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx); 979 if (!mci->bus->name) 980 return -ENOMEM; 981 982 edac_dbg(0, "creating bus %s\n", mci->bus->name); 983 984 err = bus_register(mci->bus); 985 if (err < 0) 986 return err; 987 988 /* get the /sys/devices/system/edac subsys reference */ 989 mci->dev.type = &mci_attr_type; 990 device_initialize(&mci->dev); 991 992 mci->dev.parent = mci_pdev; 993 mci->dev.bus = mci->bus; 994 dev_set_name(&mci->dev, "mc%d", mci->mc_idx); 995 dev_set_drvdata(&mci->dev, mci); 996 pm_runtime_forbid(&mci->dev); 997 998 edac_dbg(0, "creating device %s\n", dev_name(&mci->dev)); 999 err = device_add(&mci->dev); 1000 if (err < 0) { 1001 edac_dbg(1, "failure: create device %s\n", dev_name(&mci->dev)); 1002 bus_unregister(mci->bus); 1003 kfree(mci->bus->name); 1004 return err; 1005 } 1006 1007 if (mci->set_sdram_scrub_rate || mci->get_sdram_scrub_rate) { 1008 if (mci->get_sdram_scrub_rate) { 1009 dev_attr_sdram_scrub_rate.attr.mode |= S_IRUGO; 1010 dev_attr_sdram_scrub_rate.show = &mci_sdram_scrub_rate_show; 1011 } 1012 if (mci->set_sdram_scrub_rate) { 1013 dev_attr_sdram_scrub_rate.attr.mode |= S_IWUSR; 1014 dev_attr_sdram_scrub_rate.store = &mci_sdram_scrub_rate_store; 1015 } 1016 err = device_create_file(&mci->dev, 1017 &dev_attr_sdram_scrub_rate); 1018 if (err) { 1019 edac_dbg(1, "failure: create sdram_scrub_rate\n"); 1020 goto fail2; 1021 } 1022 } 1023 /* 1024 * Create the dimm/rank devices 1025 */ 1026 for (i = 0; i < mci->tot_dimms; i++) { 1027 struct dimm_info *dimm = mci->dimms[i]; 1028 /* Only expose populated DIMMs */ 1029 if (dimm->nr_pages == 0) 1030 continue; 1031 #ifdef CONFIG_EDAC_DEBUG 1032 edac_dbg(1, "creating dimm%d, located at ", i); 1033 if (edac_debug_level >= 1) { 1034 int lay; 1035 for (lay = 0; lay < mci->n_layers; lay++) 1036 printk(KERN_CONT "%s %d ", 1037 edac_layer_name[mci->layers[lay].type], 1038 dimm->location[lay]); 1039 printk(KERN_CONT "\n"); 1040 } 1041 #endif 1042 err = edac_create_dimm_object(mci, dimm, i); 1043 if (err) { 1044 edac_dbg(1, "failure: create dimm %d obj\n", i); 1045 goto fail; 1046 } 1047 } 1048 1049 #ifdef CONFIG_EDAC_LEGACY_SYSFS 1050 err = edac_create_csrow_objects(mci); 1051 if (err < 0) 1052 goto fail; 1053 #endif 1054 1055 #ifdef CONFIG_EDAC_DEBUG 1056 edac_create_debug_nodes(mci); 1057 #endif 1058 return 0; 1059 1060 fail: 1061 for (i--; i >= 0; i--) { 1062 struct dimm_info *dimm = mci->dimms[i]; 1063 if (dimm->nr_pages == 0) 1064 continue; 1065 device_unregister(&dimm->dev); 1066 } 1067 fail2: 1068 device_unregister(&mci->dev); 1069 bus_unregister(mci->bus); 1070 kfree(mci->bus->name); 1071 return err; 1072 } 1073 1074 /* 1075 * remove a Memory Controller instance 1076 */ 1077 void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci) 1078 { 1079 int i; 1080 1081 edac_dbg(0, "\n"); 1082 1083 #ifdef CONFIG_EDAC_DEBUG 1084 debugfs_remove(mci->debugfs); 1085 #endif 1086 #ifdef CONFIG_EDAC_LEGACY_SYSFS 1087 edac_delete_csrow_objects(mci); 1088 #endif 1089 1090 for (i = 0; i < mci->tot_dimms; i++) { 1091 struct dimm_info *dimm = mci->dimms[i]; 1092 if (dimm->nr_pages == 0) 1093 continue; 1094 edac_dbg(0, "removing device %s\n", dev_name(&dimm->dev)); 1095 device_unregister(&dimm->dev); 1096 } 1097 } 1098 1099 void edac_unregister_sysfs(struct mem_ctl_info *mci) 1100 { 1101 edac_dbg(1, "Unregistering device %s\n", dev_name(&mci->dev)); 1102 device_unregister(&mci->dev); 1103 bus_unregister(mci->bus); 1104 kfree(mci->bus->name); 1105 } 1106 1107 static void mc_attr_release(struct device *dev) 1108 { 1109 /* 1110 * There's no container structure here, as this is just the mci 1111 * parent device, used to create the /sys/devices/mc sysfs node. 1112 * So, there are no attributes on it. 1113 */ 1114 edac_dbg(1, "Releasing device %s\n", dev_name(dev)); 1115 kfree(dev); 1116 } 1117 1118 static struct device_type mc_attr_type = { 1119 .release = mc_attr_release, 1120 }; 1121 /* 1122 * Init/exit code for the module. Basically, creates/removes /sys/class/rc 1123 */ 1124 int __init edac_mc_sysfs_init(void) 1125 { 1126 struct bus_type *edac_subsys; 1127 int err; 1128 1129 /* get the /sys/devices/system/edac subsys reference */ 1130 edac_subsys = edac_get_sysfs_subsys(); 1131 if (edac_subsys == NULL) { 1132 edac_dbg(1, "no edac_subsys\n"); 1133 err = -EINVAL; 1134 goto out; 1135 } 1136 1137 mci_pdev = kzalloc(sizeof(*mci_pdev), GFP_KERNEL); 1138 if (!mci_pdev) { 1139 err = -ENOMEM; 1140 goto out_put_sysfs; 1141 } 1142 1143 mci_pdev->bus = edac_subsys; 1144 mci_pdev->type = &mc_attr_type; 1145 device_initialize(mci_pdev); 1146 dev_set_name(mci_pdev, "mc"); 1147 1148 err = device_add(mci_pdev); 1149 if (err < 0) 1150 goto out_dev_free; 1151 1152 edac_dbg(0, "device %s created\n", dev_name(mci_pdev)); 1153 1154 return 0; 1155 1156 out_dev_free: 1157 kfree(mci_pdev); 1158 out_put_sysfs: 1159 edac_put_sysfs_subsys(); 1160 out: 1161 return err; 1162 } 1163 1164 void __exit edac_mc_sysfs_exit(void) 1165 { 1166 device_unregister(mci_pdev); 1167 edac_put_sysfs_subsys(); 1168 } 1169