1 /* 2 * edac_mc kernel module 3 * (C) 2005-2007 Linux Networx (http://lnxi.com) 4 * 5 * This file may be distributed under the terms of the 6 * GNU General Public License. 7 * 8 * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com 9 * 10 * (c) 2012-2013 - Mauro Carvalho Chehab <mchehab@redhat.com> 11 * The entire API were re-written, and ported to use struct device 12 * 13 */ 14 15 #include <linux/ctype.h> 16 #include <linux/slab.h> 17 #include <linux/edac.h> 18 #include <linux/bug.h> 19 #include <linux/pm_runtime.h> 20 #include <linux/uaccess.h> 21 22 #include "edac_core.h" 23 #include "edac_module.h" 24 25 /* MC EDAC Controls, setable by module parameter, and sysfs */ 26 static int edac_mc_log_ue = 1; 27 static int edac_mc_log_ce = 1; 28 static int edac_mc_panic_on_ue; 29 static int edac_mc_poll_msec = 1000; 30 31 /* Getter functions for above */ 32 int edac_mc_get_log_ue(void) 33 { 34 return edac_mc_log_ue; 35 } 36 37 int edac_mc_get_log_ce(void) 38 { 39 return edac_mc_log_ce; 40 } 41 42 int edac_mc_get_panic_on_ue(void) 43 { 44 return edac_mc_panic_on_ue; 45 } 46 47 /* this is temporary */ 48 int edac_mc_get_poll_msec(void) 49 { 50 return edac_mc_poll_msec; 51 } 52 53 static int edac_set_poll_msec(const char *val, struct kernel_param *kp) 54 { 55 unsigned long l; 56 int ret; 57 58 if (!val) 59 return -EINVAL; 60 61 ret = kstrtoul(val, 0, &l); 62 if (ret) 63 return ret; 64 65 if (l < 1000) 66 return -EINVAL; 67 68 *((unsigned long *)kp->arg) = l; 69 70 /* notify edac_mc engine to reset the poll period */ 71 edac_mc_reset_delay_period(l); 72 73 return 0; 74 } 75 76 /* Parameter declarations for above */ 77 module_param(edac_mc_panic_on_ue, int, 0644); 78 MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on"); 79 module_param(edac_mc_log_ue, int, 0644); 80 MODULE_PARM_DESC(edac_mc_log_ue, 81 "Log uncorrectable error to console: 0=off 1=on"); 82 module_param(edac_mc_log_ce, int, 0644); 83 MODULE_PARM_DESC(edac_mc_log_ce, 84 "Log correctable error to console: 0=off 1=on"); 85 module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int, 86 &edac_mc_poll_msec, 0644); 87 MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds"); 88 89 static struct device *mci_pdev; 90 91 /* 92 * various constants for Memory Controllers 93 */ 94 static const char * const mem_types[] = { 95 [MEM_EMPTY] = "Empty", 96 [MEM_RESERVED] = "Reserved", 97 [MEM_UNKNOWN] = "Unknown", 98 [MEM_FPM] = "FPM", 99 [MEM_EDO] = "EDO", 100 [MEM_BEDO] = "BEDO", 101 [MEM_SDR] = "Unbuffered-SDR", 102 [MEM_RDR] = "Registered-SDR", 103 [MEM_DDR] = "Unbuffered-DDR", 104 [MEM_RDDR] = "Registered-DDR", 105 [MEM_RMBS] = "RMBS", 106 [MEM_DDR2] = "Unbuffered-DDR2", 107 [MEM_FB_DDR2] = "FullyBuffered-DDR2", 108 [MEM_RDDR2] = "Registered-DDR2", 109 [MEM_XDR] = "XDR", 110 [MEM_DDR3] = "Unbuffered-DDR3", 111 [MEM_RDDR3] = "Registered-DDR3" 112 }; 113 114 static const char * const dev_types[] = { 115 [DEV_UNKNOWN] = "Unknown", 116 [DEV_X1] = "x1", 117 [DEV_X2] = "x2", 118 [DEV_X4] = "x4", 119 [DEV_X8] = "x8", 120 [DEV_X16] = "x16", 121 [DEV_X32] = "x32", 122 [DEV_X64] = "x64" 123 }; 124 125 static const char * const edac_caps[] = { 126 [EDAC_UNKNOWN] = "Unknown", 127 [EDAC_NONE] = "None", 128 [EDAC_RESERVED] = "Reserved", 129 [EDAC_PARITY] = "PARITY", 130 [EDAC_EC] = "EC", 131 [EDAC_SECDED] = "SECDED", 132 [EDAC_S2ECD2ED] = "S2ECD2ED", 133 [EDAC_S4ECD4ED] = "S4ECD4ED", 134 [EDAC_S8ECD8ED] = "S8ECD8ED", 135 [EDAC_S16ECD16ED] = "S16ECD16ED" 136 }; 137 138 #ifdef CONFIG_EDAC_LEGACY_SYSFS 139 /* 140 * EDAC sysfs CSROW data structures and methods 141 */ 142 143 #define to_csrow(k) container_of(k, struct csrow_info, dev) 144 145 /* 146 * We need it to avoid namespace conflicts between the legacy API 147 * and the per-dimm/per-rank one 148 */ 149 #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \ 150 static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store) 151 152 struct dev_ch_attribute { 153 struct device_attribute attr; 154 int channel; 155 }; 156 157 #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \ 158 struct dev_ch_attribute dev_attr_legacy_##_name = \ 159 { __ATTR(_name, _mode, _show, _store), (_var) } 160 161 #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel) 162 163 /* Set of more default csrow<id> attribute show/store functions */ 164 static ssize_t csrow_ue_count_show(struct device *dev, 165 struct device_attribute *mattr, char *data) 166 { 167 struct csrow_info *csrow = to_csrow(dev); 168 169 return sprintf(data, "%u\n", csrow->ue_count); 170 } 171 172 static ssize_t csrow_ce_count_show(struct device *dev, 173 struct device_attribute *mattr, char *data) 174 { 175 struct csrow_info *csrow = to_csrow(dev); 176 177 return sprintf(data, "%u\n", csrow->ce_count); 178 } 179 180 static ssize_t csrow_size_show(struct device *dev, 181 struct device_attribute *mattr, char *data) 182 { 183 struct csrow_info *csrow = to_csrow(dev); 184 int i; 185 u32 nr_pages = 0; 186 187 for (i = 0; i < csrow->nr_channels; i++) 188 nr_pages += csrow->channels[i]->dimm->nr_pages; 189 return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages)); 190 } 191 192 static ssize_t csrow_mem_type_show(struct device *dev, 193 struct device_attribute *mattr, char *data) 194 { 195 struct csrow_info *csrow = to_csrow(dev); 196 197 return sprintf(data, "%s\n", mem_types[csrow->channels[0]->dimm->mtype]); 198 } 199 200 static ssize_t csrow_dev_type_show(struct device *dev, 201 struct device_attribute *mattr, char *data) 202 { 203 struct csrow_info *csrow = to_csrow(dev); 204 205 return sprintf(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]); 206 } 207 208 static ssize_t csrow_edac_mode_show(struct device *dev, 209 struct device_attribute *mattr, 210 char *data) 211 { 212 struct csrow_info *csrow = to_csrow(dev); 213 214 return sprintf(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]); 215 } 216 217 /* show/store functions for DIMM Label attributes */ 218 static ssize_t channel_dimm_label_show(struct device *dev, 219 struct device_attribute *mattr, 220 char *data) 221 { 222 struct csrow_info *csrow = to_csrow(dev); 223 unsigned chan = to_channel(mattr); 224 struct rank_info *rank = csrow->channels[chan]; 225 226 /* if field has not been initialized, there is nothing to send */ 227 if (!rank->dimm->label[0]) 228 return 0; 229 230 return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", 231 rank->dimm->label); 232 } 233 234 static ssize_t channel_dimm_label_store(struct device *dev, 235 struct device_attribute *mattr, 236 const char *data, size_t count) 237 { 238 struct csrow_info *csrow = to_csrow(dev); 239 unsigned chan = to_channel(mattr); 240 struct rank_info *rank = csrow->channels[chan]; 241 242 ssize_t max_size = 0; 243 244 max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1); 245 strncpy(rank->dimm->label, data, max_size); 246 rank->dimm->label[max_size] = '\0'; 247 248 return max_size; 249 } 250 251 /* show function for dynamic chX_ce_count attribute */ 252 static ssize_t channel_ce_count_show(struct device *dev, 253 struct device_attribute *mattr, char *data) 254 { 255 struct csrow_info *csrow = to_csrow(dev); 256 unsigned chan = to_channel(mattr); 257 struct rank_info *rank = csrow->channels[chan]; 258 259 return sprintf(data, "%u\n", rank->ce_count); 260 } 261 262 /* cwrow<id>/attribute files */ 263 DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL); 264 DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL); 265 DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL); 266 DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL); 267 DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL); 268 DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL); 269 270 /* default attributes of the CSROW<id> object */ 271 static struct attribute *csrow_attrs[] = { 272 &dev_attr_legacy_dev_type.attr, 273 &dev_attr_legacy_mem_type.attr, 274 &dev_attr_legacy_edac_mode.attr, 275 &dev_attr_legacy_size_mb.attr, 276 &dev_attr_legacy_ue_count.attr, 277 &dev_attr_legacy_ce_count.attr, 278 NULL, 279 }; 280 281 static struct attribute_group csrow_attr_grp = { 282 .attrs = csrow_attrs, 283 }; 284 285 static const struct attribute_group *csrow_attr_groups[] = { 286 &csrow_attr_grp, 287 NULL 288 }; 289 290 static void csrow_attr_release(struct device *dev) 291 { 292 struct csrow_info *csrow = container_of(dev, struct csrow_info, dev); 293 294 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev)); 295 kfree(csrow); 296 } 297 298 static struct device_type csrow_attr_type = { 299 .groups = csrow_attr_groups, 300 .release = csrow_attr_release, 301 }; 302 303 /* 304 * possible dynamic channel DIMM Label attribute files 305 * 306 */ 307 308 #define EDAC_NR_CHANNELS 6 309 310 DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR, 311 channel_dimm_label_show, channel_dimm_label_store, 0); 312 DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR, 313 channel_dimm_label_show, channel_dimm_label_store, 1); 314 DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR, 315 channel_dimm_label_show, channel_dimm_label_store, 2); 316 DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR, 317 channel_dimm_label_show, channel_dimm_label_store, 3); 318 DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR, 319 channel_dimm_label_show, channel_dimm_label_store, 4); 320 DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR, 321 channel_dimm_label_show, channel_dimm_label_store, 5); 322 323 /* Total possible dynamic DIMM Label attribute file table */ 324 static struct device_attribute *dynamic_csrow_dimm_attr[] = { 325 &dev_attr_legacy_ch0_dimm_label.attr, 326 &dev_attr_legacy_ch1_dimm_label.attr, 327 &dev_attr_legacy_ch2_dimm_label.attr, 328 &dev_attr_legacy_ch3_dimm_label.attr, 329 &dev_attr_legacy_ch4_dimm_label.attr, 330 &dev_attr_legacy_ch5_dimm_label.attr 331 }; 332 333 /* possible dynamic channel ce_count attribute files */ 334 DEVICE_CHANNEL(ch0_ce_count, S_IRUGO, 335 channel_ce_count_show, NULL, 0); 336 DEVICE_CHANNEL(ch1_ce_count, S_IRUGO, 337 channel_ce_count_show, NULL, 1); 338 DEVICE_CHANNEL(ch2_ce_count, S_IRUGO, 339 channel_ce_count_show, NULL, 2); 340 DEVICE_CHANNEL(ch3_ce_count, S_IRUGO, 341 channel_ce_count_show, NULL, 3); 342 DEVICE_CHANNEL(ch4_ce_count, S_IRUGO, 343 channel_ce_count_show, NULL, 4); 344 DEVICE_CHANNEL(ch5_ce_count, S_IRUGO, 345 channel_ce_count_show, NULL, 5); 346 347 /* Total possible dynamic ce_count attribute file table */ 348 static struct device_attribute *dynamic_csrow_ce_count_attr[] = { 349 &dev_attr_legacy_ch0_ce_count.attr, 350 &dev_attr_legacy_ch1_ce_count.attr, 351 &dev_attr_legacy_ch2_ce_count.attr, 352 &dev_attr_legacy_ch3_ce_count.attr, 353 &dev_attr_legacy_ch4_ce_count.attr, 354 &dev_attr_legacy_ch5_ce_count.attr 355 }; 356 357 static inline int nr_pages_per_csrow(struct csrow_info *csrow) 358 { 359 int chan, nr_pages = 0; 360 361 for (chan = 0; chan < csrow->nr_channels; chan++) 362 nr_pages += csrow->channels[chan]->dimm->nr_pages; 363 364 return nr_pages; 365 } 366 367 /* Create a CSROW object under specifed edac_mc_device */ 368 static int edac_create_csrow_object(struct mem_ctl_info *mci, 369 struct csrow_info *csrow, int index) 370 { 371 int err, chan; 372 373 if (csrow->nr_channels >= EDAC_NR_CHANNELS) 374 return -ENODEV; 375 376 csrow->dev.type = &csrow_attr_type; 377 csrow->dev.bus = mci->bus; 378 device_initialize(&csrow->dev); 379 csrow->dev.parent = &mci->dev; 380 csrow->mci = mci; 381 dev_set_name(&csrow->dev, "csrow%d", index); 382 dev_set_drvdata(&csrow->dev, csrow); 383 384 edac_dbg(0, "creating (virtual) csrow node %s\n", 385 dev_name(&csrow->dev)); 386 387 err = device_add(&csrow->dev); 388 if (err < 0) 389 return err; 390 391 for (chan = 0; chan < csrow->nr_channels; chan++) { 392 /* Only expose populated DIMMs */ 393 if (!csrow->channels[chan]->dimm->nr_pages) 394 continue; 395 err = device_create_file(&csrow->dev, 396 dynamic_csrow_dimm_attr[chan]); 397 if (err < 0) 398 goto error; 399 err = device_create_file(&csrow->dev, 400 dynamic_csrow_ce_count_attr[chan]); 401 if (err < 0) { 402 device_remove_file(&csrow->dev, 403 dynamic_csrow_dimm_attr[chan]); 404 goto error; 405 } 406 } 407 408 return 0; 409 410 error: 411 for (--chan; chan >= 0; chan--) { 412 device_remove_file(&csrow->dev, 413 dynamic_csrow_dimm_attr[chan]); 414 device_remove_file(&csrow->dev, 415 dynamic_csrow_ce_count_attr[chan]); 416 } 417 put_device(&csrow->dev); 418 419 return err; 420 } 421 422 /* Create a CSROW object under specifed edac_mc_device */ 423 static int edac_create_csrow_objects(struct mem_ctl_info *mci) 424 { 425 int err, i, chan; 426 struct csrow_info *csrow; 427 428 for (i = 0; i < mci->nr_csrows; i++) { 429 csrow = mci->csrows[i]; 430 if (!nr_pages_per_csrow(csrow)) 431 continue; 432 err = edac_create_csrow_object(mci, mci->csrows[i], i); 433 if (err < 0) { 434 edac_dbg(1, 435 "failure: create csrow objects for csrow %d\n", 436 i); 437 goto error; 438 } 439 } 440 return 0; 441 442 error: 443 for (--i; i >= 0; i--) { 444 csrow = mci->csrows[i]; 445 if (!nr_pages_per_csrow(csrow)) 446 continue; 447 for (chan = csrow->nr_channels - 1; chan >= 0; chan--) { 448 if (!csrow->channels[chan]->dimm->nr_pages) 449 continue; 450 device_remove_file(&csrow->dev, 451 dynamic_csrow_dimm_attr[chan]); 452 device_remove_file(&csrow->dev, 453 dynamic_csrow_ce_count_attr[chan]); 454 } 455 put_device(&mci->csrows[i]->dev); 456 } 457 458 return err; 459 } 460 461 static void edac_delete_csrow_objects(struct mem_ctl_info *mci) 462 { 463 int i, chan; 464 struct csrow_info *csrow; 465 466 for (i = mci->nr_csrows - 1; i >= 0; i--) { 467 csrow = mci->csrows[i]; 468 if (!nr_pages_per_csrow(csrow)) 469 continue; 470 for (chan = csrow->nr_channels - 1; chan >= 0; chan--) { 471 if (!csrow->channels[chan]->dimm->nr_pages) 472 continue; 473 edac_dbg(1, "Removing csrow %d channel %d sysfs nodes\n", 474 i, chan); 475 device_remove_file(&csrow->dev, 476 dynamic_csrow_dimm_attr[chan]); 477 device_remove_file(&csrow->dev, 478 dynamic_csrow_ce_count_attr[chan]); 479 } 480 device_unregister(&mci->csrows[i]->dev); 481 } 482 } 483 #endif 484 485 /* 486 * Per-dimm (or per-rank) devices 487 */ 488 489 #define to_dimm(k) container_of(k, struct dimm_info, dev) 490 491 /* show/store functions for DIMM Label attributes */ 492 static ssize_t dimmdev_location_show(struct device *dev, 493 struct device_attribute *mattr, char *data) 494 { 495 struct dimm_info *dimm = to_dimm(dev); 496 497 return edac_dimm_info_location(dimm, data, PAGE_SIZE); 498 } 499 500 static ssize_t dimmdev_label_show(struct device *dev, 501 struct device_attribute *mattr, char *data) 502 { 503 struct dimm_info *dimm = to_dimm(dev); 504 505 /* if field has not been initialized, there is nothing to send */ 506 if (!dimm->label[0]) 507 return 0; 508 509 return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", dimm->label); 510 } 511 512 static ssize_t dimmdev_label_store(struct device *dev, 513 struct device_attribute *mattr, 514 const char *data, 515 size_t count) 516 { 517 struct dimm_info *dimm = to_dimm(dev); 518 519 ssize_t max_size = 0; 520 521 max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1); 522 strncpy(dimm->label, data, max_size); 523 dimm->label[max_size] = '\0'; 524 525 return max_size; 526 } 527 528 static ssize_t dimmdev_size_show(struct device *dev, 529 struct device_attribute *mattr, char *data) 530 { 531 struct dimm_info *dimm = to_dimm(dev); 532 533 return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages)); 534 } 535 536 static ssize_t dimmdev_mem_type_show(struct device *dev, 537 struct device_attribute *mattr, char *data) 538 { 539 struct dimm_info *dimm = to_dimm(dev); 540 541 return sprintf(data, "%s\n", mem_types[dimm->mtype]); 542 } 543 544 static ssize_t dimmdev_dev_type_show(struct device *dev, 545 struct device_attribute *mattr, char *data) 546 { 547 struct dimm_info *dimm = to_dimm(dev); 548 549 return sprintf(data, "%s\n", dev_types[dimm->dtype]); 550 } 551 552 static ssize_t dimmdev_edac_mode_show(struct device *dev, 553 struct device_attribute *mattr, 554 char *data) 555 { 556 struct dimm_info *dimm = to_dimm(dev); 557 558 return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]); 559 } 560 561 /* dimm/rank attribute files */ 562 static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR, 563 dimmdev_label_show, dimmdev_label_store); 564 static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL); 565 static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL); 566 static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL); 567 static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL); 568 static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL); 569 570 /* attributes of the dimm<id>/rank<id> object */ 571 static struct attribute *dimm_attrs[] = { 572 &dev_attr_dimm_label.attr, 573 &dev_attr_dimm_location.attr, 574 &dev_attr_size.attr, 575 &dev_attr_dimm_mem_type.attr, 576 &dev_attr_dimm_dev_type.attr, 577 &dev_attr_dimm_edac_mode.attr, 578 NULL, 579 }; 580 581 static struct attribute_group dimm_attr_grp = { 582 .attrs = dimm_attrs, 583 }; 584 585 static const struct attribute_group *dimm_attr_groups[] = { 586 &dimm_attr_grp, 587 NULL 588 }; 589 590 static void dimm_attr_release(struct device *dev) 591 { 592 struct dimm_info *dimm = container_of(dev, struct dimm_info, dev); 593 594 edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev)); 595 kfree(dimm); 596 } 597 598 static struct device_type dimm_attr_type = { 599 .groups = dimm_attr_groups, 600 .release = dimm_attr_release, 601 }; 602 603 /* Create a DIMM object under specifed memory controller device */ 604 static int edac_create_dimm_object(struct mem_ctl_info *mci, 605 struct dimm_info *dimm, 606 int index) 607 { 608 int err; 609 dimm->mci = mci; 610 611 dimm->dev.type = &dimm_attr_type; 612 dimm->dev.bus = mci->bus; 613 device_initialize(&dimm->dev); 614 615 dimm->dev.parent = &mci->dev; 616 if (mci->csbased) 617 dev_set_name(&dimm->dev, "rank%d", index); 618 else 619 dev_set_name(&dimm->dev, "dimm%d", index); 620 dev_set_drvdata(&dimm->dev, dimm); 621 pm_runtime_forbid(&mci->dev); 622 623 err = device_add(&dimm->dev); 624 625 edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm->dev)); 626 627 return err; 628 } 629 630 /* 631 * Memory controller device 632 */ 633 634 #define to_mci(k) container_of(k, struct mem_ctl_info, dev) 635 636 static ssize_t mci_reset_counters_store(struct device *dev, 637 struct device_attribute *mattr, 638 const char *data, size_t count) 639 { 640 struct mem_ctl_info *mci = to_mci(dev); 641 int cnt, row, chan, i; 642 mci->ue_mc = 0; 643 mci->ce_mc = 0; 644 mci->ue_noinfo_count = 0; 645 mci->ce_noinfo_count = 0; 646 647 for (row = 0; row < mci->nr_csrows; row++) { 648 struct csrow_info *ri = mci->csrows[row]; 649 650 ri->ue_count = 0; 651 ri->ce_count = 0; 652 653 for (chan = 0; chan < ri->nr_channels; chan++) 654 ri->channels[chan]->ce_count = 0; 655 } 656 657 cnt = 1; 658 for (i = 0; i < mci->n_layers; i++) { 659 cnt *= mci->layers[i].size; 660 memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32)); 661 memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32)); 662 } 663 664 mci->start_time = jiffies; 665 return count; 666 } 667 668 /* Memory scrubbing interface: 669 * 670 * A MC driver can limit the scrubbing bandwidth based on the CPU type. 671 * Therefore, ->set_sdram_scrub_rate should be made to return the actual 672 * bandwidth that is accepted or 0 when scrubbing is to be disabled. 673 * 674 * Negative value still means that an error has occurred while setting 675 * the scrub rate. 676 */ 677 static ssize_t mci_sdram_scrub_rate_store(struct device *dev, 678 struct device_attribute *mattr, 679 const char *data, size_t count) 680 { 681 struct mem_ctl_info *mci = to_mci(dev); 682 unsigned long bandwidth = 0; 683 int new_bw = 0; 684 685 if (kstrtoul(data, 10, &bandwidth) < 0) 686 return -EINVAL; 687 688 new_bw = mci->set_sdram_scrub_rate(mci, bandwidth); 689 if (new_bw < 0) { 690 edac_printk(KERN_WARNING, EDAC_MC, 691 "Error setting scrub rate to: %lu\n", bandwidth); 692 return -EINVAL; 693 } 694 695 return count; 696 } 697 698 /* 699 * ->get_sdram_scrub_rate() return value semantics same as above. 700 */ 701 static ssize_t mci_sdram_scrub_rate_show(struct device *dev, 702 struct device_attribute *mattr, 703 char *data) 704 { 705 struct mem_ctl_info *mci = to_mci(dev); 706 int bandwidth = 0; 707 708 bandwidth = mci->get_sdram_scrub_rate(mci); 709 if (bandwidth < 0) { 710 edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n"); 711 return bandwidth; 712 } 713 714 return sprintf(data, "%d\n", bandwidth); 715 } 716 717 /* default attribute files for the MCI object */ 718 static ssize_t mci_ue_count_show(struct device *dev, 719 struct device_attribute *mattr, 720 char *data) 721 { 722 struct mem_ctl_info *mci = to_mci(dev); 723 724 return sprintf(data, "%d\n", mci->ue_mc); 725 } 726 727 static ssize_t mci_ce_count_show(struct device *dev, 728 struct device_attribute *mattr, 729 char *data) 730 { 731 struct mem_ctl_info *mci = to_mci(dev); 732 733 return sprintf(data, "%d\n", mci->ce_mc); 734 } 735 736 static ssize_t mci_ce_noinfo_show(struct device *dev, 737 struct device_attribute *mattr, 738 char *data) 739 { 740 struct mem_ctl_info *mci = to_mci(dev); 741 742 return sprintf(data, "%d\n", mci->ce_noinfo_count); 743 } 744 745 static ssize_t mci_ue_noinfo_show(struct device *dev, 746 struct device_attribute *mattr, 747 char *data) 748 { 749 struct mem_ctl_info *mci = to_mci(dev); 750 751 return sprintf(data, "%d\n", mci->ue_noinfo_count); 752 } 753 754 static ssize_t mci_seconds_show(struct device *dev, 755 struct device_attribute *mattr, 756 char *data) 757 { 758 struct mem_ctl_info *mci = to_mci(dev); 759 760 return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ); 761 } 762 763 static ssize_t mci_ctl_name_show(struct device *dev, 764 struct device_attribute *mattr, 765 char *data) 766 { 767 struct mem_ctl_info *mci = to_mci(dev); 768 769 return sprintf(data, "%s\n", mci->ctl_name); 770 } 771 772 static ssize_t mci_size_mb_show(struct device *dev, 773 struct device_attribute *mattr, 774 char *data) 775 { 776 struct mem_ctl_info *mci = to_mci(dev); 777 int total_pages = 0, csrow_idx, j; 778 779 for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) { 780 struct csrow_info *csrow = mci->csrows[csrow_idx]; 781 782 for (j = 0; j < csrow->nr_channels; j++) { 783 struct dimm_info *dimm = csrow->channels[j]->dimm; 784 785 total_pages += dimm->nr_pages; 786 } 787 } 788 789 return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages)); 790 } 791 792 static ssize_t mci_max_location_show(struct device *dev, 793 struct device_attribute *mattr, 794 char *data) 795 { 796 struct mem_ctl_info *mci = to_mci(dev); 797 int i; 798 char *p = data; 799 800 for (i = 0; i < mci->n_layers; i++) { 801 p += sprintf(p, "%s %d ", 802 edac_layer_name[mci->layers[i].type], 803 mci->layers[i].size - 1); 804 } 805 806 return p - data; 807 } 808 809 #ifdef CONFIG_EDAC_DEBUG 810 static ssize_t edac_fake_inject_write(struct file *file, 811 const char __user *data, 812 size_t count, loff_t *ppos) 813 { 814 struct device *dev = file->private_data; 815 struct mem_ctl_info *mci = to_mci(dev); 816 static enum hw_event_mc_err_type type; 817 u16 errcount = mci->fake_inject_count; 818 819 if (!errcount) 820 errcount = 1; 821 822 type = mci->fake_inject_ue ? HW_EVENT_ERR_UNCORRECTED 823 : HW_EVENT_ERR_CORRECTED; 824 825 printk(KERN_DEBUG 826 "Generating %d %s fake error%s to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n", 827 errcount, 828 (type == HW_EVENT_ERR_UNCORRECTED) ? "UE" : "CE", 829 errcount > 1 ? "s" : "", 830 mci->fake_inject_layer[0], 831 mci->fake_inject_layer[1], 832 mci->fake_inject_layer[2] 833 ); 834 edac_mc_handle_error(type, mci, errcount, 0, 0, 0, 835 mci->fake_inject_layer[0], 836 mci->fake_inject_layer[1], 837 mci->fake_inject_layer[2], 838 "FAKE ERROR", "for EDAC testing only"); 839 840 return count; 841 } 842 843 static const struct file_operations debug_fake_inject_fops = { 844 .open = simple_open, 845 .write = edac_fake_inject_write, 846 .llseek = generic_file_llseek, 847 }; 848 #endif 849 850 /* default Control file */ 851 DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store); 852 853 /* default Attribute files */ 854 DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL); 855 DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL); 856 DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL); 857 DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL); 858 DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL); 859 DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL); 860 DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL); 861 DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL); 862 863 /* memory scrubber attribute file */ 864 DEVICE_ATTR(sdram_scrub_rate, 0, NULL, NULL); 865 866 static struct attribute *mci_attrs[] = { 867 &dev_attr_reset_counters.attr, 868 &dev_attr_mc_name.attr, 869 &dev_attr_size_mb.attr, 870 &dev_attr_seconds_since_reset.attr, 871 &dev_attr_ue_noinfo_count.attr, 872 &dev_attr_ce_noinfo_count.attr, 873 &dev_attr_ue_count.attr, 874 &dev_attr_ce_count.attr, 875 &dev_attr_max_location.attr, 876 NULL 877 }; 878 879 static struct attribute_group mci_attr_grp = { 880 .attrs = mci_attrs, 881 }; 882 883 static const struct attribute_group *mci_attr_groups[] = { 884 &mci_attr_grp, 885 NULL 886 }; 887 888 static void mci_attr_release(struct device *dev) 889 { 890 struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev); 891 892 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev)); 893 kfree(mci); 894 } 895 896 static struct device_type mci_attr_type = { 897 .groups = mci_attr_groups, 898 .release = mci_attr_release, 899 }; 900 901 #ifdef CONFIG_EDAC_DEBUG 902 static struct dentry *edac_debugfs; 903 904 int __init edac_debugfs_init(void) 905 { 906 edac_debugfs = debugfs_create_dir("edac", NULL); 907 if (IS_ERR(edac_debugfs)) { 908 edac_debugfs = NULL; 909 return -ENOMEM; 910 } 911 return 0; 912 } 913 914 void __exit edac_debugfs_exit(void) 915 { 916 debugfs_remove(edac_debugfs); 917 } 918 919 static int edac_create_debug_nodes(struct mem_ctl_info *mci) 920 { 921 struct dentry *d, *parent; 922 char name[80]; 923 int i; 924 925 if (!edac_debugfs) 926 return -ENODEV; 927 928 d = debugfs_create_dir(mci->dev.kobj.name, edac_debugfs); 929 if (!d) 930 return -ENOMEM; 931 parent = d; 932 933 for (i = 0; i < mci->n_layers; i++) { 934 sprintf(name, "fake_inject_%s", 935 edac_layer_name[mci->layers[i].type]); 936 d = debugfs_create_u8(name, S_IRUGO | S_IWUSR, parent, 937 &mci->fake_inject_layer[i]); 938 if (!d) 939 goto nomem; 940 } 941 942 d = debugfs_create_bool("fake_inject_ue", S_IRUGO | S_IWUSR, parent, 943 &mci->fake_inject_ue); 944 if (!d) 945 goto nomem; 946 947 d = debugfs_create_u16("fake_inject_count", S_IRUGO | S_IWUSR, parent, 948 &mci->fake_inject_count); 949 if (!d) 950 goto nomem; 951 952 d = debugfs_create_file("fake_inject", S_IWUSR, parent, 953 &mci->dev, 954 &debug_fake_inject_fops); 955 if (!d) 956 goto nomem; 957 958 mci->debugfs = parent; 959 return 0; 960 nomem: 961 debugfs_remove(mci->debugfs); 962 return -ENOMEM; 963 } 964 #endif 965 966 /* 967 * Create a new Memory Controller kobject instance, 968 * mc<id> under the 'mc' directory 969 * 970 * Return: 971 * 0 Success 972 * !0 Failure 973 */ 974 int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) 975 { 976 int i, err; 977 978 /* 979 * The memory controller needs its own bus, in order to avoid 980 * namespace conflicts at /sys/bus/edac. 981 */ 982 mci->bus->name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx); 983 if (!mci->bus->name) 984 return -ENOMEM; 985 986 edac_dbg(0, "creating bus %s\n", mci->bus->name); 987 988 err = bus_register(mci->bus); 989 if (err < 0) 990 return err; 991 992 /* get the /sys/devices/system/edac subsys reference */ 993 mci->dev.type = &mci_attr_type; 994 device_initialize(&mci->dev); 995 996 mci->dev.parent = mci_pdev; 997 mci->dev.bus = mci->bus; 998 dev_set_name(&mci->dev, "mc%d", mci->mc_idx); 999 dev_set_drvdata(&mci->dev, mci); 1000 pm_runtime_forbid(&mci->dev); 1001 1002 edac_dbg(0, "creating device %s\n", dev_name(&mci->dev)); 1003 err = device_add(&mci->dev); 1004 if (err < 0) { 1005 edac_dbg(1, "failure: create device %s\n", dev_name(&mci->dev)); 1006 bus_unregister(mci->bus); 1007 kfree(mci->bus->name); 1008 return err; 1009 } 1010 1011 if (mci->set_sdram_scrub_rate || mci->get_sdram_scrub_rate) { 1012 if (mci->get_sdram_scrub_rate) { 1013 dev_attr_sdram_scrub_rate.attr.mode |= S_IRUGO; 1014 dev_attr_sdram_scrub_rate.show = &mci_sdram_scrub_rate_show; 1015 } 1016 if (mci->set_sdram_scrub_rate) { 1017 dev_attr_sdram_scrub_rate.attr.mode |= S_IWUSR; 1018 dev_attr_sdram_scrub_rate.store = &mci_sdram_scrub_rate_store; 1019 } 1020 err = device_create_file(&mci->dev, 1021 &dev_attr_sdram_scrub_rate); 1022 if (err) { 1023 edac_dbg(1, "failure: create sdram_scrub_rate\n"); 1024 goto fail2; 1025 } 1026 } 1027 /* 1028 * Create the dimm/rank devices 1029 */ 1030 for (i = 0; i < mci->tot_dimms; i++) { 1031 struct dimm_info *dimm = mci->dimms[i]; 1032 /* Only expose populated DIMMs */ 1033 if (dimm->nr_pages == 0) 1034 continue; 1035 #ifdef CONFIG_EDAC_DEBUG 1036 edac_dbg(1, "creating dimm%d, located at ", i); 1037 if (edac_debug_level >= 1) { 1038 int lay; 1039 for (lay = 0; lay < mci->n_layers; lay++) 1040 printk(KERN_CONT "%s %d ", 1041 edac_layer_name[mci->layers[lay].type], 1042 dimm->location[lay]); 1043 printk(KERN_CONT "\n"); 1044 } 1045 #endif 1046 err = edac_create_dimm_object(mci, dimm, i); 1047 if (err) { 1048 edac_dbg(1, "failure: create dimm %d obj\n", i); 1049 goto fail; 1050 } 1051 } 1052 1053 #ifdef CONFIG_EDAC_LEGACY_SYSFS 1054 err = edac_create_csrow_objects(mci); 1055 if (err < 0) 1056 goto fail; 1057 #endif 1058 1059 #ifdef CONFIG_EDAC_DEBUG 1060 edac_create_debug_nodes(mci); 1061 #endif 1062 return 0; 1063 1064 fail: 1065 for (i--; i >= 0; i--) { 1066 struct dimm_info *dimm = mci->dimms[i]; 1067 if (dimm->nr_pages == 0) 1068 continue; 1069 device_unregister(&dimm->dev); 1070 } 1071 fail2: 1072 device_unregister(&mci->dev); 1073 bus_unregister(mci->bus); 1074 kfree(mci->bus->name); 1075 return err; 1076 } 1077 1078 /* 1079 * remove a Memory Controller instance 1080 */ 1081 void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci) 1082 { 1083 int i; 1084 1085 edac_dbg(0, "\n"); 1086 1087 #ifdef CONFIG_EDAC_DEBUG 1088 debugfs_remove(mci->debugfs); 1089 #endif 1090 #ifdef CONFIG_EDAC_LEGACY_SYSFS 1091 edac_delete_csrow_objects(mci); 1092 #endif 1093 1094 for (i = 0; i < mci->tot_dimms; i++) { 1095 struct dimm_info *dimm = mci->dimms[i]; 1096 if (dimm->nr_pages == 0) 1097 continue; 1098 edac_dbg(0, "removing device %s\n", dev_name(&dimm->dev)); 1099 device_unregister(&dimm->dev); 1100 } 1101 } 1102 1103 void edac_unregister_sysfs(struct mem_ctl_info *mci) 1104 { 1105 edac_dbg(1, "Unregistering device %s\n", dev_name(&mci->dev)); 1106 device_unregister(&mci->dev); 1107 bus_unregister(mci->bus); 1108 kfree(mci->bus->name); 1109 } 1110 1111 static void mc_attr_release(struct device *dev) 1112 { 1113 /* 1114 * There's no container structure here, as this is just the mci 1115 * parent device, used to create the /sys/devices/mc sysfs node. 1116 * So, there are no attributes on it. 1117 */ 1118 edac_dbg(1, "Releasing device %s\n", dev_name(dev)); 1119 kfree(dev); 1120 } 1121 1122 static struct device_type mc_attr_type = { 1123 .release = mc_attr_release, 1124 }; 1125 /* 1126 * Init/exit code for the module. Basically, creates/removes /sys/class/rc 1127 */ 1128 int __init edac_mc_sysfs_init(void) 1129 { 1130 struct bus_type *edac_subsys; 1131 int err; 1132 1133 /* get the /sys/devices/system/edac subsys reference */ 1134 edac_subsys = edac_get_sysfs_subsys(); 1135 if (edac_subsys == NULL) { 1136 edac_dbg(1, "no edac_subsys\n"); 1137 err = -EINVAL; 1138 goto out; 1139 } 1140 1141 mci_pdev = kzalloc(sizeof(*mci_pdev), GFP_KERNEL); 1142 if (!mci_pdev) { 1143 err = -ENOMEM; 1144 goto out_put_sysfs; 1145 } 1146 1147 mci_pdev->bus = edac_subsys; 1148 mci_pdev->type = &mc_attr_type; 1149 device_initialize(mci_pdev); 1150 dev_set_name(mci_pdev, "mc"); 1151 1152 err = device_add(mci_pdev); 1153 if (err < 0) 1154 goto out_dev_free; 1155 1156 edac_dbg(0, "device %s created\n", dev_name(mci_pdev)); 1157 1158 return 0; 1159 1160 out_dev_free: 1161 kfree(mci_pdev); 1162 out_put_sysfs: 1163 edac_put_sysfs_subsys(); 1164 out: 1165 return err; 1166 } 1167 1168 void __exit edac_mc_sysfs_exit(void) 1169 { 1170 device_unregister(mci_pdev); 1171 edac_put_sysfs_subsys(); 1172 } 1173