xref: /openbmc/linux/drivers/edac/edac_mc_sysfs.c (revision 4a44a19b)
1 /*
2  * edac_mc kernel module
3  * (C) 2005-2007 Linux Networx (http://lnxi.com)
4  *
5  * This file may be distributed under the terms of the
6  * GNU General Public License.
7  *
8  * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
9  *
10  * (c) 2012-2013 - Mauro Carvalho Chehab
11  *	The entire API were re-written, and ported to use struct device
12  *
13  */
14 
15 #include <linux/ctype.h>
16 #include <linux/slab.h>
17 #include <linux/edac.h>
18 #include <linux/bug.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/uaccess.h>
21 
22 #include "edac_core.h"
23 #include "edac_module.h"
24 
25 /* MC EDAC Controls, setable by module parameter, and sysfs */
26 static int edac_mc_log_ue = 1;
27 static int edac_mc_log_ce = 1;
28 static int edac_mc_panic_on_ue;
29 static int edac_mc_poll_msec = 1000;
30 
31 /* Getter functions for above */
32 int edac_mc_get_log_ue(void)
33 {
34 	return edac_mc_log_ue;
35 }
36 
37 int edac_mc_get_log_ce(void)
38 {
39 	return edac_mc_log_ce;
40 }
41 
42 int edac_mc_get_panic_on_ue(void)
43 {
44 	return edac_mc_panic_on_ue;
45 }
46 
47 /* this is temporary */
48 int edac_mc_get_poll_msec(void)
49 {
50 	return edac_mc_poll_msec;
51 }
52 
53 static int edac_set_poll_msec(const char *val, struct kernel_param *kp)
54 {
55 	unsigned long l;
56 	int ret;
57 
58 	if (!val)
59 		return -EINVAL;
60 
61 	ret = kstrtoul(val, 0, &l);
62 	if (ret)
63 		return ret;
64 
65 	if (l < 1000)
66 		return -EINVAL;
67 
68 	*((unsigned long *)kp->arg) = l;
69 
70 	/* notify edac_mc engine to reset the poll period */
71 	edac_mc_reset_delay_period(l);
72 
73 	return 0;
74 }
75 
76 /* Parameter declarations for above */
77 module_param(edac_mc_panic_on_ue, int, 0644);
78 MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
79 module_param(edac_mc_log_ue, int, 0644);
80 MODULE_PARM_DESC(edac_mc_log_ue,
81 		 "Log uncorrectable error to console: 0=off 1=on");
82 module_param(edac_mc_log_ce, int, 0644);
83 MODULE_PARM_DESC(edac_mc_log_ce,
84 		 "Log correctable error to console: 0=off 1=on");
85 module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int,
86 		  &edac_mc_poll_msec, 0644);
87 MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds");
88 
89 static struct device *mci_pdev;
90 
91 /*
92  * various constants for Memory Controllers
93  */
94 static const char * const mem_types[] = {
95 	[MEM_EMPTY] = "Empty",
96 	[MEM_RESERVED] = "Reserved",
97 	[MEM_UNKNOWN] = "Unknown",
98 	[MEM_FPM] = "FPM",
99 	[MEM_EDO] = "EDO",
100 	[MEM_BEDO] = "BEDO",
101 	[MEM_SDR] = "Unbuffered-SDR",
102 	[MEM_RDR] = "Registered-SDR",
103 	[MEM_DDR] = "Unbuffered-DDR",
104 	[MEM_RDDR] = "Registered-DDR",
105 	[MEM_RMBS] = "RMBS",
106 	[MEM_DDR2] = "Unbuffered-DDR2",
107 	[MEM_FB_DDR2] = "FullyBuffered-DDR2",
108 	[MEM_RDDR2] = "Registered-DDR2",
109 	[MEM_XDR] = "XDR",
110 	[MEM_DDR3] = "Unbuffered-DDR3",
111 	[MEM_RDDR3] = "Registered-DDR3",
112 	[MEM_DDR4] = "Unbuffered-DDR4",
113 	[MEM_RDDR4] = "Registered-DDR4"
114 };
115 
116 static const char * const dev_types[] = {
117 	[DEV_UNKNOWN] = "Unknown",
118 	[DEV_X1] = "x1",
119 	[DEV_X2] = "x2",
120 	[DEV_X4] = "x4",
121 	[DEV_X8] = "x8",
122 	[DEV_X16] = "x16",
123 	[DEV_X32] = "x32",
124 	[DEV_X64] = "x64"
125 };
126 
127 static const char * const edac_caps[] = {
128 	[EDAC_UNKNOWN] = "Unknown",
129 	[EDAC_NONE] = "None",
130 	[EDAC_RESERVED] = "Reserved",
131 	[EDAC_PARITY] = "PARITY",
132 	[EDAC_EC] = "EC",
133 	[EDAC_SECDED] = "SECDED",
134 	[EDAC_S2ECD2ED] = "S2ECD2ED",
135 	[EDAC_S4ECD4ED] = "S4ECD4ED",
136 	[EDAC_S8ECD8ED] = "S8ECD8ED",
137 	[EDAC_S16ECD16ED] = "S16ECD16ED"
138 };
139 
140 #ifdef CONFIG_EDAC_LEGACY_SYSFS
141 /*
142  * EDAC sysfs CSROW data structures and methods
143  */
144 
145 #define to_csrow(k) container_of(k, struct csrow_info, dev)
146 
147 /*
148  * We need it to avoid namespace conflicts between the legacy API
149  * and the per-dimm/per-rank one
150  */
151 #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
152 	static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
153 
154 struct dev_ch_attribute {
155 	struct device_attribute attr;
156 	int channel;
157 };
158 
159 #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
160 	struct dev_ch_attribute dev_attr_legacy_##_name = \
161 		{ __ATTR(_name, _mode, _show, _store), (_var) }
162 
163 #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
164 
165 /* Set of more default csrow<id> attribute show/store functions */
166 static ssize_t csrow_ue_count_show(struct device *dev,
167 				   struct device_attribute *mattr, char *data)
168 {
169 	struct csrow_info *csrow = to_csrow(dev);
170 
171 	return sprintf(data, "%u\n", csrow->ue_count);
172 }
173 
174 static ssize_t csrow_ce_count_show(struct device *dev,
175 				   struct device_attribute *mattr, char *data)
176 {
177 	struct csrow_info *csrow = to_csrow(dev);
178 
179 	return sprintf(data, "%u\n", csrow->ce_count);
180 }
181 
182 static ssize_t csrow_size_show(struct device *dev,
183 			       struct device_attribute *mattr, char *data)
184 {
185 	struct csrow_info *csrow = to_csrow(dev);
186 	int i;
187 	u32 nr_pages = 0;
188 
189 	for (i = 0; i < csrow->nr_channels; i++)
190 		nr_pages += csrow->channels[i]->dimm->nr_pages;
191 	return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
192 }
193 
194 static ssize_t csrow_mem_type_show(struct device *dev,
195 				   struct device_attribute *mattr, char *data)
196 {
197 	struct csrow_info *csrow = to_csrow(dev);
198 
199 	return sprintf(data, "%s\n", mem_types[csrow->channels[0]->dimm->mtype]);
200 }
201 
202 static ssize_t csrow_dev_type_show(struct device *dev,
203 				   struct device_attribute *mattr, char *data)
204 {
205 	struct csrow_info *csrow = to_csrow(dev);
206 
207 	return sprintf(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]);
208 }
209 
210 static ssize_t csrow_edac_mode_show(struct device *dev,
211 				    struct device_attribute *mattr,
212 				    char *data)
213 {
214 	struct csrow_info *csrow = to_csrow(dev);
215 
216 	return sprintf(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]);
217 }
218 
219 /* show/store functions for DIMM Label attributes */
220 static ssize_t channel_dimm_label_show(struct device *dev,
221 				       struct device_attribute *mattr,
222 				       char *data)
223 {
224 	struct csrow_info *csrow = to_csrow(dev);
225 	unsigned chan = to_channel(mattr);
226 	struct rank_info *rank = csrow->channels[chan];
227 
228 	/* if field has not been initialized, there is nothing to send */
229 	if (!rank->dimm->label[0])
230 		return 0;
231 
232 	return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",
233 			rank->dimm->label);
234 }
235 
236 static ssize_t channel_dimm_label_store(struct device *dev,
237 					struct device_attribute *mattr,
238 					const char *data, size_t count)
239 {
240 	struct csrow_info *csrow = to_csrow(dev);
241 	unsigned chan = to_channel(mattr);
242 	struct rank_info *rank = csrow->channels[chan];
243 
244 	ssize_t max_size = 0;
245 
246 	max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
247 	strncpy(rank->dimm->label, data, max_size);
248 	rank->dimm->label[max_size] = '\0';
249 
250 	return max_size;
251 }
252 
253 /* show function for dynamic chX_ce_count attribute */
254 static ssize_t channel_ce_count_show(struct device *dev,
255 				     struct device_attribute *mattr, char *data)
256 {
257 	struct csrow_info *csrow = to_csrow(dev);
258 	unsigned chan = to_channel(mattr);
259 	struct rank_info *rank = csrow->channels[chan];
260 
261 	return sprintf(data, "%u\n", rank->ce_count);
262 }
263 
264 /* cwrow<id>/attribute files */
265 DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL);
266 DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL);
267 DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL);
268 DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL);
269 DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL);
270 DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL);
271 
272 /* default attributes of the CSROW<id> object */
273 static struct attribute *csrow_attrs[] = {
274 	&dev_attr_legacy_dev_type.attr,
275 	&dev_attr_legacy_mem_type.attr,
276 	&dev_attr_legacy_edac_mode.attr,
277 	&dev_attr_legacy_size_mb.attr,
278 	&dev_attr_legacy_ue_count.attr,
279 	&dev_attr_legacy_ce_count.attr,
280 	NULL,
281 };
282 
283 static struct attribute_group csrow_attr_grp = {
284 	.attrs	= csrow_attrs,
285 };
286 
287 static const struct attribute_group *csrow_attr_groups[] = {
288 	&csrow_attr_grp,
289 	NULL
290 };
291 
292 static void csrow_attr_release(struct device *dev)
293 {
294 	struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
295 
296 	edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
297 	kfree(csrow);
298 }
299 
300 static struct device_type csrow_attr_type = {
301 	.groups		= csrow_attr_groups,
302 	.release	= csrow_attr_release,
303 };
304 
305 /*
306  * possible dynamic channel DIMM Label attribute files
307  *
308  */
309 
310 #define EDAC_NR_CHANNELS	6
311 
312 DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR,
313 	channel_dimm_label_show, channel_dimm_label_store, 0);
314 DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR,
315 	channel_dimm_label_show, channel_dimm_label_store, 1);
316 DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR,
317 	channel_dimm_label_show, channel_dimm_label_store, 2);
318 DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR,
319 	channel_dimm_label_show, channel_dimm_label_store, 3);
320 DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR,
321 	channel_dimm_label_show, channel_dimm_label_store, 4);
322 DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR,
323 	channel_dimm_label_show, channel_dimm_label_store, 5);
324 
325 /* Total possible dynamic DIMM Label attribute file table */
326 static struct device_attribute *dynamic_csrow_dimm_attr[] = {
327 	&dev_attr_legacy_ch0_dimm_label.attr,
328 	&dev_attr_legacy_ch1_dimm_label.attr,
329 	&dev_attr_legacy_ch2_dimm_label.attr,
330 	&dev_attr_legacy_ch3_dimm_label.attr,
331 	&dev_attr_legacy_ch4_dimm_label.attr,
332 	&dev_attr_legacy_ch5_dimm_label.attr
333 };
334 
335 /* possible dynamic channel ce_count attribute files */
336 DEVICE_CHANNEL(ch0_ce_count, S_IRUGO,
337 		   channel_ce_count_show, NULL, 0);
338 DEVICE_CHANNEL(ch1_ce_count, S_IRUGO,
339 		   channel_ce_count_show, NULL, 1);
340 DEVICE_CHANNEL(ch2_ce_count, S_IRUGO,
341 		   channel_ce_count_show, NULL, 2);
342 DEVICE_CHANNEL(ch3_ce_count, S_IRUGO,
343 		   channel_ce_count_show, NULL, 3);
344 DEVICE_CHANNEL(ch4_ce_count, S_IRUGO,
345 		   channel_ce_count_show, NULL, 4);
346 DEVICE_CHANNEL(ch5_ce_count, S_IRUGO,
347 		   channel_ce_count_show, NULL, 5);
348 
349 /* Total possible dynamic ce_count attribute file table */
350 static struct device_attribute *dynamic_csrow_ce_count_attr[] = {
351 	&dev_attr_legacy_ch0_ce_count.attr,
352 	&dev_attr_legacy_ch1_ce_count.attr,
353 	&dev_attr_legacy_ch2_ce_count.attr,
354 	&dev_attr_legacy_ch3_ce_count.attr,
355 	&dev_attr_legacy_ch4_ce_count.attr,
356 	&dev_attr_legacy_ch5_ce_count.attr
357 };
358 
359 static inline int nr_pages_per_csrow(struct csrow_info *csrow)
360 {
361 	int chan, nr_pages = 0;
362 
363 	for (chan = 0; chan < csrow->nr_channels; chan++)
364 		nr_pages += csrow->channels[chan]->dimm->nr_pages;
365 
366 	return nr_pages;
367 }
368 
369 /* Create a CSROW object under specifed edac_mc_device */
370 static int edac_create_csrow_object(struct mem_ctl_info *mci,
371 				    struct csrow_info *csrow, int index)
372 {
373 	int err, chan;
374 
375 	if (csrow->nr_channels >= EDAC_NR_CHANNELS)
376 		return -ENODEV;
377 
378 	csrow->dev.type = &csrow_attr_type;
379 	csrow->dev.bus = mci->bus;
380 	device_initialize(&csrow->dev);
381 	csrow->dev.parent = &mci->dev;
382 	csrow->mci = mci;
383 	dev_set_name(&csrow->dev, "csrow%d", index);
384 	dev_set_drvdata(&csrow->dev, csrow);
385 
386 	edac_dbg(0, "creating (virtual) csrow node %s\n",
387 		 dev_name(&csrow->dev));
388 
389 	err = device_add(&csrow->dev);
390 	if (err < 0)
391 		return err;
392 
393 	for (chan = 0; chan < csrow->nr_channels; chan++) {
394 		/* Only expose populated DIMMs */
395 		if (!csrow->channels[chan]->dimm->nr_pages)
396 			continue;
397 		err = device_create_file(&csrow->dev,
398 					 dynamic_csrow_dimm_attr[chan]);
399 		if (err < 0)
400 			goto error;
401 		err = device_create_file(&csrow->dev,
402 					 dynamic_csrow_ce_count_attr[chan]);
403 		if (err < 0) {
404 			device_remove_file(&csrow->dev,
405 					   dynamic_csrow_dimm_attr[chan]);
406 			goto error;
407 		}
408 	}
409 
410 	return 0;
411 
412 error:
413 	for (--chan; chan >= 0; chan--) {
414 		device_remove_file(&csrow->dev,
415 					dynamic_csrow_dimm_attr[chan]);
416 		device_remove_file(&csrow->dev,
417 					   dynamic_csrow_ce_count_attr[chan]);
418 	}
419 	put_device(&csrow->dev);
420 
421 	return err;
422 }
423 
424 /* Create a CSROW object under specifed edac_mc_device */
425 static int edac_create_csrow_objects(struct mem_ctl_info *mci)
426 {
427 	int err, i, chan;
428 	struct csrow_info *csrow;
429 
430 	for (i = 0; i < mci->nr_csrows; i++) {
431 		csrow = mci->csrows[i];
432 		if (!nr_pages_per_csrow(csrow))
433 			continue;
434 		err = edac_create_csrow_object(mci, mci->csrows[i], i);
435 		if (err < 0) {
436 			edac_dbg(1,
437 				 "failure: create csrow objects for csrow %d\n",
438 				 i);
439 			goto error;
440 		}
441 	}
442 	return 0;
443 
444 error:
445 	for (--i; i >= 0; i--) {
446 		csrow = mci->csrows[i];
447 		if (!nr_pages_per_csrow(csrow))
448 			continue;
449 		for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
450 			if (!csrow->channels[chan]->dimm->nr_pages)
451 				continue;
452 			device_remove_file(&csrow->dev,
453 						dynamic_csrow_dimm_attr[chan]);
454 			device_remove_file(&csrow->dev,
455 						dynamic_csrow_ce_count_attr[chan]);
456 		}
457 		put_device(&mci->csrows[i]->dev);
458 	}
459 
460 	return err;
461 }
462 
463 static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
464 {
465 	int i, chan;
466 	struct csrow_info *csrow;
467 
468 	for (i = mci->nr_csrows - 1; i >= 0; i--) {
469 		csrow = mci->csrows[i];
470 		if (!nr_pages_per_csrow(csrow))
471 			continue;
472 		for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
473 			if (!csrow->channels[chan]->dimm->nr_pages)
474 				continue;
475 			edac_dbg(1, "Removing csrow %d channel %d sysfs nodes\n",
476 				 i, chan);
477 			device_remove_file(&csrow->dev,
478 						dynamic_csrow_dimm_attr[chan]);
479 			device_remove_file(&csrow->dev,
480 						dynamic_csrow_ce_count_attr[chan]);
481 		}
482 		device_unregister(&mci->csrows[i]->dev);
483 	}
484 }
485 #endif
486 
487 /*
488  * Per-dimm (or per-rank) devices
489  */
490 
491 #define to_dimm(k) container_of(k, struct dimm_info, dev)
492 
493 /* show/store functions for DIMM Label attributes */
494 static ssize_t dimmdev_location_show(struct device *dev,
495 				     struct device_attribute *mattr, char *data)
496 {
497 	struct dimm_info *dimm = to_dimm(dev);
498 
499 	return edac_dimm_info_location(dimm, data, PAGE_SIZE);
500 }
501 
502 static ssize_t dimmdev_label_show(struct device *dev,
503 				  struct device_attribute *mattr, char *data)
504 {
505 	struct dimm_info *dimm = to_dimm(dev);
506 
507 	/* if field has not been initialized, there is nothing to send */
508 	if (!dimm->label[0])
509 		return 0;
510 
511 	return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", dimm->label);
512 }
513 
514 static ssize_t dimmdev_label_store(struct device *dev,
515 				   struct device_attribute *mattr,
516 				   const char *data,
517 				   size_t count)
518 {
519 	struct dimm_info *dimm = to_dimm(dev);
520 
521 	ssize_t max_size = 0;
522 
523 	max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
524 	strncpy(dimm->label, data, max_size);
525 	dimm->label[max_size] = '\0';
526 
527 	return max_size;
528 }
529 
530 static ssize_t dimmdev_size_show(struct device *dev,
531 				 struct device_attribute *mattr, char *data)
532 {
533 	struct dimm_info *dimm = to_dimm(dev);
534 
535 	return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages));
536 }
537 
538 static ssize_t dimmdev_mem_type_show(struct device *dev,
539 				     struct device_attribute *mattr, char *data)
540 {
541 	struct dimm_info *dimm = to_dimm(dev);
542 
543 	return sprintf(data, "%s\n", mem_types[dimm->mtype]);
544 }
545 
546 static ssize_t dimmdev_dev_type_show(struct device *dev,
547 				     struct device_attribute *mattr, char *data)
548 {
549 	struct dimm_info *dimm = to_dimm(dev);
550 
551 	return sprintf(data, "%s\n", dev_types[dimm->dtype]);
552 }
553 
554 static ssize_t dimmdev_edac_mode_show(struct device *dev,
555 				      struct device_attribute *mattr,
556 				      char *data)
557 {
558 	struct dimm_info *dimm = to_dimm(dev);
559 
560 	return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]);
561 }
562 
563 /* dimm/rank attribute files */
564 static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR,
565 		   dimmdev_label_show, dimmdev_label_store);
566 static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL);
567 static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL);
568 static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL);
569 static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL);
570 static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL);
571 
572 /* attributes of the dimm<id>/rank<id> object */
573 static struct attribute *dimm_attrs[] = {
574 	&dev_attr_dimm_label.attr,
575 	&dev_attr_dimm_location.attr,
576 	&dev_attr_size.attr,
577 	&dev_attr_dimm_mem_type.attr,
578 	&dev_attr_dimm_dev_type.attr,
579 	&dev_attr_dimm_edac_mode.attr,
580 	NULL,
581 };
582 
583 static struct attribute_group dimm_attr_grp = {
584 	.attrs	= dimm_attrs,
585 };
586 
587 static const struct attribute_group *dimm_attr_groups[] = {
588 	&dimm_attr_grp,
589 	NULL
590 };
591 
592 static void dimm_attr_release(struct device *dev)
593 {
594 	struct dimm_info *dimm = container_of(dev, struct dimm_info, dev);
595 
596 	edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev));
597 	kfree(dimm);
598 }
599 
600 static struct device_type dimm_attr_type = {
601 	.groups		= dimm_attr_groups,
602 	.release	= dimm_attr_release,
603 };
604 
605 /* Create a DIMM object under specifed memory controller device */
606 static int edac_create_dimm_object(struct mem_ctl_info *mci,
607 				   struct dimm_info *dimm,
608 				   int index)
609 {
610 	int err;
611 	dimm->mci = mci;
612 
613 	dimm->dev.type = &dimm_attr_type;
614 	dimm->dev.bus = mci->bus;
615 	device_initialize(&dimm->dev);
616 
617 	dimm->dev.parent = &mci->dev;
618 	if (mci->csbased)
619 		dev_set_name(&dimm->dev, "rank%d", index);
620 	else
621 		dev_set_name(&dimm->dev, "dimm%d", index);
622 	dev_set_drvdata(&dimm->dev, dimm);
623 	pm_runtime_forbid(&mci->dev);
624 
625 	err =  device_add(&dimm->dev);
626 
627 	edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm->dev));
628 
629 	return err;
630 }
631 
632 /*
633  * Memory controller device
634  */
635 
636 #define to_mci(k) container_of(k, struct mem_ctl_info, dev)
637 
638 static ssize_t mci_reset_counters_store(struct device *dev,
639 					struct device_attribute *mattr,
640 					const char *data, size_t count)
641 {
642 	struct mem_ctl_info *mci = to_mci(dev);
643 	int cnt, row, chan, i;
644 	mci->ue_mc = 0;
645 	mci->ce_mc = 0;
646 	mci->ue_noinfo_count = 0;
647 	mci->ce_noinfo_count = 0;
648 
649 	for (row = 0; row < mci->nr_csrows; row++) {
650 		struct csrow_info *ri = mci->csrows[row];
651 
652 		ri->ue_count = 0;
653 		ri->ce_count = 0;
654 
655 		for (chan = 0; chan < ri->nr_channels; chan++)
656 			ri->channels[chan]->ce_count = 0;
657 	}
658 
659 	cnt = 1;
660 	for (i = 0; i < mci->n_layers; i++) {
661 		cnt *= mci->layers[i].size;
662 		memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32));
663 		memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32));
664 	}
665 
666 	mci->start_time = jiffies;
667 	return count;
668 }
669 
670 /* Memory scrubbing interface:
671  *
672  * A MC driver can limit the scrubbing bandwidth based on the CPU type.
673  * Therefore, ->set_sdram_scrub_rate should be made to return the actual
674  * bandwidth that is accepted or 0 when scrubbing is to be disabled.
675  *
676  * Negative value still means that an error has occurred while setting
677  * the scrub rate.
678  */
679 static ssize_t mci_sdram_scrub_rate_store(struct device *dev,
680 					  struct device_attribute *mattr,
681 					  const char *data, size_t count)
682 {
683 	struct mem_ctl_info *mci = to_mci(dev);
684 	unsigned long bandwidth = 0;
685 	int new_bw = 0;
686 
687 	if (kstrtoul(data, 10, &bandwidth) < 0)
688 		return -EINVAL;
689 
690 	new_bw = mci->set_sdram_scrub_rate(mci, bandwidth);
691 	if (new_bw < 0) {
692 		edac_printk(KERN_WARNING, EDAC_MC,
693 			    "Error setting scrub rate to: %lu\n", bandwidth);
694 		return -EINVAL;
695 	}
696 
697 	return count;
698 }
699 
700 /*
701  * ->get_sdram_scrub_rate() return value semantics same as above.
702  */
703 static ssize_t mci_sdram_scrub_rate_show(struct device *dev,
704 					 struct device_attribute *mattr,
705 					 char *data)
706 {
707 	struct mem_ctl_info *mci = to_mci(dev);
708 	int bandwidth = 0;
709 
710 	bandwidth = mci->get_sdram_scrub_rate(mci);
711 	if (bandwidth < 0) {
712 		edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n");
713 		return bandwidth;
714 	}
715 
716 	return sprintf(data, "%d\n", bandwidth);
717 }
718 
719 /* default attribute files for the MCI object */
720 static ssize_t mci_ue_count_show(struct device *dev,
721 				 struct device_attribute *mattr,
722 				 char *data)
723 {
724 	struct mem_ctl_info *mci = to_mci(dev);
725 
726 	return sprintf(data, "%d\n", mci->ue_mc);
727 }
728 
729 static ssize_t mci_ce_count_show(struct device *dev,
730 				 struct device_attribute *mattr,
731 				 char *data)
732 {
733 	struct mem_ctl_info *mci = to_mci(dev);
734 
735 	return sprintf(data, "%d\n", mci->ce_mc);
736 }
737 
738 static ssize_t mci_ce_noinfo_show(struct device *dev,
739 				  struct device_attribute *mattr,
740 				  char *data)
741 {
742 	struct mem_ctl_info *mci = to_mci(dev);
743 
744 	return sprintf(data, "%d\n", mci->ce_noinfo_count);
745 }
746 
747 static ssize_t mci_ue_noinfo_show(struct device *dev,
748 				  struct device_attribute *mattr,
749 				  char *data)
750 {
751 	struct mem_ctl_info *mci = to_mci(dev);
752 
753 	return sprintf(data, "%d\n", mci->ue_noinfo_count);
754 }
755 
756 static ssize_t mci_seconds_show(struct device *dev,
757 				struct device_attribute *mattr,
758 				char *data)
759 {
760 	struct mem_ctl_info *mci = to_mci(dev);
761 
762 	return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ);
763 }
764 
765 static ssize_t mci_ctl_name_show(struct device *dev,
766 				 struct device_attribute *mattr,
767 				 char *data)
768 {
769 	struct mem_ctl_info *mci = to_mci(dev);
770 
771 	return sprintf(data, "%s\n", mci->ctl_name);
772 }
773 
774 static ssize_t mci_size_mb_show(struct device *dev,
775 				struct device_attribute *mattr,
776 				char *data)
777 {
778 	struct mem_ctl_info *mci = to_mci(dev);
779 	int total_pages = 0, csrow_idx, j;
780 
781 	for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
782 		struct csrow_info *csrow = mci->csrows[csrow_idx];
783 
784 		for (j = 0; j < csrow->nr_channels; j++) {
785 			struct dimm_info *dimm = csrow->channels[j]->dimm;
786 
787 			total_pages += dimm->nr_pages;
788 		}
789 	}
790 
791 	return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));
792 }
793 
794 static ssize_t mci_max_location_show(struct device *dev,
795 				     struct device_attribute *mattr,
796 				     char *data)
797 {
798 	struct mem_ctl_info *mci = to_mci(dev);
799 	int i;
800 	char *p = data;
801 
802 	for (i = 0; i < mci->n_layers; i++) {
803 		p += sprintf(p, "%s %d ",
804 			     edac_layer_name[mci->layers[i].type],
805 			     mci->layers[i].size - 1);
806 	}
807 
808 	return p - data;
809 }
810 
811 #ifdef CONFIG_EDAC_DEBUG
812 static ssize_t edac_fake_inject_write(struct file *file,
813 				      const char __user *data,
814 				      size_t count, loff_t *ppos)
815 {
816 	struct device *dev = file->private_data;
817 	struct mem_ctl_info *mci = to_mci(dev);
818 	static enum hw_event_mc_err_type type;
819 	u16 errcount = mci->fake_inject_count;
820 
821 	if (!errcount)
822 		errcount = 1;
823 
824 	type = mci->fake_inject_ue ? HW_EVENT_ERR_UNCORRECTED
825 				   : HW_EVENT_ERR_CORRECTED;
826 
827 	printk(KERN_DEBUG
828 	       "Generating %d %s fake error%s to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n",
829 		errcount,
830 		(type == HW_EVENT_ERR_UNCORRECTED) ? "UE" : "CE",
831 		errcount > 1 ? "s" : "",
832 		mci->fake_inject_layer[0],
833 		mci->fake_inject_layer[1],
834 		mci->fake_inject_layer[2]
835 	       );
836 	edac_mc_handle_error(type, mci, errcount, 0, 0, 0,
837 			     mci->fake_inject_layer[0],
838 			     mci->fake_inject_layer[1],
839 			     mci->fake_inject_layer[2],
840 			     "FAKE ERROR", "for EDAC testing only");
841 
842 	return count;
843 }
844 
845 static const struct file_operations debug_fake_inject_fops = {
846 	.open = simple_open,
847 	.write = edac_fake_inject_write,
848 	.llseek = generic_file_llseek,
849 };
850 #endif
851 
852 /* default Control file */
853 DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
854 
855 /* default Attribute files */
856 DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
857 DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
858 DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
859 DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
860 DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
861 DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
862 DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
863 DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
864 
865 /* memory scrubber attribute file */
866 DEVICE_ATTR(sdram_scrub_rate, 0, NULL, NULL);
867 
868 static struct attribute *mci_attrs[] = {
869 	&dev_attr_reset_counters.attr,
870 	&dev_attr_mc_name.attr,
871 	&dev_attr_size_mb.attr,
872 	&dev_attr_seconds_since_reset.attr,
873 	&dev_attr_ue_noinfo_count.attr,
874 	&dev_attr_ce_noinfo_count.attr,
875 	&dev_attr_ue_count.attr,
876 	&dev_attr_ce_count.attr,
877 	&dev_attr_max_location.attr,
878 	NULL
879 };
880 
881 static struct attribute_group mci_attr_grp = {
882 	.attrs	= mci_attrs,
883 };
884 
885 static const struct attribute_group *mci_attr_groups[] = {
886 	&mci_attr_grp,
887 	NULL
888 };
889 
890 static void mci_attr_release(struct device *dev)
891 {
892 	struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
893 
894 	edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
895 	kfree(mci);
896 }
897 
898 static struct device_type mci_attr_type = {
899 	.groups		= mci_attr_groups,
900 	.release	= mci_attr_release,
901 };
902 
903 #ifdef CONFIG_EDAC_DEBUG
904 static struct dentry *edac_debugfs;
905 
906 int __init edac_debugfs_init(void)
907 {
908 	edac_debugfs = debugfs_create_dir("edac", NULL);
909 	if (IS_ERR(edac_debugfs)) {
910 		edac_debugfs = NULL;
911 		return -ENOMEM;
912 	}
913 	return 0;
914 }
915 
916 void __exit edac_debugfs_exit(void)
917 {
918 	debugfs_remove(edac_debugfs);
919 }
920 
921 static int edac_create_debug_nodes(struct mem_ctl_info *mci)
922 {
923 	struct dentry *d, *parent;
924 	char name[80];
925 	int i;
926 
927 	if (!edac_debugfs)
928 		return -ENODEV;
929 
930 	d = debugfs_create_dir(mci->dev.kobj.name, edac_debugfs);
931 	if (!d)
932 		return -ENOMEM;
933 	parent = d;
934 
935 	for (i = 0; i < mci->n_layers; i++) {
936 		sprintf(name, "fake_inject_%s",
937 			     edac_layer_name[mci->layers[i].type]);
938 		d = debugfs_create_u8(name, S_IRUGO | S_IWUSR, parent,
939 				      &mci->fake_inject_layer[i]);
940 		if (!d)
941 			goto nomem;
942 	}
943 
944 	d = debugfs_create_bool("fake_inject_ue", S_IRUGO | S_IWUSR, parent,
945 				&mci->fake_inject_ue);
946 	if (!d)
947 		goto nomem;
948 
949 	d = debugfs_create_u16("fake_inject_count", S_IRUGO | S_IWUSR, parent,
950 				&mci->fake_inject_count);
951 	if (!d)
952 		goto nomem;
953 
954 	d = debugfs_create_file("fake_inject", S_IWUSR, parent,
955 				&mci->dev,
956 				&debug_fake_inject_fops);
957 	if (!d)
958 		goto nomem;
959 
960 	mci->debugfs = parent;
961 	return 0;
962 nomem:
963 	debugfs_remove(mci->debugfs);
964 	return -ENOMEM;
965 }
966 #endif
967 
968 /*
969  * Create a new Memory Controller kobject instance,
970  *	mc<id> under the 'mc' directory
971  *
972  * Return:
973  *	0	Success
974  *	!0	Failure
975  */
976 int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
977 {
978 	int i, err;
979 
980 	/*
981 	 * The memory controller needs its own bus, in order to avoid
982 	 * namespace conflicts at /sys/bus/edac.
983 	 */
984 	mci->bus->name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx);
985 	if (!mci->bus->name)
986 		return -ENOMEM;
987 
988 	edac_dbg(0, "creating bus %s\n", mci->bus->name);
989 
990 	err = bus_register(mci->bus);
991 	if (err < 0)
992 		return err;
993 
994 	/* get the /sys/devices/system/edac subsys reference */
995 	mci->dev.type = &mci_attr_type;
996 	device_initialize(&mci->dev);
997 
998 	mci->dev.parent = mci_pdev;
999 	mci->dev.bus = mci->bus;
1000 	dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
1001 	dev_set_drvdata(&mci->dev, mci);
1002 	pm_runtime_forbid(&mci->dev);
1003 
1004 	edac_dbg(0, "creating device %s\n", dev_name(&mci->dev));
1005 	err = device_add(&mci->dev);
1006 	if (err < 0) {
1007 		edac_dbg(1, "failure: create device %s\n", dev_name(&mci->dev));
1008 		bus_unregister(mci->bus);
1009 		kfree(mci->bus->name);
1010 		return err;
1011 	}
1012 
1013 	if (mci->set_sdram_scrub_rate || mci->get_sdram_scrub_rate) {
1014 		if (mci->get_sdram_scrub_rate) {
1015 			dev_attr_sdram_scrub_rate.attr.mode |= S_IRUGO;
1016 			dev_attr_sdram_scrub_rate.show = &mci_sdram_scrub_rate_show;
1017 		}
1018 		if (mci->set_sdram_scrub_rate) {
1019 			dev_attr_sdram_scrub_rate.attr.mode |= S_IWUSR;
1020 			dev_attr_sdram_scrub_rate.store = &mci_sdram_scrub_rate_store;
1021 		}
1022 		err = device_create_file(&mci->dev,
1023 					 &dev_attr_sdram_scrub_rate);
1024 		if (err) {
1025 			edac_dbg(1, "failure: create sdram_scrub_rate\n");
1026 			goto fail2;
1027 		}
1028 	}
1029 	/*
1030 	 * Create the dimm/rank devices
1031 	 */
1032 	for (i = 0; i < mci->tot_dimms; i++) {
1033 		struct dimm_info *dimm = mci->dimms[i];
1034 		/* Only expose populated DIMMs */
1035 		if (dimm->nr_pages == 0)
1036 			continue;
1037 #ifdef CONFIG_EDAC_DEBUG
1038 		edac_dbg(1, "creating dimm%d, located at ", i);
1039 		if (edac_debug_level >= 1) {
1040 			int lay;
1041 			for (lay = 0; lay < mci->n_layers; lay++)
1042 				printk(KERN_CONT "%s %d ",
1043 					edac_layer_name[mci->layers[lay].type],
1044 					dimm->location[lay]);
1045 			printk(KERN_CONT "\n");
1046 		}
1047 #endif
1048 		err = edac_create_dimm_object(mci, dimm, i);
1049 		if (err) {
1050 			edac_dbg(1, "failure: create dimm %d obj\n", i);
1051 			goto fail;
1052 		}
1053 	}
1054 
1055 #ifdef CONFIG_EDAC_LEGACY_SYSFS
1056 	err = edac_create_csrow_objects(mci);
1057 	if (err < 0)
1058 		goto fail;
1059 #endif
1060 
1061 #ifdef CONFIG_EDAC_DEBUG
1062 	edac_create_debug_nodes(mci);
1063 #endif
1064 	return 0;
1065 
1066 fail:
1067 	for (i--; i >= 0; i--) {
1068 		struct dimm_info *dimm = mci->dimms[i];
1069 		if (dimm->nr_pages == 0)
1070 			continue;
1071 		device_unregister(&dimm->dev);
1072 	}
1073 fail2:
1074 	device_unregister(&mci->dev);
1075 	bus_unregister(mci->bus);
1076 	kfree(mci->bus->name);
1077 	return err;
1078 }
1079 
1080 /*
1081  * remove a Memory Controller instance
1082  */
1083 void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
1084 {
1085 	int i;
1086 
1087 	edac_dbg(0, "\n");
1088 
1089 #ifdef CONFIG_EDAC_DEBUG
1090 	debugfs_remove(mci->debugfs);
1091 #endif
1092 #ifdef CONFIG_EDAC_LEGACY_SYSFS
1093 	edac_delete_csrow_objects(mci);
1094 #endif
1095 
1096 	for (i = 0; i < mci->tot_dimms; i++) {
1097 		struct dimm_info *dimm = mci->dimms[i];
1098 		if (dimm->nr_pages == 0)
1099 			continue;
1100 		edac_dbg(0, "removing device %s\n", dev_name(&dimm->dev));
1101 		device_unregister(&dimm->dev);
1102 	}
1103 }
1104 
1105 void edac_unregister_sysfs(struct mem_ctl_info *mci)
1106 {
1107 	edac_dbg(1, "Unregistering device %s\n", dev_name(&mci->dev));
1108 	device_unregister(&mci->dev);
1109 	bus_unregister(mci->bus);
1110 	kfree(mci->bus->name);
1111 }
1112 
1113 static void mc_attr_release(struct device *dev)
1114 {
1115 	/*
1116 	 * There's no container structure here, as this is just the mci
1117 	 * parent device, used to create the /sys/devices/mc sysfs node.
1118 	 * So, there are no attributes on it.
1119 	 */
1120 	edac_dbg(1, "Releasing device %s\n", dev_name(dev));
1121 	kfree(dev);
1122 }
1123 
1124 static struct device_type mc_attr_type = {
1125 	.release	= mc_attr_release,
1126 };
1127 /*
1128  * Init/exit code for the module. Basically, creates/removes /sys/class/rc
1129  */
1130 int __init edac_mc_sysfs_init(void)
1131 {
1132 	struct bus_type *edac_subsys;
1133 	int err;
1134 
1135 	/* get the /sys/devices/system/edac subsys reference */
1136 	edac_subsys = edac_get_sysfs_subsys();
1137 	if (edac_subsys == NULL) {
1138 		edac_dbg(1, "no edac_subsys\n");
1139 		err = -EINVAL;
1140 		goto out;
1141 	}
1142 
1143 	mci_pdev = kzalloc(sizeof(*mci_pdev), GFP_KERNEL);
1144 	if (!mci_pdev) {
1145 		err = -ENOMEM;
1146 		goto out_put_sysfs;
1147 	}
1148 
1149 	mci_pdev->bus = edac_subsys;
1150 	mci_pdev->type = &mc_attr_type;
1151 	device_initialize(mci_pdev);
1152 	dev_set_name(mci_pdev, "mc");
1153 
1154 	err = device_add(mci_pdev);
1155 	if (err < 0)
1156 		goto out_dev_free;
1157 
1158 	edac_dbg(0, "device %s created\n", dev_name(mci_pdev));
1159 
1160 	return 0;
1161 
1162  out_dev_free:
1163 	kfree(mci_pdev);
1164  out_put_sysfs:
1165 	edac_put_sysfs_subsys();
1166  out:
1167 	return err;
1168 }
1169 
1170 void __exit edac_mc_sysfs_exit(void)
1171 {
1172 	device_unregister(mci_pdev);
1173 	edac_put_sysfs_subsys();
1174 }
1175