1# 2# EDAC Kconfig 3# Copyright (c) 2008 Doug Thompson www.softwarebitmaker.com 4# Licensed and distributed under the GPL 5# 6 7menuconfig EDAC 8 bool "EDAC (Error Detection And Correction) reporting" 9 depends on HAS_IOMEM 10 depends on X86 || PPC 11 help 12 EDAC is designed to report errors in the core system. 13 These are low-level errors that are reported in the CPU or 14 supporting chipset or other subsystems: 15 memory errors, cache errors, PCI errors, thermal throttling, etc.. 16 If unsure, select 'Y'. 17 18 If this code is reporting problems on your system, please 19 see the EDAC project web pages for more information at: 20 21 <http://bluesmoke.sourceforge.net/> 22 23 and: 24 25 <http://buttersideup.com/edacwiki> 26 27 There is also a mailing list for the EDAC project, which can 28 be found via the sourceforge page. 29 30if EDAC 31 32comment "Reporting subsystems" 33 34config EDAC_DEBUG 35 bool "Debugging" 36 help 37 This turns on debugging information for the entire EDAC 38 sub-system. You can insert module with "debug_level=x", current 39 there're four debug levels (x=0,1,2,3 from low to high). 40 Usually you should select 'N'. 41 42config EDAC_DEBUG_VERBOSE 43 bool "More verbose debugging" 44 depends on EDAC_DEBUG 45 help 46 This option makes debugging information more verbose. 47 Source file name and line number where debugging message 48 printed will be added to debugging message. 49 50config EDAC_MM_EDAC 51 tristate "Main Memory EDAC (Error Detection And Correction) reporting" 52 help 53 Some systems are able to detect and correct errors in main 54 memory. EDAC can report statistics on memory error 55 detection and correction (EDAC - or commonly referred to ECC 56 errors). EDAC will also try to decode where these errors 57 occurred so that a particular failing memory module can be 58 replaced. If unsure, select 'Y'. 59 60config EDAC_AMD64 61 tristate "AMD64 (Opteron, Athlon64) K8, F10h, F11h" 62 depends on EDAC_MM_EDAC && K8_NB && X86_64 && PCI && CPU_SUP_AMD 63 help 64 Support for error detection and correction on the AMD 64 65 Families of Memory Controllers (K8, F10h and F11h) 66 67config EDAC_AMD64_ERROR_INJECTION 68 bool "Sysfs Error Injection facilities" 69 depends on EDAC_AMD64 70 help 71 Recent Opterons (Family 10h and later) provide for Memory Error 72 Injection into the ECC detection circuits. The amd64_edac module 73 allows the operator/user to inject Uncorrectable and Correctable 74 errors into DRAM. 75 76 When enabled, in each of the respective memory controller directories 77 (/sys/devices/system/edac/mc/mcX), there are 3 input files: 78 79 - inject_section (0..3, 16-byte section of 64-byte cacheline), 80 - inject_word (0..8, 16-bit word of 16-byte section), 81 - inject_ecc_vector (hex ecc vector: select bits of inject word) 82 83 In addition, there are two control files, inject_read and inject_write, 84 which trigger the DRAM ECC Read and Write respectively. 85 86config EDAC_AMD76X 87 tristate "AMD 76x (760, 762, 768)" 88 depends on EDAC_MM_EDAC && PCI && X86_32 89 help 90 Support for error detection and correction on the AMD 76x 91 series of chipsets used with the Athlon processor. 92 93config EDAC_E7XXX 94 tristate "Intel e7xxx (e7205, e7500, e7501, e7505)" 95 depends on EDAC_MM_EDAC && PCI && X86_32 96 help 97 Support for error detection and correction on the Intel 98 E7205, E7500, E7501 and E7505 server chipsets. 99 100config EDAC_E752X 101 tristate "Intel e752x (e7520, e7525, e7320) and 3100" 102 depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG 103 help 104 Support for error detection and correction on the Intel 105 E7520, E7525, E7320 server chipsets. 106 107config EDAC_I82443BXGX 108 tristate "Intel 82443BX/GX (440BX/GX)" 109 depends on EDAC_MM_EDAC && PCI && X86_32 110 depends on BROKEN 111 help 112 Support for error detection and correction on the Intel 113 82443BX/GX memory controllers (440BX/GX chipsets). 114 115config EDAC_I82875P 116 tristate "Intel 82875p (D82875P, E7210)" 117 depends on EDAC_MM_EDAC && PCI && X86_32 118 help 119 Support for error detection and correction on the Intel 120 DP82785P and E7210 server chipsets. 121 122config EDAC_I82975X 123 tristate "Intel 82975x (D82975x)" 124 depends on EDAC_MM_EDAC && PCI && X86 125 help 126 Support for error detection and correction on the Intel 127 DP82975x server chipsets. 128 129config EDAC_I3000 130 tristate "Intel 3000/3010" 131 depends on EDAC_MM_EDAC && PCI && X86 132 help 133 Support for error detection and correction on the Intel 134 3000 and 3010 server chipsets. 135 136config EDAC_X38 137 tristate "Intel X38" 138 depends on EDAC_MM_EDAC && PCI && X86 139 help 140 Support for error detection and correction on the Intel 141 X38 server chipsets. 142 143config EDAC_I5400 144 tristate "Intel 5400 (Seaburg) chipsets" 145 depends on EDAC_MM_EDAC && PCI && X86 146 help 147 Support for error detection and correction the Intel 148 i5400 MCH chipset (Seaburg). 149 150config EDAC_I82860 151 tristate "Intel 82860" 152 depends on EDAC_MM_EDAC && PCI && X86_32 153 help 154 Support for error detection and correction on the Intel 155 82860 chipset. 156 157config EDAC_R82600 158 tristate "Radisys 82600 embedded chipset" 159 depends on EDAC_MM_EDAC && PCI && X86_32 160 help 161 Support for error detection and correction on the Radisys 162 82600 embedded chipset. 163 164config EDAC_I5000 165 tristate "Intel Greencreek/Blackford chipset" 166 depends on EDAC_MM_EDAC && X86 && PCI 167 help 168 Support for error detection and correction the Intel 169 Greekcreek/Blackford chipsets. 170 171config EDAC_I5100 172 tristate "Intel San Clemente MCH" 173 depends on EDAC_MM_EDAC && X86 && PCI 174 help 175 Support for error detection and correction the Intel 176 San Clemente MCH. 177 178config EDAC_MPC85XX 179 tristate "Freescale MPC85xx" 180 depends on EDAC_MM_EDAC && FSL_SOC && MPC85xx 181 help 182 Support for error detection and correction on the Freescale 183 MPC8560, MPC8540, MPC8548 184 185config EDAC_MV64X60 186 tristate "Marvell MV64x60" 187 depends on EDAC_MM_EDAC && MV64X60 188 help 189 Support for error detection and correction on the Marvell 190 MV64360 and MV64460 chipsets. 191 192config EDAC_PASEMI 193 tristate "PA Semi PWRficient" 194 depends on EDAC_MM_EDAC && PCI 195 depends on PPC_PASEMI 196 help 197 Support for error detection and correction on PA Semi 198 PWRficient. 199 200config EDAC_CELL 201 tristate "Cell Broadband Engine memory controller" 202 depends on EDAC_MM_EDAC && PPC_CELL_COMMON 203 help 204 Support for error detection and correction on the 205 Cell Broadband Engine internal memory controller 206 on platform without a hypervisor 207 208config EDAC_PPC4XX 209 tristate "PPC4xx IBM DDR2 Memory Controller" 210 depends on EDAC_MM_EDAC && 4xx 211 help 212 This enables support for EDAC on the ECC memory used 213 with the IBM DDR2 memory controller found in various 214 PowerPC 4xx embedded processors such as the 405EX[r], 215 440SP, 440SPe, 460EX, 460GT and 460SX. 216 217config EDAC_AMD8131 218 tristate "AMD8131 HyperTransport PCI-X Tunnel" 219 depends on EDAC_MM_EDAC && PCI && PPC_MAPLE 220 help 221 Support for error detection and correction on the 222 AMD8131 HyperTransport PCI-X Tunnel chip. 223 Note, add more Kconfig dependency if it's adopted 224 on some machine other than Maple. 225 226config EDAC_AMD8111 227 tristate "AMD8111 HyperTransport I/O Hub" 228 depends on EDAC_MM_EDAC && PCI && PPC_MAPLE 229 help 230 Support for error detection and correction on the 231 AMD8111 HyperTransport I/O Hub chip. 232 Note, add more Kconfig dependency if it's adopted 233 on some machine other than Maple. 234 235config EDAC_CPC925 236 tristate "IBM CPC925 Memory Controller (PPC970FX)" 237 depends on EDAC_MM_EDAC && PPC64 238 help 239 Support for error detection and correction on the 240 IBM CPC925 Bridge and Memory Controller, which is 241 a companion chip to the PowerPC 970 family of 242 processors. 243 244endif # EDAC 245