xref: /openbmc/linux/drivers/dma/sh/shdma-base.c (revision 0d456bad)
1 /*
2  * Dmaengine driver base library for DMA controllers, found on SH-based SoCs
3  *
4  * extracted from shdma.c
5  *
6  * Copyright (C) 2011-2012 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
7  * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
8  * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
9  * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
10  *
11  * This is free software; you can redistribute it and/or modify
12  * it under the terms of version 2 of the GNU General Public License as
13  * published by the Free Software Foundation.
14  */
15 
16 #include <linux/delay.h>
17 #include <linux/shdma-base.h>
18 #include <linux/dmaengine.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/module.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/slab.h>
24 #include <linux/spinlock.h>
25 
26 #include "../dmaengine.h"
27 
28 /* DMA descriptor control */
29 enum shdma_desc_status {
30 	DESC_IDLE,
31 	DESC_PREPARED,
32 	DESC_SUBMITTED,
33 	DESC_COMPLETED,	/* completed, have to call callback */
34 	DESC_WAITING,	/* callback called, waiting for ack / re-submit */
35 };
36 
37 #define NR_DESCS_PER_CHANNEL 32
38 
39 #define to_shdma_chan(c) container_of(c, struct shdma_chan, dma_chan)
40 #define to_shdma_dev(d) container_of(d, struct shdma_dev, dma_dev)
41 
42 /*
43  * For slave DMA we assume, that there is a finite number of DMA slaves in the
44  * system, and that each such slave can only use a finite number of channels.
45  * We use slave channel IDs to make sure, that no such slave channel ID is
46  * allocated more than once.
47  */
48 static unsigned int slave_num = 256;
49 module_param(slave_num, uint, 0444);
50 
51 /* A bitmask with slave_num bits */
52 static unsigned long *shdma_slave_used;
53 
54 /* Called under spin_lock_irq(&schan->chan_lock") */
55 static void shdma_chan_xfer_ld_queue(struct shdma_chan *schan)
56 {
57 	struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
58 	const struct shdma_ops *ops = sdev->ops;
59 	struct shdma_desc *sdesc;
60 
61 	/* DMA work check */
62 	if (ops->channel_busy(schan))
63 		return;
64 
65 	/* Find the first not transferred descriptor */
66 	list_for_each_entry(sdesc, &schan->ld_queue, node)
67 		if (sdesc->mark == DESC_SUBMITTED) {
68 			ops->start_xfer(schan, sdesc);
69 			break;
70 		}
71 }
72 
73 static dma_cookie_t shdma_tx_submit(struct dma_async_tx_descriptor *tx)
74 {
75 	struct shdma_desc *chunk, *c, *desc =
76 		container_of(tx, struct shdma_desc, async_tx),
77 		*last = desc;
78 	struct shdma_chan *schan = to_shdma_chan(tx->chan);
79 	dma_async_tx_callback callback = tx->callback;
80 	dma_cookie_t cookie;
81 	bool power_up;
82 
83 	spin_lock_irq(&schan->chan_lock);
84 
85 	power_up = list_empty(&schan->ld_queue);
86 
87 	cookie = dma_cookie_assign(tx);
88 
89 	/* Mark all chunks of this descriptor as submitted, move to the queue */
90 	list_for_each_entry_safe(chunk, c, desc->node.prev, node) {
91 		/*
92 		 * All chunks are on the global ld_free, so, we have to find
93 		 * the end of the chain ourselves
94 		 */
95 		if (chunk != desc && (chunk->mark == DESC_IDLE ||
96 				      chunk->async_tx.cookie > 0 ||
97 				      chunk->async_tx.cookie == -EBUSY ||
98 				      &chunk->node == &schan->ld_free))
99 			break;
100 		chunk->mark = DESC_SUBMITTED;
101 		/* Callback goes to the last chunk */
102 		chunk->async_tx.callback = NULL;
103 		chunk->cookie = cookie;
104 		list_move_tail(&chunk->node, &schan->ld_queue);
105 		last = chunk;
106 
107 		dev_dbg(schan->dev, "submit #%d@%p on %d\n",
108 			tx->cookie, &last->async_tx, schan->id);
109 	}
110 
111 	last->async_tx.callback = callback;
112 	last->async_tx.callback_param = tx->callback_param;
113 
114 	if (power_up) {
115 		int ret;
116 		schan->pm_state = SHDMA_PM_BUSY;
117 
118 		ret = pm_runtime_get(schan->dev);
119 
120 		spin_unlock_irq(&schan->chan_lock);
121 		if (ret < 0)
122 			dev_err(schan->dev, "%s(): GET = %d\n", __func__, ret);
123 
124 		pm_runtime_barrier(schan->dev);
125 
126 		spin_lock_irq(&schan->chan_lock);
127 
128 		/* Have we been reset, while waiting? */
129 		if (schan->pm_state != SHDMA_PM_ESTABLISHED) {
130 			struct shdma_dev *sdev =
131 				to_shdma_dev(schan->dma_chan.device);
132 			const struct shdma_ops *ops = sdev->ops;
133 			dev_dbg(schan->dev, "Bring up channel %d\n",
134 				schan->id);
135 			/*
136 			 * TODO: .xfer_setup() might fail on some platforms.
137 			 * Make it int then, on error remove chunks from the
138 			 * queue again
139 			 */
140 			ops->setup_xfer(schan, schan->slave_id);
141 
142 			if (schan->pm_state == SHDMA_PM_PENDING)
143 				shdma_chan_xfer_ld_queue(schan);
144 			schan->pm_state = SHDMA_PM_ESTABLISHED;
145 		}
146 	} else {
147 		/*
148 		 * Tell .device_issue_pending() not to run the queue, interrupts
149 		 * will do it anyway
150 		 */
151 		schan->pm_state = SHDMA_PM_PENDING;
152 	}
153 
154 	spin_unlock_irq(&schan->chan_lock);
155 
156 	return cookie;
157 }
158 
159 /* Called with desc_lock held */
160 static struct shdma_desc *shdma_get_desc(struct shdma_chan *schan)
161 {
162 	struct shdma_desc *sdesc;
163 
164 	list_for_each_entry(sdesc, &schan->ld_free, node)
165 		if (sdesc->mark != DESC_PREPARED) {
166 			BUG_ON(sdesc->mark != DESC_IDLE);
167 			list_del(&sdesc->node);
168 			return sdesc;
169 		}
170 
171 	return NULL;
172 }
173 
174 static int shdma_setup_slave(struct shdma_chan *schan, int slave_id)
175 {
176 	struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
177 	const struct shdma_ops *ops = sdev->ops;
178 	int ret;
179 
180 	if (slave_id < 0 || slave_id >= slave_num)
181 		return -EINVAL;
182 
183 	if (test_and_set_bit(slave_id, shdma_slave_used))
184 		return -EBUSY;
185 
186 	ret = ops->set_slave(schan, slave_id, false);
187 	if (ret < 0) {
188 		clear_bit(slave_id, shdma_slave_used);
189 		return ret;
190 	}
191 
192 	schan->slave_id = slave_id;
193 
194 	return 0;
195 }
196 
197 /*
198  * This is the standard shdma filter function to be used as a replacement to the
199  * "old" method, using the .private pointer. If for some reason you allocate a
200  * channel without slave data, use something like ERR_PTR(-EINVAL) as a filter
201  * parameter. If this filter is used, the slave driver, after calling
202  * dma_request_channel(), will also have to call dmaengine_slave_config() with
203  * .slave_id, .direction, and either .src_addr or .dst_addr set.
204  * NOTE: this filter doesn't support multiple DMAC drivers with the DMA_SLAVE
205  * capability! If this becomes a requirement, hardware glue drivers, using this
206  * services would have to provide their own filters, which first would check
207  * the device driver, similar to how other DMAC drivers, e.g., sa11x0-dma.c, do
208  * this, and only then, in case of a match, call this common filter.
209  */
210 bool shdma_chan_filter(struct dma_chan *chan, void *arg)
211 {
212 	struct shdma_chan *schan = to_shdma_chan(chan);
213 	struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
214 	const struct shdma_ops *ops = sdev->ops;
215 	int slave_id = (int)arg;
216 	int ret;
217 
218 	if (slave_id < 0)
219 		/* No slave requested - arbitrary channel */
220 		return true;
221 
222 	if (slave_id >= slave_num)
223 		return false;
224 
225 	ret = ops->set_slave(schan, slave_id, true);
226 	if (ret < 0)
227 		return false;
228 
229 	return true;
230 }
231 EXPORT_SYMBOL(shdma_chan_filter);
232 
233 static int shdma_alloc_chan_resources(struct dma_chan *chan)
234 {
235 	struct shdma_chan *schan = to_shdma_chan(chan);
236 	struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
237 	const struct shdma_ops *ops = sdev->ops;
238 	struct shdma_desc *desc;
239 	struct shdma_slave *slave = chan->private;
240 	int ret, i;
241 
242 	/*
243 	 * This relies on the guarantee from dmaengine that alloc_chan_resources
244 	 * never runs concurrently with itself or free_chan_resources.
245 	 */
246 	if (slave) {
247 		/* Legacy mode: .private is set in filter */
248 		ret = shdma_setup_slave(schan, slave->slave_id);
249 		if (ret < 0)
250 			goto esetslave;
251 	} else {
252 		schan->slave_id = -EINVAL;
253 	}
254 
255 	schan->desc = kcalloc(NR_DESCS_PER_CHANNEL,
256 			      sdev->desc_size, GFP_KERNEL);
257 	if (!schan->desc) {
258 		ret = -ENOMEM;
259 		goto edescalloc;
260 	}
261 	schan->desc_num = NR_DESCS_PER_CHANNEL;
262 
263 	for (i = 0; i < NR_DESCS_PER_CHANNEL; i++) {
264 		desc = ops->embedded_desc(schan->desc, i);
265 		dma_async_tx_descriptor_init(&desc->async_tx,
266 					     &schan->dma_chan);
267 		desc->async_tx.tx_submit = shdma_tx_submit;
268 		desc->mark = DESC_IDLE;
269 
270 		list_add(&desc->node, &schan->ld_free);
271 	}
272 
273 	return NR_DESCS_PER_CHANNEL;
274 
275 edescalloc:
276 	if (slave)
277 esetslave:
278 		clear_bit(slave->slave_id, shdma_slave_used);
279 	chan->private = NULL;
280 	return ret;
281 }
282 
283 static dma_async_tx_callback __ld_cleanup(struct shdma_chan *schan, bool all)
284 {
285 	struct shdma_desc *desc, *_desc;
286 	/* Is the "exposed" head of a chain acked? */
287 	bool head_acked = false;
288 	dma_cookie_t cookie = 0;
289 	dma_async_tx_callback callback = NULL;
290 	void *param = NULL;
291 	unsigned long flags;
292 
293 	spin_lock_irqsave(&schan->chan_lock, flags);
294 	list_for_each_entry_safe(desc, _desc, &schan->ld_queue, node) {
295 		struct dma_async_tx_descriptor *tx = &desc->async_tx;
296 
297 		BUG_ON(tx->cookie > 0 && tx->cookie != desc->cookie);
298 		BUG_ON(desc->mark != DESC_SUBMITTED &&
299 		       desc->mark != DESC_COMPLETED &&
300 		       desc->mark != DESC_WAITING);
301 
302 		/*
303 		 * queue is ordered, and we use this loop to (1) clean up all
304 		 * completed descriptors, and to (2) update descriptor flags of
305 		 * any chunks in a (partially) completed chain
306 		 */
307 		if (!all && desc->mark == DESC_SUBMITTED &&
308 		    desc->cookie != cookie)
309 			break;
310 
311 		if (tx->cookie > 0)
312 			cookie = tx->cookie;
313 
314 		if (desc->mark == DESC_COMPLETED && desc->chunks == 1) {
315 			if (schan->dma_chan.completed_cookie != desc->cookie - 1)
316 				dev_dbg(schan->dev,
317 					"Completing cookie %d, expected %d\n",
318 					desc->cookie,
319 					schan->dma_chan.completed_cookie + 1);
320 			schan->dma_chan.completed_cookie = desc->cookie;
321 		}
322 
323 		/* Call callback on the last chunk */
324 		if (desc->mark == DESC_COMPLETED && tx->callback) {
325 			desc->mark = DESC_WAITING;
326 			callback = tx->callback;
327 			param = tx->callback_param;
328 			dev_dbg(schan->dev, "descriptor #%d@%p on %d callback\n",
329 				tx->cookie, tx, schan->id);
330 			BUG_ON(desc->chunks != 1);
331 			break;
332 		}
333 
334 		if (tx->cookie > 0 || tx->cookie == -EBUSY) {
335 			if (desc->mark == DESC_COMPLETED) {
336 				BUG_ON(tx->cookie < 0);
337 				desc->mark = DESC_WAITING;
338 			}
339 			head_acked = async_tx_test_ack(tx);
340 		} else {
341 			switch (desc->mark) {
342 			case DESC_COMPLETED:
343 				desc->mark = DESC_WAITING;
344 				/* Fall through */
345 			case DESC_WAITING:
346 				if (head_acked)
347 					async_tx_ack(&desc->async_tx);
348 			}
349 		}
350 
351 		dev_dbg(schan->dev, "descriptor %p #%d completed.\n",
352 			tx, tx->cookie);
353 
354 		if (((desc->mark == DESC_COMPLETED ||
355 		      desc->mark == DESC_WAITING) &&
356 		     async_tx_test_ack(&desc->async_tx)) || all) {
357 			/* Remove from ld_queue list */
358 			desc->mark = DESC_IDLE;
359 
360 			list_move(&desc->node, &schan->ld_free);
361 
362 			if (list_empty(&schan->ld_queue)) {
363 				dev_dbg(schan->dev, "Bring down channel %d\n", schan->id);
364 				pm_runtime_put(schan->dev);
365 				schan->pm_state = SHDMA_PM_ESTABLISHED;
366 			}
367 		}
368 	}
369 
370 	if (all && !callback)
371 		/*
372 		 * Terminating and the loop completed normally: forgive
373 		 * uncompleted cookies
374 		 */
375 		schan->dma_chan.completed_cookie = schan->dma_chan.cookie;
376 
377 	spin_unlock_irqrestore(&schan->chan_lock, flags);
378 
379 	if (callback)
380 		callback(param);
381 
382 	return callback;
383 }
384 
385 /*
386  * shdma_chan_ld_cleanup - Clean up link descriptors
387  *
388  * Clean up the ld_queue of DMA channel.
389  */
390 static void shdma_chan_ld_cleanup(struct shdma_chan *schan, bool all)
391 {
392 	while (__ld_cleanup(schan, all))
393 		;
394 }
395 
396 /*
397  * shdma_free_chan_resources - Free all resources of the channel.
398  */
399 static void shdma_free_chan_resources(struct dma_chan *chan)
400 {
401 	struct shdma_chan *schan = to_shdma_chan(chan);
402 	struct shdma_dev *sdev = to_shdma_dev(chan->device);
403 	const struct shdma_ops *ops = sdev->ops;
404 	LIST_HEAD(list);
405 
406 	/* Protect against ISR */
407 	spin_lock_irq(&schan->chan_lock);
408 	ops->halt_channel(schan);
409 	spin_unlock_irq(&schan->chan_lock);
410 
411 	/* Now no new interrupts will occur */
412 
413 	/* Prepared and not submitted descriptors can still be on the queue */
414 	if (!list_empty(&schan->ld_queue))
415 		shdma_chan_ld_cleanup(schan, true);
416 
417 	if (schan->slave_id >= 0) {
418 		/* The caller is holding dma_list_mutex */
419 		clear_bit(schan->slave_id, shdma_slave_used);
420 		chan->private = NULL;
421 	}
422 
423 	spin_lock_irq(&schan->chan_lock);
424 
425 	list_splice_init(&schan->ld_free, &list);
426 	schan->desc_num = 0;
427 
428 	spin_unlock_irq(&schan->chan_lock);
429 
430 	kfree(schan->desc);
431 }
432 
433 /**
434  * shdma_add_desc - get, set up and return one transfer descriptor
435  * @schan:	DMA channel
436  * @flags:	DMA transfer flags
437  * @dst:	destination DMA address, incremented when direction equals
438  *		DMA_DEV_TO_MEM or DMA_MEM_TO_MEM
439  * @src:	source DMA address, incremented when direction equals
440  *		DMA_MEM_TO_DEV or DMA_MEM_TO_MEM
441  * @len:	DMA transfer length
442  * @first:	if NULL, set to the current descriptor and cookie set to -EBUSY
443  * @direction:	needed for slave DMA to decide which address to keep constant,
444  *		equals DMA_MEM_TO_MEM for MEMCPY
445  * Returns 0 or an error
446  * Locks: called with desc_lock held
447  */
448 static struct shdma_desc *shdma_add_desc(struct shdma_chan *schan,
449 	unsigned long flags, dma_addr_t *dst, dma_addr_t *src, size_t *len,
450 	struct shdma_desc **first, enum dma_transfer_direction direction)
451 {
452 	struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
453 	const struct shdma_ops *ops = sdev->ops;
454 	struct shdma_desc *new;
455 	size_t copy_size = *len;
456 
457 	if (!copy_size)
458 		return NULL;
459 
460 	/* Allocate the link descriptor from the free list */
461 	new = shdma_get_desc(schan);
462 	if (!new) {
463 		dev_err(schan->dev, "No free link descriptor available\n");
464 		return NULL;
465 	}
466 
467 	ops->desc_setup(schan, new, *src, *dst, &copy_size);
468 
469 	if (!*first) {
470 		/* First desc */
471 		new->async_tx.cookie = -EBUSY;
472 		*first = new;
473 	} else {
474 		/* Other desc - invisible to the user */
475 		new->async_tx.cookie = -EINVAL;
476 	}
477 
478 	dev_dbg(schan->dev,
479 		"chaining (%u/%u)@%x -> %x with %p, cookie %d\n",
480 		copy_size, *len, *src, *dst, &new->async_tx,
481 		new->async_tx.cookie);
482 
483 	new->mark = DESC_PREPARED;
484 	new->async_tx.flags = flags;
485 	new->direction = direction;
486 	new->partial = 0;
487 
488 	*len -= copy_size;
489 	if (direction == DMA_MEM_TO_MEM || direction == DMA_MEM_TO_DEV)
490 		*src += copy_size;
491 	if (direction == DMA_MEM_TO_MEM || direction == DMA_DEV_TO_MEM)
492 		*dst += copy_size;
493 
494 	return new;
495 }
496 
497 /*
498  * shdma_prep_sg - prepare transfer descriptors from an SG list
499  *
500  * Common routine for public (MEMCPY) and slave DMA. The MEMCPY case is also
501  * converted to scatter-gather to guarantee consistent locking and a correct
502  * list manipulation. For slave DMA direction carries the usual meaning, and,
503  * logically, the SG list is RAM and the addr variable contains slave address,
504  * e.g., the FIFO I/O register. For MEMCPY direction equals DMA_MEM_TO_MEM
505  * and the SG list contains only one element and points at the source buffer.
506  */
507 static struct dma_async_tx_descriptor *shdma_prep_sg(struct shdma_chan *schan,
508 	struct scatterlist *sgl, unsigned int sg_len, dma_addr_t *addr,
509 	enum dma_transfer_direction direction, unsigned long flags)
510 {
511 	struct scatterlist *sg;
512 	struct shdma_desc *first = NULL, *new = NULL /* compiler... */;
513 	LIST_HEAD(tx_list);
514 	int chunks = 0;
515 	unsigned long irq_flags;
516 	int i;
517 
518 	for_each_sg(sgl, sg, sg_len, i)
519 		chunks += DIV_ROUND_UP(sg_dma_len(sg), schan->max_xfer_len);
520 
521 	/* Have to lock the whole loop to protect against concurrent release */
522 	spin_lock_irqsave(&schan->chan_lock, irq_flags);
523 
524 	/*
525 	 * Chaining:
526 	 * first descriptor is what user is dealing with in all API calls, its
527 	 *	cookie is at first set to -EBUSY, at tx-submit to a positive
528 	 *	number
529 	 * if more than one chunk is needed further chunks have cookie = -EINVAL
530 	 * the last chunk, if not equal to the first, has cookie = -ENOSPC
531 	 * all chunks are linked onto the tx_list head with their .node heads
532 	 *	only during this function, then they are immediately spliced
533 	 *	back onto the free list in form of a chain
534 	 */
535 	for_each_sg(sgl, sg, sg_len, i) {
536 		dma_addr_t sg_addr = sg_dma_address(sg);
537 		size_t len = sg_dma_len(sg);
538 
539 		if (!len)
540 			goto err_get_desc;
541 
542 		do {
543 			dev_dbg(schan->dev, "Add SG #%d@%p[%d], dma %llx\n",
544 				i, sg, len, (unsigned long long)sg_addr);
545 
546 			if (direction == DMA_DEV_TO_MEM)
547 				new = shdma_add_desc(schan, flags,
548 						&sg_addr, addr, &len, &first,
549 						direction);
550 			else
551 				new = shdma_add_desc(schan, flags,
552 						addr, &sg_addr, &len, &first,
553 						direction);
554 			if (!new)
555 				goto err_get_desc;
556 
557 			new->chunks = chunks--;
558 			list_add_tail(&new->node, &tx_list);
559 		} while (len);
560 	}
561 
562 	if (new != first)
563 		new->async_tx.cookie = -ENOSPC;
564 
565 	/* Put them back on the free list, so, they don't get lost */
566 	list_splice_tail(&tx_list, &schan->ld_free);
567 
568 	spin_unlock_irqrestore(&schan->chan_lock, irq_flags);
569 
570 	return &first->async_tx;
571 
572 err_get_desc:
573 	list_for_each_entry(new, &tx_list, node)
574 		new->mark = DESC_IDLE;
575 	list_splice(&tx_list, &schan->ld_free);
576 
577 	spin_unlock_irqrestore(&schan->chan_lock, irq_flags);
578 
579 	return NULL;
580 }
581 
582 static struct dma_async_tx_descriptor *shdma_prep_memcpy(
583 	struct dma_chan *chan, dma_addr_t dma_dest, dma_addr_t dma_src,
584 	size_t len, unsigned long flags)
585 {
586 	struct shdma_chan *schan = to_shdma_chan(chan);
587 	struct scatterlist sg;
588 
589 	if (!chan || !len)
590 		return NULL;
591 
592 	BUG_ON(!schan->desc_num);
593 
594 	sg_init_table(&sg, 1);
595 	sg_set_page(&sg, pfn_to_page(PFN_DOWN(dma_src)), len,
596 		    offset_in_page(dma_src));
597 	sg_dma_address(&sg) = dma_src;
598 	sg_dma_len(&sg) = len;
599 
600 	return shdma_prep_sg(schan, &sg, 1, &dma_dest, DMA_MEM_TO_MEM, flags);
601 }
602 
603 static struct dma_async_tx_descriptor *shdma_prep_slave_sg(
604 	struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len,
605 	enum dma_transfer_direction direction, unsigned long flags, void *context)
606 {
607 	struct shdma_chan *schan = to_shdma_chan(chan);
608 	struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
609 	const struct shdma_ops *ops = sdev->ops;
610 	int slave_id = schan->slave_id;
611 	dma_addr_t slave_addr;
612 
613 	if (!chan)
614 		return NULL;
615 
616 	BUG_ON(!schan->desc_num);
617 
618 	/* Someone calling slave DMA on a generic channel? */
619 	if (slave_id < 0 || !sg_len) {
620 		dev_warn(schan->dev, "%s: bad parameter: len=%d, id=%d\n",
621 			 __func__, sg_len, slave_id);
622 		return NULL;
623 	}
624 
625 	slave_addr = ops->slave_addr(schan);
626 
627 	return shdma_prep_sg(schan, sgl, sg_len, &slave_addr,
628 			      direction, flags);
629 }
630 
631 static int shdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
632 			  unsigned long arg)
633 {
634 	struct shdma_chan *schan = to_shdma_chan(chan);
635 	struct shdma_dev *sdev = to_shdma_dev(chan->device);
636 	const struct shdma_ops *ops = sdev->ops;
637 	struct dma_slave_config *config;
638 	unsigned long flags;
639 	int ret;
640 
641 	if (!chan)
642 		return -EINVAL;
643 
644 	switch (cmd) {
645 	case DMA_TERMINATE_ALL:
646 		spin_lock_irqsave(&schan->chan_lock, flags);
647 		ops->halt_channel(schan);
648 
649 		if (ops->get_partial && !list_empty(&schan->ld_queue)) {
650 			/* Record partial transfer */
651 			struct shdma_desc *desc = list_first_entry(&schan->ld_queue,
652 						struct shdma_desc, node);
653 			desc->partial = ops->get_partial(schan, desc);
654 		}
655 
656 		spin_unlock_irqrestore(&schan->chan_lock, flags);
657 
658 		shdma_chan_ld_cleanup(schan, true);
659 		break;
660 	case DMA_SLAVE_CONFIG:
661 		/*
662 		 * So far only .slave_id is used, but the slave drivers are
663 		 * encouraged to also set a transfer direction and an address.
664 		 */
665 		if (!arg)
666 			return -EINVAL;
667 		/*
668 		 * We could lock this, but you shouldn't be configuring the
669 		 * channel, while using it...
670 		 */
671 		config = (struct dma_slave_config *)arg;
672 		ret = shdma_setup_slave(schan, config->slave_id);
673 		if (ret < 0)
674 			return ret;
675 		break;
676 	default:
677 		return -ENXIO;
678 	}
679 
680 	return 0;
681 }
682 
683 static void shdma_issue_pending(struct dma_chan *chan)
684 {
685 	struct shdma_chan *schan = to_shdma_chan(chan);
686 
687 	spin_lock_irq(&schan->chan_lock);
688 	if (schan->pm_state == SHDMA_PM_ESTABLISHED)
689 		shdma_chan_xfer_ld_queue(schan);
690 	else
691 		schan->pm_state = SHDMA_PM_PENDING;
692 	spin_unlock_irq(&schan->chan_lock);
693 }
694 
695 static enum dma_status shdma_tx_status(struct dma_chan *chan,
696 					dma_cookie_t cookie,
697 					struct dma_tx_state *txstate)
698 {
699 	struct shdma_chan *schan = to_shdma_chan(chan);
700 	enum dma_status status;
701 	unsigned long flags;
702 
703 	shdma_chan_ld_cleanup(schan, false);
704 
705 	spin_lock_irqsave(&schan->chan_lock, flags);
706 
707 	status = dma_cookie_status(chan, cookie, txstate);
708 
709 	/*
710 	 * If we don't find cookie on the queue, it has been aborted and we have
711 	 * to report error
712 	 */
713 	if (status != DMA_SUCCESS) {
714 		struct shdma_desc *sdesc;
715 		status = DMA_ERROR;
716 		list_for_each_entry(sdesc, &schan->ld_queue, node)
717 			if (sdesc->cookie == cookie) {
718 				status = DMA_IN_PROGRESS;
719 				break;
720 			}
721 	}
722 
723 	spin_unlock_irqrestore(&schan->chan_lock, flags);
724 
725 	return status;
726 }
727 
728 /* Called from error IRQ or NMI */
729 bool shdma_reset(struct shdma_dev *sdev)
730 {
731 	const struct shdma_ops *ops = sdev->ops;
732 	struct shdma_chan *schan;
733 	unsigned int handled = 0;
734 	int i;
735 
736 	/* Reset all channels */
737 	shdma_for_each_chan(schan, sdev, i) {
738 		struct shdma_desc *sdesc;
739 		LIST_HEAD(dl);
740 
741 		if (!schan)
742 			continue;
743 
744 		spin_lock(&schan->chan_lock);
745 
746 		/* Stop the channel */
747 		ops->halt_channel(schan);
748 
749 		list_splice_init(&schan->ld_queue, &dl);
750 
751 		if (!list_empty(&dl)) {
752 			dev_dbg(schan->dev, "Bring down channel %d\n", schan->id);
753 			pm_runtime_put(schan->dev);
754 		}
755 		schan->pm_state = SHDMA_PM_ESTABLISHED;
756 
757 		spin_unlock(&schan->chan_lock);
758 
759 		/* Complete all  */
760 		list_for_each_entry(sdesc, &dl, node) {
761 			struct dma_async_tx_descriptor *tx = &sdesc->async_tx;
762 			sdesc->mark = DESC_IDLE;
763 			if (tx->callback)
764 				tx->callback(tx->callback_param);
765 		}
766 
767 		spin_lock(&schan->chan_lock);
768 		list_splice(&dl, &schan->ld_free);
769 		spin_unlock(&schan->chan_lock);
770 
771 		handled++;
772 	}
773 
774 	return !!handled;
775 }
776 EXPORT_SYMBOL(shdma_reset);
777 
778 static irqreturn_t chan_irq(int irq, void *dev)
779 {
780 	struct shdma_chan *schan = dev;
781 	const struct shdma_ops *ops =
782 		to_shdma_dev(schan->dma_chan.device)->ops;
783 	irqreturn_t ret;
784 
785 	spin_lock(&schan->chan_lock);
786 
787 	ret = ops->chan_irq(schan, irq) ? IRQ_WAKE_THREAD : IRQ_NONE;
788 
789 	spin_unlock(&schan->chan_lock);
790 
791 	return ret;
792 }
793 
794 static irqreturn_t chan_irqt(int irq, void *dev)
795 {
796 	struct shdma_chan *schan = dev;
797 	const struct shdma_ops *ops =
798 		to_shdma_dev(schan->dma_chan.device)->ops;
799 	struct shdma_desc *sdesc;
800 
801 	spin_lock_irq(&schan->chan_lock);
802 	list_for_each_entry(sdesc, &schan->ld_queue, node) {
803 		if (sdesc->mark == DESC_SUBMITTED &&
804 		    ops->desc_completed(schan, sdesc)) {
805 			dev_dbg(schan->dev, "done #%d@%p\n",
806 				sdesc->async_tx.cookie, &sdesc->async_tx);
807 			sdesc->mark = DESC_COMPLETED;
808 			break;
809 		}
810 	}
811 	/* Next desc */
812 	shdma_chan_xfer_ld_queue(schan);
813 	spin_unlock_irq(&schan->chan_lock);
814 
815 	shdma_chan_ld_cleanup(schan, false);
816 
817 	return IRQ_HANDLED;
818 }
819 
820 int shdma_request_irq(struct shdma_chan *schan, int irq,
821 			   unsigned long flags, const char *name)
822 {
823 	int ret = request_threaded_irq(irq, chan_irq, chan_irqt,
824 				       flags, name, schan);
825 
826 	schan->irq = ret < 0 ? ret : irq;
827 
828 	return ret;
829 }
830 EXPORT_SYMBOL(shdma_request_irq);
831 
832 void shdma_free_irq(struct shdma_chan *schan)
833 {
834 	if (schan->irq >= 0)
835 		free_irq(schan->irq, schan);
836 }
837 EXPORT_SYMBOL(shdma_free_irq);
838 
839 void shdma_chan_probe(struct shdma_dev *sdev,
840 			   struct shdma_chan *schan, int id)
841 {
842 	schan->pm_state = SHDMA_PM_ESTABLISHED;
843 
844 	/* reference struct dma_device */
845 	schan->dma_chan.device = &sdev->dma_dev;
846 	dma_cookie_init(&schan->dma_chan);
847 
848 	schan->dev = sdev->dma_dev.dev;
849 	schan->id = id;
850 
851 	if (!schan->max_xfer_len)
852 		schan->max_xfer_len = PAGE_SIZE;
853 
854 	spin_lock_init(&schan->chan_lock);
855 
856 	/* Init descripter manage list */
857 	INIT_LIST_HEAD(&schan->ld_queue);
858 	INIT_LIST_HEAD(&schan->ld_free);
859 
860 	/* Add the channel to DMA device channel list */
861 	list_add_tail(&schan->dma_chan.device_node,
862 			&sdev->dma_dev.channels);
863 	sdev->schan[sdev->dma_dev.chancnt++] = schan;
864 }
865 EXPORT_SYMBOL(shdma_chan_probe);
866 
867 void shdma_chan_remove(struct shdma_chan *schan)
868 {
869 	list_del(&schan->dma_chan.device_node);
870 }
871 EXPORT_SYMBOL(shdma_chan_remove);
872 
873 int shdma_init(struct device *dev, struct shdma_dev *sdev,
874 		    int chan_num)
875 {
876 	struct dma_device *dma_dev = &sdev->dma_dev;
877 
878 	/*
879 	 * Require all call-backs for now, they can trivially be made optional
880 	 * later as required
881 	 */
882 	if (!sdev->ops ||
883 	    !sdev->desc_size ||
884 	    !sdev->ops->embedded_desc ||
885 	    !sdev->ops->start_xfer ||
886 	    !sdev->ops->setup_xfer ||
887 	    !sdev->ops->set_slave ||
888 	    !sdev->ops->desc_setup ||
889 	    !sdev->ops->slave_addr ||
890 	    !sdev->ops->channel_busy ||
891 	    !sdev->ops->halt_channel ||
892 	    !sdev->ops->desc_completed)
893 		return -EINVAL;
894 
895 	sdev->schan = kcalloc(chan_num, sizeof(*sdev->schan), GFP_KERNEL);
896 	if (!sdev->schan)
897 		return -ENOMEM;
898 
899 	INIT_LIST_HEAD(&dma_dev->channels);
900 
901 	/* Common and MEMCPY operations */
902 	dma_dev->device_alloc_chan_resources
903 		= shdma_alloc_chan_resources;
904 	dma_dev->device_free_chan_resources = shdma_free_chan_resources;
905 	dma_dev->device_prep_dma_memcpy = shdma_prep_memcpy;
906 	dma_dev->device_tx_status = shdma_tx_status;
907 	dma_dev->device_issue_pending = shdma_issue_pending;
908 
909 	/* Compulsory for DMA_SLAVE fields */
910 	dma_dev->device_prep_slave_sg = shdma_prep_slave_sg;
911 	dma_dev->device_control = shdma_control;
912 
913 	dma_dev->dev = dev;
914 
915 	return 0;
916 }
917 EXPORT_SYMBOL(shdma_init);
918 
919 void shdma_cleanup(struct shdma_dev *sdev)
920 {
921 	kfree(sdev->schan);
922 }
923 EXPORT_SYMBOL(shdma_cleanup);
924 
925 static int __init shdma_enter(void)
926 {
927 	shdma_slave_used = kzalloc(DIV_ROUND_UP(slave_num, BITS_PER_LONG) *
928 				    sizeof(long), GFP_KERNEL);
929 	if (!shdma_slave_used)
930 		return -ENOMEM;
931 	return 0;
932 }
933 module_init(shdma_enter);
934 
935 static void __exit shdma_exit(void)
936 {
937 	kfree(shdma_slave_used);
938 }
939 module_exit(shdma_exit);
940 
941 MODULE_LICENSE("GPL v2");
942 MODULE_DESCRIPTION("SH-DMA driver base library");
943 MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
944