17f8f209fSSinan Kaya /* 27f8f209fSSinan Kaya * Qualcomm Technologies HIDMA DMA engine Management interface 37f8f209fSSinan Kaya * 413058e33SSinan Kaya * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. 57f8f209fSSinan Kaya * 67f8f209fSSinan Kaya * This program is free software; you can redistribute it and/or modify 77f8f209fSSinan Kaya * it under the terms of the GNU General Public License version 2 and 87f8f209fSSinan Kaya * only version 2 as published by the Free Software Foundation. 97f8f209fSSinan Kaya * 107f8f209fSSinan Kaya * This program is distributed in the hope that it will be useful, 117f8f209fSSinan Kaya * but WITHOUT ANY WARRANTY; without even the implied warranty of 127f8f209fSSinan Kaya * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 137f8f209fSSinan Kaya * GNU General Public License for more details. 147f8f209fSSinan Kaya */ 157f8f209fSSinan Kaya 167f8f209fSSinan Kaya #include <linux/dmaengine.h> 177f8f209fSSinan Kaya #include <linux/acpi.h> 187f8f209fSSinan Kaya #include <linux/of.h> 197f8f209fSSinan Kaya #include <linux/property.h> 2042d236f8SSinan Kaya #include <linux/of_irq.h> 2142d236f8SSinan Kaya #include <linux/of_platform.h> 227f8f209fSSinan Kaya #include <linux/module.h> 237f8f209fSSinan Kaya #include <linux/uaccess.h> 247f8f209fSSinan Kaya #include <linux/slab.h> 257f8f209fSSinan Kaya #include <linux/pm_runtime.h> 267f8f209fSSinan Kaya #include <linux/bitops.h> 2742d236f8SSinan Kaya #include <linux/dma-mapping.h> 287f8f209fSSinan Kaya 297f8f209fSSinan Kaya #include "hidma_mgmt.h" 307f8f209fSSinan Kaya 318e734175SSinan Kaya #define HIDMA_QOS_N_OFFSET 0x700 327f8f209fSSinan Kaya #define HIDMA_CFG_OFFSET 0x400 337f8f209fSSinan Kaya #define HIDMA_MAX_BUS_REQ_LEN_OFFSET 0x41C 347f8f209fSSinan Kaya #define HIDMA_MAX_XACTIONS_OFFSET 0x420 357f8f209fSSinan Kaya #define HIDMA_HW_VERSION_OFFSET 0x424 367f8f209fSSinan Kaya #define HIDMA_CHRESET_TIMEOUT_OFFSET 0x418 377f8f209fSSinan Kaya 387f8f209fSSinan Kaya #define HIDMA_MAX_WR_XACTIONS_MASK GENMASK(4, 0) 397f8f209fSSinan Kaya #define HIDMA_MAX_RD_XACTIONS_MASK GENMASK(4, 0) 407f8f209fSSinan Kaya #define HIDMA_WEIGHT_MASK GENMASK(6, 0) 417f8f209fSSinan Kaya #define HIDMA_MAX_BUS_REQ_LEN_MASK GENMASK(15, 0) 427f8f209fSSinan Kaya #define HIDMA_CHRESET_TIMEOUT_MASK GENMASK(19, 0) 437f8f209fSSinan Kaya 447f8f209fSSinan Kaya #define HIDMA_MAX_WR_XACTIONS_BIT_POS 16 457f8f209fSSinan Kaya #define HIDMA_MAX_BUS_WR_REQ_BIT_POS 16 467f8f209fSSinan Kaya #define HIDMA_WRR_BIT_POS 8 477f8f209fSSinan Kaya #define HIDMA_PRIORITY_BIT_POS 15 487f8f209fSSinan Kaya 497f8f209fSSinan Kaya #define HIDMA_AUTOSUSPEND_TIMEOUT 2000 507f8f209fSSinan Kaya #define HIDMA_MAX_CHANNEL_WEIGHT 15 517f8f209fSSinan Kaya 5213058e33SSinan Kaya static unsigned int max_write_request; 5313058e33SSinan Kaya module_param(max_write_request, uint, 0644); 5413058e33SSinan Kaya MODULE_PARM_DESC(max_write_request, 5513058e33SSinan Kaya "maximum write burst (default: ACPI/DT value)"); 5613058e33SSinan Kaya 5713058e33SSinan Kaya static unsigned int max_read_request; 5813058e33SSinan Kaya module_param(max_read_request, uint, 0644); 5913058e33SSinan Kaya MODULE_PARM_DESC(max_read_request, 6013058e33SSinan Kaya "maximum read burst (default: ACPI/DT value)"); 6113058e33SSinan Kaya 6213058e33SSinan Kaya static unsigned int max_wr_xactions; 6313058e33SSinan Kaya module_param(max_wr_xactions, uint, 0644); 6413058e33SSinan Kaya MODULE_PARM_DESC(max_wr_xactions, 6513058e33SSinan Kaya "maximum number of write transactions (default: ACPI/DT value)"); 6613058e33SSinan Kaya 6713058e33SSinan Kaya static unsigned int max_rd_xactions; 6813058e33SSinan Kaya module_param(max_rd_xactions, uint, 0644); 6913058e33SSinan Kaya MODULE_PARM_DESC(max_rd_xactions, 7013058e33SSinan Kaya "maximum number of read transactions (default: ACPI/DT value)"); 7113058e33SSinan Kaya 727f8f209fSSinan Kaya int hidma_mgmt_setup(struct hidma_mgmt_dev *mgmtdev) 737f8f209fSSinan Kaya { 747f8f209fSSinan Kaya unsigned int i; 757f8f209fSSinan Kaya u32 val; 767f8f209fSSinan Kaya 777f8f209fSSinan Kaya if (!is_power_of_2(mgmtdev->max_write_request) || 787f8f209fSSinan Kaya (mgmtdev->max_write_request < 128) || 797f8f209fSSinan Kaya (mgmtdev->max_write_request > 1024)) { 807f8f209fSSinan Kaya dev_err(&mgmtdev->pdev->dev, "invalid write request %d\n", 817f8f209fSSinan Kaya mgmtdev->max_write_request); 827f8f209fSSinan Kaya return -EINVAL; 837f8f209fSSinan Kaya } 847f8f209fSSinan Kaya 857f8f209fSSinan Kaya if (!is_power_of_2(mgmtdev->max_read_request) || 867f8f209fSSinan Kaya (mgmtdev->max_read_request < 128) || 877f8f209fSSinan Kaya (mgmtdev->max_read_request > 1024)) { 887f8f209fSSinan Kaya dev_err(&mgmtdev->pdev->dev, "invalid read request %d\n", 897f8f209fSSinan Kaya mgmtdev->max_read_request); 907f8f209fSSinan Kaya return -EINVAL; 917f8f209fSSinan Kaya } 927f8f209fSSinan Kaya 937f8f209fSSinan Kaya if (mgmtdev->max_wr_xactions > HIDMA_MAX_WR_XACTIONS_MASK) { 947f8f209fSSinan Kaya dev_err(&mgmtdev->pdev->dev, 957f8f209fSSinan Kaya "max_wr_xactions cannot be bigger than %ld\n", 967f8f209fSSinan Kaya HIDMA_MAX_WR_XACTIONS_MASK); 977f8f209fSSinan Kaya return -EINVAL; 987f8f209fSSinan Kaya } 997f8f209fSSinan Kaya 1007f8f209fSSinan Kaya if (mgmtdev->max_rd_xactions > HIDMA_MAX_RD_XACTIONS_MASK) { 1017f8f209fSSinan Kaya dev_err(&mgmtdev->pdev->dev, 1027f8f209fSSinan Kaya "max_rd_xactions cannot be bigger than %ld\n", 1037f8f209fSSinan Kaya HIDMA_MAX_RD_XACTIONS_MASK); 1047f8f209fSSinan Kaya return -EINVAL; 1057f8f209fSSinan Kaya } 1067f8f209fSSinan Kaya 1077f8f209fSSinan Kaya for (i = 0; i < mgmtdev->dma_channels; i++) { 1087f8f209fSSinan Kaya if (mgmtdev->priority[i] > 1) { 1097f8f209fSSinan Kaya dev_err(&mgmtdev->pdev->dev, 1107f8f209fSSinan Kaya "priority can be 0 or 1\n"); 1117f8f209fSSinan Kaya return -EINVAL; 1127f8f209fSSinan Kaya } 1137f8f209fSSinan Kaya 1147f8f209fSSinan Kaya if (mgmtdev->weight[i] > HIDMA_MAX_CHANNEL_WEIGHT) { 1157f8f209fSSinan Kaya dev_err(&mgmtdev->pdev->dev, 1167f8f209fSSinan Kaya "max value of weight can be %d.\n", 1177f8f209fSSinan Kaya HIDMA_MAX_CHANNEL_WEIGHT); 1187f8f209fSSinan Kaya return -EINVAL; 1197f8f209fSSinan Kaya } 1207f8f209fSSinan Kaya 1217f8f209fSSinan Kaya /* weight needs to be at least one */ 1227f8f209fSSinan Kaya if (mgmtdev->weight[i] == 0) 1237f8f209fSSinan Kaya mgmtdev->weight[i] = 1; 1247f8f209fSSinan Kaya } 1257f8f209fSSinan Kaya 1267f8f209fSSinan Kaya pm_runtime_get_sync(&mgmtdev->pdev->dev); 1277f8f209fSSinan Kaya val = readl(mgmtdev->virtaddr + HIDMA_MAX_BUS_REQ_LEN_OFFSET); 1287f8f209fSSinan Kaya val &= ~(HIDMA_MAX_BUS_REQ_LEN_MASK << HIDMA_MAX_BUS_WR_REQ_BIT_POS); 1297f8f209fSSinan Kaya val |= mgmtdev->max_write_request << HIDMA_MAX_BUS_WR_REQ_BIT_POS; 1307f8f209fSSinan Kaya val &= ~HIDMA_MAX_BUS_REQ_LEN_MASK; 1317f8f209fSSinan Kaya val |= mgmtdev->max_read_request; 1327f8f209fSSinan Kaya writel(val, mgmtdev->virtaddr + HIDMA_MAX_BUS_REQ_LEN_OFFSET); 1337f8f209fSSinan Kaya 1347f8f209fSSinan Kaya val = readl(mgmtdev->virtaddr + HIDMA_MAX_XACTIONS_OFFSET); 1357f8f209fSSinan Kaya val &= ~(HIDMA_MAX_WR_XACTIONS_MASK << HIDMA_MAX_WR_XACTIONS_BIT_POS); 1367f8f209fSSinan Kaya val |= mgmtdev->max_wr_xactions << HIDMA_MAX_WR_XACTIONS_BIT_POS; 1377f8f209fSSinan Kaya val &= ~HIDMA_MAX_RD_XACTIONS_MASK; 1387f8f209fSSinan Kaya val |= mgmtdev->max_rd_xactions; 1397f8f209fSSinan Kaya writel(val, mgmtdev->virtaddr + HIDMA_MAX_XACTIONS_OFFSET); 1407f8f209fSSinan Kaya 1417f8f209fSSinan Kaya mgmtdev->hw_version = 1427f8f209fSSinan Kaya readl(mgmtdev->virtaddr + HIDMA_HW_VERSION_OFFSET); 1437f8f209fSSinan Kaya mgmtdev->hw_version_major = (mgmtdev->hw_version >> 28) & 0xF; 1447f8f209fSSinan Kaya mgmtdev->hw_version_minor = (mgmtdev->hw_version >> 16) & 0xF; 1457f8f209fSSinan Kaya 1467f8f209fSSinan Kaya for (i = 0; i < mgmtdev->dma_channels; i++) { 1477f8f209fSSinan Kaya u32 weight = mgmtdev->weight[i]; 1487f8f209fSSinan Kaya u32 priority = mgmtdev->priority[i]; 1497f8f209fSSinan Kaya 1507f8f209fSSinan Kaya val = readl(mgmtdev->virtaddr + HIDMA_QOS_N_OFFSET + (4 * i)); 1517f8f209fSSinan Kaya val &= ~(1 << HIDMA_PRIORITY_BIT_POS); 1527f8f209fSSinan Kaya val |= (priority & 0x1) << HIDMA_PRIORITY_BIT_POS; 1537f8f209fSSinan Kaya val &= ~(HIDMA_WEIGHT_MASK << HIDMA_WRR_BIT_POS); 1547f8f209fSSinan Kaya val |= (weight & HIDMA_WEIGHT_MASK) << HIDMA_WRR_BIT_POS; 1557f8f209fSSinan Kaya writel(val, mgmtdev->virtaddr + HIDMA_QOS_N_OFFSET + (4 * i)); 1567f8f209fSSinan Kaya } 1577f8f209fSSinan Kaya 1587f8f209fSSinan Kaya val = readl(mgmtdev->virtaddr + HIDMA_CHRESET_TIMEOUT_OFFSET); 1597f8f209fSSinan Kaya val &= ~HIDMA_CHRESET_TIMEOUT_MASK; 1607f8f209fSSinan Kaya val |= mgmtdev->chreset_timeout_cycles & HIDMA_CHRESET_TIMEOUT_MASK; 1617f8f209fSSinan Kaya writel(val, mgmtdev->virtaddr + HIDMA_CHRESET_TIMEOUT_OFFSET); 1627f8f209fSSinan Kaya 1637f8f209fSSinan Kaya pm_runtime_mark_last_busy(&mgmtdev->pdev->dev); 1647f8f209fSSinan Kaya pm_runtime_put_autosuspend(&mgmtdev->pdev->dev); 1657f8f209fSSinan Kaya return 0; 1667f8f209fSSinan Kaya } 1677f8f209fSSinan Kaya EXPORT_SYMBOL_GPL(hidma_mgmt_setup); 1687f8f209fSSinan Kaya 1697f8f209fSSinan Kaya static int hidma_mgmt_probe(struct platform_device *pdev) 1707f8f209fSSinan Kaya { 1717f8f209fSSinan Kaya struct hidma_mgmt_dev *mgmtdev; 1727f8f209fSSinan Kaya struct resource *res; 1737f8f209fSSinan Kaya void __iomem *virtaddr; 1747f8f209fSSinan Kaya int irq; 1757f8f209fSSinan Kaya int rc; 1767f8f209fSSinan Kaya u32 val; 1777f8f209fSSinan Kaya 1787f8f209fSSinan Kaya pm_runtime_set_autosuspend_delay(&pdev->dev, HIDMA_AUTOSUSPEND_TIMEOUT); 1797f8f209fSSinan Kaya pm_runtime_use_autosuspend(&pdev->dev); 1807f8f209fSSinan Kaya pm_runtime_set_active(&pdev->dev); 1817f8f209fSSinan Kaya pm_runtime_enable(&pdev->dev); 1827f8f209fSSinan Kaya pm_runtime_get_sync(&pdev->dev); 1837f8f209fSSinan Kaya 1847f8f209fSSinan Kaya res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1857f8f209fSSinan Kaya virtaddr = devm_ioremap_resource(&pdev->dev, res); 1867f8f209fSSinan Kaya if (IS_ERR(virtaddr)) { 1877f8f209fSSinan Kaya rc = -ENOMEM; 1887f8f209fSSinan Kaya goto out; 1897f8f209fSSinan Kaya } 1907f8f209fSSinan Kaya 1917f8f209fSSinan Kaya irq = platform_get_irq(pdev, 0); 1927f8f209fSSinan Kaya if (irq < 0) { 1937f8f209fSSinan Kaya dev_err(&pdev->dev, "irq resources not found\n"); 1947f8f209fSSinan Kaya rc = irq; 1957f8f209fSSinan Kaya goto out; 1967f8f209fSSinan Kaya } 1977f8f209fSSinan Kaya 1987f8f209fSSinan Kaya mgmtdev = devm_kzalloc(&pdev->dev, sizeof(*mgmtdev), GFP_KERNEL); 1997f8f209fSSinan Kaya if (!mgmtdev) { 2007f8f209fSSinan Kaya rc = -ENOMEM; 2017f8f209fSSinan Kaya goto out; 2027f8f209fSSinan Kaya } 2037f8f209fSSinan Kaya 2047f8f209fSSinan Kaya mgmtdev->pdev = pdev; 2057f8f209fSSinan Kaya mgmtdev->addrsize = resource_size(res); 2067f8f209fSSinan Kaya mgmtdev->virtaddr = virtaddr; 2077f8f209fSSinan Kaya 2087f8f209fSSinan Kaya rc = device_property_read_u32(&pdev->dev, "dma-channels", 2097f8f209fSSinan Kaya &mgmtdev->dma_channels); 2107f8f209fSSinan Kaya if (rc) { 2117f8f209fSSinan Kaya dev_err(&pdev->dev, "number of channels missing\n"); 2127f8f209fSSinan Kaya goto out; 2137f8f209fSSinan Kaya } 2147f8f209fSSinan Kaya 2157f8f209fSSinan Kaya rc = device_property_read_u32(&pdev->dev, 2167f8f209fSSinan Kaya "channel-reset-timeout-cycles", 2177f8f209fSSinan Kaya &mgmtdev->chreset_timeout_cycles); 2187f8f209fSSinan Kaya if (rc) { 2197f8f209fSSinan Kaya dev_err(&pdev->dev, "channel reset timeout missing\n"); 2207f8f209fSSinan Kaya goto out; 2217f8f209fSSinan Kaya } 2227f8f209fSSinan Kaya 2237f8f209fSSinan Kaya rc = device_property_read_u32(&pdev->dev, "max-write-burst-bytes", 2247f8f209fSSinan Kaya &mgmtdev->max_write_request); 2257f8f209fSSinan Kaya if (rc) { 2267f8f209fSSinan Kaya dev_err(&pdev->dev, "max-write-burst-bytes missing\n"); 2277f8f209fSSinan Kaya goto out; 2287f8f209fSSinan Kaya } 2297f8f209fSSinan Kaya 2300217cccdSSinan Kaya if (max_write_request && 2310217cccdSSinan Kaya (max_write_request != mgmtdev->max_write_request)) { 23213058e33SSinan Kaya dev_info(&pdev->dev, "overriding max-write-burst-bytes: %d\n", 23313058e33SSinan Kaya max_write_request); 23413058e33SSinan Kaya mgmtdev->max_write_request = max_write_request; 23513058e33SSinan Kaya } else 23613058e33SSinan Kaya max_write_request = mgmtdev->max_write_request; 23713058e33SSinan Kaya 2387f8f209fSSinan Kaya rc = device_property_read_u32(&pdev->dev, "max-read-burst-bytes", 2397f8f209fSSinan Kaya &mgmtdev->max_read_request); 2407f8f209fSSinan Kaya if (rc) { 2417f8f209fSSinan Kaya dev_err(&pdev->dev, "max-read-burst-bytes missing\n"); 2427f8f209fSSinan Kaya goto out; 2437f8f209fSSinan Kaya } 2440217cccdSSinan Kaya if (max_read_request && 2450217cccdSSinan Kaya (max_read_request != mgmtdev->max_read_request)) { 24613058e33SSinan Kaya dev_info(&pdev->dev, "overriding max-read-burst-bytes: %d\n", 24713058e33SSinan Kaya max_read_request); 24813058e33SSinan Kaya mgmtdev->max_read_request = max_read_request; 24913058e33SSinan Kaya } else 25013058e33SSinan Kaya max_read_request = mgmtdev->max_read_request; 2517f8f209fSSinan Kaya 2527f8f209fSSinan Kaya rc = device_property_read_u32(&pdev->dev, "max-write-transactions", 2537f8f209fSSinan Kaya &mgmtdev->max_wr_xactions); 2547f8f209fSSinan Kaya if (rc) { 2557f8f209fSSinan Kaya dev_err(&pdev->dev, "max-write-transactions missing\n"); 2567f8f209fSSinan Kaya goto out; 2577f8f209fSSinan Kaya } 2580217cccdSSinan Kaya if (max_wr_xactions && 2590217cccdSSinan Kaya (max_wr_xactions != mgmtdev->max_wr_xactions)) { 26013058e33SSinan Kaya dev_info(&pdev->dev, "overriding max-write-transactions: %d\n", 26113058e33SSinan Kaya max_wr_xactions); 26213058e33SSinan Kaya mgmtdev->max_wr_xactions = max_wr_xactions; 26313058e33SSinan Kaya } else 26413058e33SSinan Kaya max_wr_xactions = mgmtdev->max_wr_xactions; 2657f8f209fSSinan Kaya 2667f8f209fSSinan Kaya rc = device_property_read_u32(&pdev->dev, "max-read-transactions", 2677f8f209fSSinan Kaya &mgmtdev->max_rd_xactions); 2687f8f209fSSinan Kaya if (rc) { 2697f8f209fSSinan Kaya dev_err(&pdev->dev, "max-read-transactions missing\n"); 2707f8f209fSSinan Kaya goto out; 2717f8f209fSSinan Kaya } 2720217cccdSSinan Kaya if (max_rd_xactions && 2730217cccdSSinan Kaya (max_rd_xactions != mgmtdev->max_rd_xactions)) { 27413058e33SSinan Kaya dev_info(&pdev->dev, "overriding max-read-transactions: %d\n", 27513058e33SSinan Kaya max_rd_xactions); 27613058e33SSinan Kaya mgmtdev->max_rd_xactions = max_rd_xactions; 27713058e33SSinan Kaya } else 27813058e33SSinan Kaya max_rd_xactions = mgmtdev->max_rd_xactions; 2797f8f209fSSinan Kaya 2807f8f209fSSinan Kaya mgmtdev->priority = devm_kcalloc(&pdev->dev, 2817f8f209fSSinan Kaya mgmtdev->dma_channels, 2827f8f209fSSinan Kaya sizeof(*mgmtdev->priority), 2837f8f209fSSinan Kaya GFP_KERNEL); 2847f8f209fSSinan Kaya if (!mgmtdev->priority) { 2857f8f209fSSinan Kaya rc = -ENOMEM; 2867f8f209fSSinan Kaya goto out; 2877f8f209fSSinan Kaya } 2887f8f209fSSinan Kaya 2897f8f209fSSinan Kaya mgmtdev->weight = devm_kcalloc(&pdev->dev, 2907f8f209fSSinan Kaya mgmtdev->dma_channels, 2917f8f209fSSinan Kaya sizeof(*mgmtdev->weight), GFP_KERNEL); 2927f8f209fSSinan Kaya if (!mgmtdev->weight) { 2937f8f209fSSinan Kaya rc = -ENOMEM; 2947f8f209fSSinan Kaya goto out; 2957f8f209fSSinan Kaya } 2967f8f209fSSinan Kaya 2977f8f209fSSinan Kaya rc = hidma_mgmt_setup(mgmtdev); 2987f8f209fSSinan Kaya if (rc) { 2997f8f209fSSinan Kaya dev_err(&pdev->dev, "setup failed\n"); 3007f8f209fSSinan Kaya goto out; 3017f8f209fSSinan Kaya } 3027f8f209fSSinan Kaya 3037f8f209fSSinan Kaya /* start the HW */ 3047f8f209fSSinan Kaya val = readl(mgmtdev->virtaddr + HIDMA_CFG_OFFSET); 3057f8f209fSSinan Kaya val |= 1; 3067f8f209fSSinan Kaya writel(val, mgmtdev->virtaddr + HIDMA_CFG_OFFSET); 3077f8f209fSSinan Kaya 3087f8f209fSSinan Kaya rc = hidma_mgmt_init_sys(mgmtdev); 3097f8f209fSSinan Kaya if (rc) { 3107f8f209fSSinan Kaya dev_err(&pdev->dev, "sysfs setup failed\n"); 3117f8f209fSSinan Kaya goto out; 3127f8f209fSSinan Kaya } 3137f8f209fSSinan Kaya 3147f8f209fSSinan Kaya dev_info(&pdev->dev, 3157f8f209fSSinan Kaya "HW rev: %d.%d @ %pa with %d physical channels\n", 3167f8f209fSSinan Kaya mgmtdev->hw_version_major, mgmtdev->hw_version_minor, 3177f8f209fSSinan Kaya &res->start, mgmtdev->dma_channels); 3187f8f209fSSinan Kaya 3197f8f209fSSinan Kaya platform_set_drvdata(pdev, mgmtdev); 3207f8f209fSSinan Kaya pm_runtime_mark_last_busy(&pdev->dev); 3217f8f209fSSinan Kaya pm_runtime_put_autosuspend(&pdev->dev); 3227f8f209fSSinan Kaya return 0; 3237f8f209fSSinan Kaya out: 3247f8f209fSSinan Kaya pm_runtime_put_sync_suspend(&pdev->dev); 3257f8f209fSSinan Kaya pm_runtime_disable(&pdev->dev); 3267f8f209fSSinan Kaya return rc; 3277f8f209fSSinan Kaya } 3287f8f209fSSinan Kaya 3297f8f209fSSinan Kaya #if IS_ENABLED(CONFIG_ACPI) 3307f8f209fSSinan Kaya static const struct acpi_device_id hidma_mgmt_acpi_ids[] = { 3317f8f209fSSinan Kaya {"QCOM8060"}, 3327f8f209fSSinan Kaya {}, 3337f8f209fSSinan Kaya }; 33475ff7668SSinan Kaya MODULE_DEVICE_TABLE(acpi, hidma_mgmt_acpi_ids); 3357f8f209fSSinan Kaya #endif 3367f8f209fSSinan Kaya 3377f8f209fSSinan Kaya static const struct of_device_id hidma_mgmt_match[] = { 3387f8f209fSSinan Kaya {.compatible = "qcom,hidma-mgmt-1.0",}, 3397f8f209fSSinan Kaya {}, 3407f8f209fSSinan Kaya }; 3417f8f209fSSinan Kaya MODULE_DEVICE_TABLE(of, hidma_mgmt_match); 3427f8f209fSSinan Kaya 3437f8f209fSSinan Kaya static struct platform_driver hidma_mgmt_driver = { 3447f8f209fSSinan Kaya .probe = hidma_mgmt_probe, 3457f8f209fSSinan Kaya .driver = { 3467f8f209fSSinan Kaya .name = "hidma-mgmt", 3477f8f209fSSinan Kaya .of_match_table = hidma_mgmt_match, 3487f8f209fSSinan Kaya .acpi_match_table = ACPI_PTR(hidma_mgmt_acpi_ids), 3497f8f209fSSinan Kaya }, 3507f8f209fSSinan Kaya }; 3517f8f209fSSinan Kaya 35242d236f8SSinan Kaya #if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ) 35342d236f8SSinan Kaya static int object_counter; 35442d236f8SSinan Kaya 35542d236f8SSinan Kaya static int __init hidma_mgmt_of_populate_channels(struct device_node *np) 35642d236f8SSinan Kaya { 35742d236f8SSinan Kaya struct platform_device *pdev_parent = of_find_device_by_node(np); 35842d236f8SSinan Kaya struct platform_device_info pdevinfo; 35942d236f8SSinan Kaya struct of_phandle_args out_irq; 36042d236f8SSinan Kaya struct device_node *child; 36142d236f8SSinan Kaya struct resource *res; 36242d236f8SSinan Kaya const __be32 *cell; 36342d236f8SSinan Kaya int ret = 0, size, i, num; 36442d236f8SSinan Kaya u64 addr, addr_size; 36542d236f8SSinan Kaya 36642d236f8SSinan Kaya for_each_available_child_of_node(np, child) { 36742d236f8SSinan Kaya struct resource *res_iter; 36842d236f8SSinan Kaya struct platform_device *new_pdev; 36942d236f8SSinan Kaya 37042d236f8SSinan Kaya cell = of_get_property(child, "reg", &size); 37142d236f8SSinan Kaya if (!cell) { 37242d236f8SSinan Kaya ret = -EINVAL; 37342d236f8SSinan Kaya goto out; 37442d236f8SSinan Kaya } 37542d236f8SSinan Kaya 37642d236f8SSinan Kaya size /= sizeof(*cell); 37742d236f8SSinan Kaya num = size / 37842d236f8SSinan Kaya (of_n_addr_cells(child) + of_n_size_cells(child)) + 1; 37942d236f8SSinan Kaya 38042d236f8SSinan Kaya /* allocate a resource array */ 38142d236f8SSinan Kaya res = kcalloc(num, sizeof(*res), GFP_KERNEL); 38242d236f8SSinan Kaya if (!res) { 38342d236f8SSinan Kaya ret = -ENOMEM; 38442d236f8SSinan Kaya goto out; 38542d236f8SSinan Kaya } 38642d236f8SSinan Kaya 38742d236f8SSinan Kaya /* read each reg value */ 38842d236f8SSinan Kaya i = 0; 38942d236f8SSinan Kaya res_iter = res; 39042d236f8SSinan Kaya while (i < size) { 39142d236f8SSinan Kaya addr = of_read_number(&cell[i], 39242d236f8SSinan Kaya of_n_addr_cells(child)); 39342d236f8SSinan Kaya i += of_n_addr_cells(child); 39442d236f8SSinan Kaya 39542d236f8SSinan Kaya addr_size = of_read_number(&cell[i], 39642d236f8SSinan Kaya of_n_size_cells(child)); 39742d236f8SSinan Kaya i += of_n_size_cells(child); 39842d236f8SSinan Kaya 39942d236f8SSinan Kaya res_iter->start = addr; 40042d236f8SSinan Kaya res_iter->end = res_iter->start + addr_size - 1; 40142d236f8SSinan Kaya res_iter->flags = IORESOURCE_MEM; 40242d236f8SSinan Kaya res_iter++; 40342d236f8SSinan Kaya } 40442d236f8SSinan Kaya 40542d236f8SSinan Kaya ret = of_irq_parse_one(child, 0, &out_irq); 40642d236f8SSinan Kaya if (ret) 40742d236f8SSinan Kaya goto out; 40842d236f8SSinan Kaya 40942d236f8SSinan Kaya res_iter->start = irq_create_of_mapping(&out_irq); 41042d236f8SSinan Kaya res_iter->name = "hidma event irq"; 41142d236f8SSinan Kaya res_iter->flags = IORESOURCE_IRQ; 41242d236f8SSinan Kaya 41342d236f8SSinan Kaya memset(&pdevinfo, 0, sizeof(pdevinfo)); 41442d236f8SSinan Kaya pdevinfo.fwnode = &child->fwnode; 41542d236f8SSinan Kaya pdevinfo.parent = pdev_parent ? &pdev_parent->dev : NULL; 41642d236f8SSinan Kaya pdevinfo.name = child->name; 41742d236f8SSinan Kaya pdevinfo.id = object_counter++; 41842d236f8SSinan Kaya pdevinfo.res = res; 41942d236f8SSinan Kaya pdevinfo.num_res = num; 42042d236f8SSinan Kaya pdevinfo.data = NULL; 42142d236f8SSinan Kaya pdevinfo.size_data = 0; 42242d236f8SSinan Kaya pdevinfo.dma_mask = DMA_BIT_MASK(64); 42342d236f8SSinan Kaya new_pdev = platform_device_register_full(&pdevinfo); 4246a2cf55dSWei Yongjun if (IS_ERR(new_pdev)) { 4256a2cf55dSWei Yongjun ret = PTR_ERR(new_pdev); 42642d236f8SSinan Kaya goto out; 42742d236f8SSinan Kaya } 4289da0be80SSinan Kaya of_node_get(child); 4299da0be80SSinan Kaya new_pdev->dev.of_node = child; 43042d236f8SSinan Kaya of_dma_configure(&new_pdev->dev, child); 4319da0be80SSinan Kaya /* 4329da0be80SSinan Kaya * It is assumed that calling of_msi_configure is safe on 4339da0be80SSinan Kaya * platforms with or without MSI support. 4349da0be80SSinan Kaya */ 4359da0be80SSinan Kaya of_msi_configure(&new_pdev->dev, child); 4369da0be80SSinan Kaya of_node_put(child); 43742d236f8SSinan Kaya kfree(res); 43842d236f8SSinan Kaya res = NULL; 43942d236f8SSinan Kaya } 44042d236f8SSinan Kaya out: 44142d236f8SSinan Kaya kfree(res); 44242d236f8SSinan Kaya 44342d236f8SSinan Kaya return ret; 44442d236f8SSinan Kaya } 44542d236f8SSinan Kaya #endif 44642d236f8SSinan Kaya 44742d236f8SSinan Kaya static int __init hidma_mgmt_init(void) 44842d236f8SSinan Kaya { 44942d236f8SSinan Kaya #if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ) 45042d236f8SSinan Kaya struct device_node *child; 45142d236f8SSinan Kaya 452d8cc38ddSWei Yongjun for_each_matching_node(child, hidma_mgmt_match) { 45342d236f8SSinan Kaya /* device tree based firmware here */ 45442d236f8SSinan Kaya hidma_mgmt_of_populate_channels(child); 45542d236f8SSinan Kaya } 45642d236f8SSinan Kaya #endif 45742d236f8SSinan Kaya platform_driver_register(&hidma_mgmt_driver); 45842d236f8SSinan Kaya 45942d236f8SSinan Kaya return 0; 46042d236f8SSinan Kaya } 46142d236f8SSinan Kaya module_init(hidma_mgmt_init); 4627f8f209fSSinan Kaya MODULE_LICENSE("GPL v2"); 463