1 /* 2 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the Free 6 * Software Foundation; either version 2 of the License, or (at your option) 7 * any later version. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called COPYING. 16 */ 17 18 /* 19 * This code implements the DMA subsystem. It provides a HW-neutral interface 20 * for other kernel code to use asynchronous memory copy capabilities, 21 * if present, and allows different HW DMA drivers to register as providing 22 * this capability. 23 * 24 * Due to the fact we are accelerating what is already a relatively fast 25 * operation, the code goes to great lengths to avoid additional overhead, 26 * such as locking. 27 * 28 * LOCKING: 29 * 30 * The subsystem keeps a global list of dma_device structs it is protected by a 31 * mutex, dma_list_mutex. 32 * 33 * A subsystem can get access to a channel by calling dmaengine_get() followed 34 * by dma_find_channel(), or if it has need for an exclusive channel it can call 35 * dma_request_channel(). Once a channel is allocated a reference is taken 36 * against its corresponding driver to disable removal. 37 * 38 * Each device has a channels list, which runs unlocked but is never modified 39 * once the device is registered, it's just setup by the driver. 40 * 41 * See Documentation/dmaengine.txt for more details 42 */ 43 44 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 45 46 #include <linux/dma-mapping.h> 47 #include <linux/init.h> 48 #include <linux/module.h> 49 #include <linux/mm.h> 50 #include <linux/device.h> 51 #include <linux/dmaengine.h> 52 #include <linux/hardirq.h> 53 #include <linux/spinlock.h> 54 #include <linux/percpu.h> 55 #include <linux/rcupdate.h> 56 #include <linux/mutex.h> 57 #include <linux/jiffies.h> 58 #include <linux/rculist.h> 59 #include <linux/idr.h> 60 #include <linux/slab.h> 61 #include <linux/acpi.h> 62 #include <linux/acpi_dma.h> 63 #include <linux/of_dma.h> 64 #include <linux/mempool.h> 65 66 static DEFINE_MUTEX(dma_list_mutex); 67 static DEFINE_IDR(dma_idr); 68 static LIST_HEAD(dma_device_list); 69 static long dmaengine_ref_count; 70 71 /* --- sysfs implementation --- */ 72 73 /** 74 * dev_to_dma_chan - convert a device pointer to the its sysfs container object 75 * @dev - device node 76 * 77 * Must be called under dma_list_mutex 78 */ 79 static struct dma_chan *dev_to_dma_chan(struct device *dev) 80 { 81 struct dma_chan_dev *chan_dev; 82 83 chan_dev = container_of(dev, typeof(*chan_dev), device); 84 return chan_dev->chan; 85 } 86 87 static ssize_t memcpy_count_show(struct device *dev, 88 struct device_attribute *attr, char *buf) 89 { 90 struct dma_chan *chan; 91 unsigned long count = 0; 92 int i; 93 int err; 94 95 mutex_lock(&dma_list_mutex); 96 chan = dev_to_dma_chan(dev); 97 if (chan) { 98 for_each_possible_cpu(i) 99 count += per_cpu_ptr(chan->local, i)->memcpy_count; 100 err = sprintf(buf, "%lu\n", count); 101 } else 102 err = -ENODEV; 103 mutex_unlock(&dma_list_mutex); 104 105 return err; 106 } 107 static DEVICE_ATTR_RO(memcpy_count); 108 109 static ssize_t bytes_transferred_show(struct device *dev, 110 struct device_attribute *attr, char *buf) 111 { 112 struct dma_chan *chan; 113 unsigned long count = 0; 114 int i; 115 int err; 116 117 mutex_lock(&dma_list_mutex); 118 chan = dev_to_dma_chan(dev); 119 if (chan) { 120 for_each_possible_cpu(i) 121 count += per_cpu_ptr(chan->local, i)->bytes_transferred; 122 err = sprintf(buf, "%lu\n", count); 123 } else 124 err = -ENODEV; 125 mutex_unlock(&dma_list_mutex); 126 127 return err; 128 } 129 static DEVICE_ATTR_RO(bytes_transferred); 130 131 static ssize_t in_use_show(struct device *dev, struct device_attribute *attr, 132 char *buf) 133 { 134 struct dma_chan *chan; 135 int err; 136 137 mutex_lock(&dma_list_mutex); 138 chan = dev_to_dma_chan(dev); 139 if (chan) 140 err = sprintf(buf, "%d\n", chan->client_count); 141 else 142 err = -ENODEV; 143 mutex_unlock(&dma_list_mutex); 144 145 return err; 146 } 147 static DEVICE_ATTR_RO(in_use); 148 149 static struct attribute *dma_dev_attrs[] = { 150 &dev_attr_memcpy_count.attr, 151 &dev_attr_bytes_transferred.attr, 152 &dev_attr_in_use.attr, 153 NULL, 154 }; 155 ATTRIBUTE_GROUPS(dma_dev); 156 157 static void chan_dev_release(struct device *dev) 158 { 159 struct dma_chan_dev *chan_dev; 160 161 chan_dev = container_of(dev, typeof(*chan_dev), device); 162 if (atomic_dec_and_test(chan_dev->idr_ref)) { 163 mutex_lock(&dma_list_mutex); 164 idr_remove(&dma_idr, chan_dev->dev_id); 165 mutex_unlock(&dma_list_mutex); 166 kfree(chan_dev->idr_ref); 167 } 168 kfree(chan_dev); 169 } 170 171 static struct class dma_devclass = { 172 .name = "dma", 173 .dev_groups = dma_dev_groups, 174 .dev_release = chan_dev_release, 175 }; 176 177 /* --- client and device registration --- */ 178 179 #define dma_device_satisfies_mask(device, mask) \ 180 __dma_device_satisfies_mask((device), &(mask)) 181 static int 182 __dma_device_satisfies_mask(struct dma_device *device, 183 const dma_cap_mask_t *want) 184 { 185 dma_cap_mask_t has; 186 187 bitmap_and(has.bits, want->bits, device->cap_mask.bits, 188 DMA_TX_TYPE_END); 189 return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END); 190 } 191 192 static struct module *dma_chan_to_owner(struct dma_chan *chan) 193 { 194 return chan->device->dev->driver->owner; 195 } 196 197 /** 198 * balance_ref_count - catch up the channel reference count 199 * @chan - channel to balance ->client_count versus dmaengine_ref_count 200 * 201 * balance_ref_count must be called under dma_list_mutex 202 */ 203 static void balance_ref_count(struct dma_chan *chan) 204 { 205 struct module *owner = dma_chan_to_owner(chan); 206 207 while (chan->client_count < dmaengine_ref_count) { 208 __module_get(owner); 209 chan->client_count++; 210 } 211 } 212 213 /** 214 * dma_chan_get - try to grab a dma channel's parent driver module 215 * @chan - channel to grab 216 * 217 * Must be called under dma_list_mutex 218 */ 219 static int dma_chan_get(struct dma_chan *chan) 220 { 221 struct module *owner = dma_chan_to_owner(chan); 222 int ret; 223 224 /* The channel is already in use, update client count */ 225 if (chan->client_count) { 226 __module_get(owner); 227 goto out; 228 } 229 230 if (!try_module_get(owner)) 231 return -ENODEV; 232 233 /* allocate upon first client reference */ 234 if (chan->device->device_alloc_chan_resources) { 235 ret = chan->device->device_alloc_chan_resources(chan); 236 if (ret < 0) 237 goto err_out; 238 } 239 240 if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask)) 241 balance_ref_count(chan); 242 243 out: 244 chan->client_count++; 245 return 0; 246 247 err_out: 248 module_put(owner); 249 return ret; 250 } 251 252 /** 253 * dma_chan_put - drop a reference to a dma channel's parent driver module 254 * @chan - channel to release 255 * 256 * Must be called under dma_list_mutex 257 */ 258 static void dma_chan_put(struct dma_chan *chan) 259 { 260 /* This channel is not in use, bail out */ 261 if (!chan->client_count) 262 return; 263 264 chan->client_count--; 265 module_put(dma_chan_to_owner(chan)); 266 267 /* This channel is not in use anymore, free it */ 268 if (!chan->client_count && chan->device->device_free_chan_resources) 269 chan->device->device_free_chan_resources(chan); 270 } 271 272 enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) 273 { 274 enum dma_status status; 275 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); 276 277 dma_async_issue_pending(chan); 278 do { 279 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); 280 if (time_after_eq(jiffies, dma_sync_wait_timeout)) { 281 pr_err("%s: timeout!\n", __func__); 282 return DMA_ERROR; 283 } 284 if (status != DMA_IN_PROGRESS) 285 break; 286 cpu_relax(); 287 } while (1); 288 289 return status; 290 } 291 EXPORT_SYMBOL(dma_sync_wait); 292 293 /** 294 * dma_cap_mask_all - enable iteration over all operation types 295 */ 296 static dma_cap_mask_t dma_cap_mask_all; 297 298 /** 299 * dma_chan_tbl_ent - tracks channel allocations per core/operation 300 * @chan - associated channel for this entry 301 */ 302 struct dma_chan_tbl_ent { 303 struct dma_chan *chan; 304 }; 305 306 /** 307 * channel_table - percpu lookup table for memory-to-memory offload providers 308 */ 309 static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END]; 310 311 static int __init dma_channel_table_init(void) 312 { 313 enum dma_transaction_type cap; 314 int err = 0; 315 316 bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END); 317 318 /* 'interrupt', 'private', and 'slave' are channel capabilities, 319 * but are not associated with an operation so they do not need 320 * an entry in the channel_table 321 */ 322 clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits); 323 clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits); 324 clear_bit(DMA_SLAVE, dma_cap_mask_all.bits); 325 326 for_each_dma_cap_mask(cap, dma_cap_mask_all) { 327 channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent); 328 if (!channel_table[cap]) { 329 err = -ENOMEM; 330 break; 331 } 332 } 333 334 if (err) { 335 pr_err("initialization failure\n"); 336 for_each_dma_cap_mask(cap, dma_cap_mask_all) 337 free_percpu(channel_table[cap]); 338 } 339 340 return err; 341 } 342 arch_initcall(dma_channel_table_init); 343 344 /** 345 * dma_find_channel - find a channel to carry out the operation 346 * @tx_type: transaction type 347 */ 348 struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type) 349 { 350 return this_cpu_read(channel_table[tx_type]->chan); 351 } 352 EXPORT_SYMBOL(dma_find_channel); 353 354 /** 355 * dma_issue_pending_all - flush all pending operations across all channels 356 */ 357 void dma_issue_pending_all(void) 358 { 359 struct dma_device *device; 360 struct dma_chan *chan; 361 362 rcu_read_lock(); 363 list_for_each_entry_rcu(device, &dma_device_list, global_node) { 364 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 365 continue; 366 list_for_each_entry(chan, &device->channels, device_node) 367 if (chan->client_count) 368 device->device_issue_pending(chan); 369 } 370 rcu_read_unlock(); 371 } 372 EXPORT_SYMBOL(dma_issue_pending_all); 373 374 /** 375 * dma_chan_is_local - returns true if the channel is in the same numa-node as the cpu 376 */ 377 static bool dma_chan_is_local(struct dma_chan *chan, int cpu) 378 { 379 int node = dev_to_node(chan->device->dev); 380 return node == -1 || cpumask_test_cpu(cpu, cpumask_of_node(node)); 381 } 382 383 /** 384 * min_chan - returns the channel with min count and in the same numa-node as the cpu 385 * @cap: capability to match 386 * @cpu: cpu index which the channel should be close to 387 * 388 * If some channels are close to the given cpu, the one with the lowest 389 * reference count is returned. Otherwise, cpu is ignored and only the 390 * reference count is taken into account. 391 * Must be called under dma_list_mutex. 392 */ 393 static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu) 394 { 395 struct dma_device *device; 396 struct dma_chan *chan; 397 struct dma_chan *min = NULL; 398 struct dma_chan *localmin = NULL; 399 400 list_for_each_entry(device, &dma_device_list, global_node) { 401 if (!dma_has_cap(cap, device->cap_mask) || 402 dma_has_cap(DMA_PRIVATE, device->cap_mask)) 403 continue; 404 list_for_each_entry(chan, &device->channels, device_node) { 405 if (!chan->client_count) 406 continue; 407 if (!min || chan->table_count < min->table_count) 408 min = chan; 409 410 if (dma_chan_is_local(chan, cpu)) 411 if (!localmin || 412 chan->table_count < localmin->table_count) 413 localmin = chan; 414 } 415 } 416 417 chan = localmin ? localmin : min; 418 419 if (chan) 420 chan->table_count++; 421 422 return chan; 423 } 424 425 /** 426 * dma_channel_rebalance - redistribute the available channels 427 * 428 * Optimize for cpu isolation (each cpu gets a dedicated channel for an 429 * operation type) in the SMP case, and operation isolation (avoid 430 * multi-tasking channels) in the non-SMP case. Must be called under 431 * dma_list_mutex. 432 */ 433 static void dma_channel_rebalance(void) 434 { 435 struct dma_chan *chan; 436 struct dma_device *device; 437 int cpu; 438 int cap; 439 440 /* undo the last distribution */ 441 for_each_dma_cap_mask(cap, dma_cap_mask_all) 442 for_each_possible_cpu(cpu) 443 per_cpu_ptr(channel_table[cap], cpu)->chan = NULL; 444 445 list_for_each_entry(device, &dma_device_list, global_node) { 446 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 447 continue; 448 list_for_each_entry(chan, &device->channels, device_node) 449 chan->table_count = 0; 450 } 451 452 /* don't populate the channel_table if no clients are available */ 453 if (!dmaengine_ref_count) 454 return; 455 456 /* redistribute available channels */ 457 for_each_dma_cap_mask(cap, dma_cap_mask_all) 458 for_each_online_cpu(cpu) { 459 chan = min_chan(cap, cpu); 460 per_cpu_ptr(channel_table[cap], cpu)->chan = chan; 461 } 462 } 463 464 int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps) 465 { 466 struct dma_device *device; 467 468 if (!chan || !caps) 469 return -EINVAL; 470 471 device = chan->device; 472 473 /* check if the channel supports slave transactions */ 474 if (!test_bit(DMA_SLAVE, device->cap_mask.bits)) 475 return -ENXIO; 476 477 /* 478 * Check whether it reports it uses the generic slave 479 * capabilities, if not, that means it doesn't support any 480 * kind of slave capabilities reporting. 481 */ 482 if (!device->directions) 483 return -ENXIO; 484 485 caps->src_addr_widths = device->src_addr_widths; 486 caps->dst_addr_widths = device->dst_addr_widths; 487 caps->directions = device->directions; 488 caps->residue_granularity = device->residue_granularity; 489 490 caps->cmd_pause = !!device->device_pause; 491 caps->cmd_terminate = !!device->device_terminate_all; 492 493 return 0; 494 } 495 EXPORT_SYMBOL_GPL(dma_get_slave_caps); 496 497 static struct dma_chan *private_candidate(const dma_cap_mask_t *mask, 498 struct dma_device *dev, 499 dma_filter_fn fn, void *fn_param) 500 { 501 struct dma_chan *chan; 502 503 if (!__dma_device_satisfies_mask(dev, mask)) { 504 pr_debug("%s: wrong capabilities\n", __func__); 505 return NULL; 506 } 507 /* devices with multiple channels need special handling as we need to 508 * ensure that all channels are either private or public. 509 */ 510 if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask)) 511 list_for_each_entry(chan, &dev->channels, device_node) { 512 /* some channels are already publicly allocated */ 513 if (chan->client_count) 514 return NULL; 515 } 516 517 list_for_each_entry(chan, &dev->channels, device_node) { 518 if (chan->client_count) { 519 pr_debug("%s: %s busy\n", 520 __func__, dma_chan_name(chan)); 521 continue; 522 } 523 if (fn && !fn(chan, fn_param)) { 524 pr_debug("%s: %s filter said false\n", 525 __func__, dma_chan_name(chan)); 526 continue; 527 } 528 return chan; 529 } 530 531 return NULL; 532 } 533 534 /** 535 * dma_request_slave_channel - try to get specific channel exclusively 536 * @chan: target channel 537 */ 538 struct dma_chan *dma_get_slave_channel(struct dma_chan *chan) 539 { 540 int err = -EBUSY; 541 542 /* lock against __dma_request_channel */ 543 mutex_lock(&dma_list_mutex); 544 545 if (chan->client_count == 0) { 546 err = dma_chan_get(chan); 547 if (err) 548 pr_debug("%s: failed to get %s: (%d)\n", 549 __func__, dma_chan_name(chan), err); 550 } else 551 chan = NULL; 552 553 mutex_unlock(&dma_list_mutex); 554 555 556 return chan; 557 } 558 EXPORT_SYMBOL_GPL(dma_get_slave_channel); 559 560 struct dma_chan *dma_get_any_slave_channel(struct dma_device *device) 561 { 562 dma_cap_mask_t mask; 563 struct dma_chan *chan; 564 int err; 565 566 dma_cap_zero(mask); 567 dma_cap_set(DMA_SLAVE, mask); 568 569 /* lock against __dma_request_channel */ 570 mutex_lock(&dma_list_mutex); 571 572 chan = private_candidate(&mask, device, NULL, NULL); 573 if (chan) { 574 err = dma_chan_get(chan); 575 if (err) { 576 pr_debug("%s: failed to get %s: (%d)\n", 577 __func__, dma_chan_name(chan), err); 578 chan = NULL; 579 } 580 } 581 582 mutex_unlock(&dma_list_mutex); 583 584 return chan; 585 } 586 EXPORT_SYMBOL_GPL(dma_get_any_slave_channel); 587 588 /** 589 * __dma_request_channel - try to allocate an exclusive channel 590 * @mask: capabilities that the channel must satisfy 591 * @fn: optional callback to disposition available channels 592 * @fn_param: opaque parameter to pass to dma_filter_fn 593 * 594 * Returns pointer to appropriate DMA channel on success or NULL. 595 */ 596 struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, 597 dma_filter_fn fn, void *fn_param) 598 { 599 struct dma_device *device, *_d; 600 struct dma_chan *chan = NULL; 601 int err; 602 603 /* Find a channel */ 604 mutex_lock(&dma_list_mutex); 605 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { 606 chan = private_candidate(mask, device, fn, fn_param); 607 if (chan) { 608 /* Found a suitable channel, try to grab, prep, and 609 * return it. We first set DMA_PRIVATE to disable 610 * balance_ref_count as this channel will not be 611 * published in the general-purpose allocator 612 */ 613 dma_cap_set(DMA_PRIVATE, device->cap_mask); 614 device->privatecnt++; 615 err = dma_chan_get(chan); 616 617 if (err == -ENODEV) { 618 pr_debug("%s: %s module removed\n", 619 __func__, dma_chan_name(chan)); 620 list_del_rcu(&device->global_node); 621 } else if (err) 622 pr_debug("%s: failed to get %s: (%d)\n", 623 __func__, dma_chan_name(chan), err); 624 else 625 break; 626 if (--device->privatecnt == 0) 627 dma_cap_clear(DMA_PRIVATE, device->cap_mask); 628 chan = NULL; 629 } 630 } 631 mutex_unlock(&dma_list_mutex); 632 633 pr_debug("%s: %s (%s)\n", 634 __func__, 635 chan ? "success" : "fail", 636 chan ? dma_chan_name(chan) : NULL); 637 638 return chan; 639 } 640 EXPORT_SYMBOL_GPL(__dma_request_channel); 641 642 /** 643 * dma_request_slave_channel - try to allocate an exclusive slave channel 644 * @dev: pointer to client device structure 645 * @name: slave channel name 646 * 647 * Returns pointer to appropriate DMA channel on success or an error pointer. 648 */ 649 struct dma_chan *dma_request_slave_channel_reason(struct device *dev, 650 const char *name) 651 { 652 /* If device-tree is present get slave info from here */ 653 if (dev->of_node) 654 return of_dma_request_slave_channel(dev->of_node, name); 655 656 /* If device was enumerated by ACPI get slave info from here */ 657 if (ACPI_HANDLE(dev)) 658 return acpi_dma_request_slave_chan_by_name(dev, name); 659 660 return ERR_PTR(-ENODEV); 661 } 662 EXPORT_SYMBOL_GPL(dma_request_slave_channel_reason); 663 664 /** 665 * dma_request_slave_channel - try to allocate an exclusive slave channel 666 * @dev: pointer to client device structure 667 * @name: slave channel name 668 * 669 * Returns pointer to appropriate DMA channel on success or NULL. 670 */ 671 struct dma_chan *dma_request_slave_channel(struct device *dev, 672 const char *name) 673 { 674 struct dma_chan *ch = dma_request_slave_channel_reason(dev, name); 675 if (IS_ERR(ch)) 676 return NULL; 677 return ch; 678 } 679 EXPORT_SYMBOL_GPL(dma_request_slave_channel); 680 681 void dma_release_channel(struct dma_chan *chan) 682 { 683 mutex_lock(&dma_list_mutex); 684 WARN_ONCE(chan->client_count != 1, 685 "chan reference count %d != 1\n", chan->client_count); 686 dma_chan_put(chan); 687 /* drop PRIVATE cap enabled by __dma_request_channel() */ 688 if (--chan->device->privatecnt == 0) 689 dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask); 690 mutex_unlock(&dma_list_mutex); 691 } 692 EXPORT_SYMBOL_GPL(dma_release_channel); 693 694 /** 695 * dmaengine_get - register interest in dma_channels 696 */ 697 void dmaengine_get(void) 698 { 699 struct dma_device *device, *_d; 700 struct dma_chan *chan; 701 int err; 702 703 mutex_lock(&dma_list_mutex); 704 dmaengine_ref_count++; 705 706 /* try to grab channels */ 707 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { 708 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 709 continue; 710 list_for_each_entry(chan, &device->channels, device_node) { 711 err = dma_chan_get(chan); 712 if (err == -ENODEV) { 713 /* module removed before we could use it */ 714 list_del_rcu(&device->global_node); 715 break; 716 } else if (err) 717 pr_debug("%s: failed to get %s: (%d)\n", 718 __func__, dma_chan_name(chan), err); 719 } 720 } 721 722 /* if this is the first reference and there were channels 723 * waiting we need to rebalance to get those channels 724 * incorporated into the channel table 725 */ 726 if (dmaengine_ref_count == 1) 727 dma_channel_rebalance(); 728 mutex_unlock(&dma_list_mutex); 729 } 730 EXPORT_SYMBOL(dmaengine_get); 731 732 /** 733 * dmaengine_put - let dma drivers be removed when ref_count == 0 734 */ 735 void dmaengine_put(void) 736 { 737 struct dma_device *device; 738 struct dma_chan *chan; 739 740 mutex_lock(&dma_list_mutex); 741 dmaengine_ref_count--; 742 BUG_ON(dmaengine_ref_count < 0); 743 /* drop channel references */ 744 list_for_each_entry(device, &dma_device_list, global_node) { 745 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 746 continue; 747 list_for_each_entry(chan, &device->channels, device_node) 748 dma_chan_put(chan); 749 } 750 mutex_unlock(&dma_list_mutex); 751 } 752 EXPORT_SYMBOL(dmaengine_put); 753 754 static bool device_has_all_tx_types(struct dma_device *device) 755 { 756 /* A device that satisfies this test has channels that will never cause 757 * an async_tx channel switch event as all possible operation types can 758 * be handled. 759 */ 760 #ifdef CONFIG_ASYNC_TX_DMA 761 if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask)) 762 return false; 763 #endif 764 765 #if defined(CONFIG_ASYNC_MEMCPY) || defined(CONFIG_ASYNC_MEMCPY_MODULE) 766 if (!dma_has_cap(DMA_MEMCPY, device->cap_mask)) 767 return false; 768 #endif 769 770 #if defined(CONFIG_ASYNC_XOR) || defined(CONFIG_ASYNC_XOR_MODULE) 771 if (!dma_has_cap(DMA_XOR, device->cap_mask)) 772 return false; 773 774 #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA 775 if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask)) 776 return false; 777 #endif 778 #endif 779 780 #if defined(CONFIG_ASYNC_PQ) || defined(CONFIG_ASYNC_PQ_MODULE) 781 if (!dma_has_cap(DMA_PQ, device->cap_mask)) 782 return false; 783 784 #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA 785 if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask)) 786 return false; 787 #endif 788 #endif 789 790 return true; 791 } 792 793 static int get_dma_id(struct dma_device *device) 794 { 795 int rc; 796 797 mutex_lock(&dma_list_mutex); 798 799 rc = idr_alloc(&dma_idr, NULL, 0, 0, GFP_KERNEL); 800 if (rc >= 0) 801 device->dev_id = rc; 802 803 mutex_unlock(&dma_list_mutex); 804 return rc < 0 ? rc : 0; 805 } 806 807 /** 808 * dma_async_device_register - registers DMA devices found 809 * @device: &dma_device 810 */ 811 int dma_async_device_register(struct dma_device *device) 812 { 813 int chancnt = 0, rc; 814 struct dma_chan* chan; 815 atomic_t *idr_ref; 816 817 if (!device) 818 return -ENODEV; 819 820 /* validate device routines */ 821 BUG_ON(dma_has_cap(DMA_MEMCPY, device->cap_mask) && 822 !device->device_prep_dma_memcpy); 823 BUG_ON(dma_has_cap(DMA_XOR, device->cap_mask) && 824 !device->device_prep_dma_xor); 825 BUG_ON(dma_has_cap(DMA_XOR_VAL, device->cap_mask) && 826 !device->device_prep_dma_xor_val); 827 BUG_ON(dma_has_cap(DMA_PQ, device->cap_mask) && 828 !device->device_prep_dma_pq); 829 BUG_ON(dma_has_cap(DMA_PQ_VAL, device->cap_mask) && 830 !device->device_prep_dma_pq_val); 831 BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) && 832 !device->device_prep_dma_interrupt); 833 BUG_ON(dma_has_cap(DMA_SG, device->cap_mask) && 834 !device->device_prep_dma_sg); 835 BUG_ON(dma_has_cap(DMA_CYCLIC, device->cap_mask) && 836 !device->device_prep_dma_cyclic); 837 BUG_ON(dma_has_cap(DMA_INTERLEAVE, device->cap_mask) && 838 !device->device_prep_interleaved_dma); 839 840 BUG_ON(!device->device_tx_status); 841 BUG_ON(!device->device_issue_pending); 842 BUG_ON(!device->dev); 843 844 /* note: this only matters in the 845 * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case 846 */ 847 if (device_has_all_tx_types(device)) 848 dma_cap_set(DMA_ASYNC_TX, device->cap_mask); 849 850 idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL); 851 if (!idr_ref) 852 return -ENOMEM; 853 rc = get_dma_id(device); 854 if (rc != 0) { 855 kfree(idr_ref); 856 return rc; 857 } 858 859 atomic_set(idr_ref, 0); 860 861 /* represent channels in sysfs. Probably want devs too */ 862 list_for_each_entry(chan, &device->channels, device_node) { 863 rc = -ENOMEM; 864 chan->local = alloc_percpu(typeof(*chan->local)); 865 if (chan->local == NULL) 866 goto err_out; 867 chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL); 868 if (chan->dev == NULL) { 869 free_percpu(chan->local); 870 chan->local = NULL; 871 goto err_out; 872 } 873 874 chan->chan_id = chancnt++; 875 chan->dev->device.class = &dma_devclass; 876 chan->dev->device.parent = device->dev; 877 chan->dev->chan = chan; 878 chan->dev->idr_ref = idr_ref; 879 chan->dev->dev_id = device->dev_id; 880 atomic_inc(idr_ref); 881 dev_set_name(&chan->dev->device, "dma%dchan%d", 882 device->dev_id, chan->chan_id); 883 884 rc = device_register(&chan->dev->device); 885 if (rc) { 886 free_percpu(chan->local); 887 chan->local = NULL; 888 kfree(chan->dev); 889 atomic_dec(idr_ref); 890 goto err_out; 891 } 892 chan->client_count = 0; 893 } 894 device->chancnt = chancnt; 895 896 mutex_lock(&dma_list_mutex); 897 /* take references on public channels */ 898 if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask)) 899 list_for_each_entry(chan, &device->channels, device_node) { 900 /* if clients are already waiting for channels we need 901 * to take references on their behalf 902 */ 903 if (dma_chan_get(chan) == -ENODEV) { 904 /* note we can only get here for the first 905 * channel as the remaining channels are 906 * guaranteed to get a reference 907 */ 908 rc = -ENODEV; 909 mutex_unlock(&dma_list_mutex); 910 goto err_out; 911 } 912 } 913 list_add_tail_rcu(&device->global_node, &dma_device_list); 914 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 915 device->privatecnt++; /* Always private */ 916 dma_channel_rebalance(); 917 mutex_unlock(&dma_list_mutex); 918 919 return 0; 920 921 err_out: 922 /* if we never registered a channel just release the idr */ 923 if (atomic_read(idr_ref) == 0) { 924 mutex_lock(&dma_list_mutex); 925 idr_remove(&dma_idr, device->dev_id); 926 mutex_unlock(&dma_list_mutex); 927 kfree(idr_ref); 928 return rc; 929 } 930 931 list_for_each_entry(chan, &device->channels, device_node) { 932 if (chan->local == NULL) 933 continue; 934 mutex_lock(&dma_list_mutex); 935 chan->dev->chan = NULL; 936 mutex_unlock(&dma_list_mutex); 937 device_unregister(&chan->dev->device); 938 free_percpu(chan->local); 939 } 940 return rc; 941 } 942 EXPORT_SYMBOL(dma_async_device_register); 943 944 /** 945 * dma_async_device_unregister - unregister a DMA device 946 * @device: &dma_device 947 * 948 * This routine is called by dma driver exit routines, dmaengine holds module 949 * references to prevent it being called while channels are in use. 950 */ 951 void dma_async_device_unregister(struct dma_device *device) 952 { 953 struct dma_chan *chan; 954 955 mutex_lock(&dma_list_mutex); 956 list_del_rcu(&device->global_node); 957 dma_channel_rebalance(); 958 mutex_unlock(&dma_list_mutex); 959 960 list_for_each_entry(chan, &device->channels, device_node) { 961 WARN_ONCE(chan->client_count, 962 "%s called while %d clients hold a reference\n", 963 __func__, chan->client_count); 964 mutex_lock(&dma_list_mutex); 965 chan->dev->chan = NULL; 966 mutex_unlock(&dma_list_mutex); 967 device_unregister(&chan->dev->device); 968 free_percpu(chan->local); 969 } 970 } 971 EXPORT_SYMBOL(dma_async_device_unregister); 972 973 struct dmaengine_unmap_pool { 974 struct kmem_cache *cache; 975 const char *name; 976 mempool_t *pool; 977 size_t size; 978 }; 979 980 #define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) } 981 static struct dmaengine_unmap_pool unmap_pool[] = { 982 __UNMAP_POOL(2), 983 #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID) 984 __UNMAP_POOL(16), 985 __UNMAP_POOL(128), 986 __UNMAP_POOL(256), 987 #endif 988 }; 989 990 static struct dmaengine_unmap_pool *__get_unmap_pool(int nr) 991 { 992 int order = get_count_order(nr); 993 994 switch (order) { 995 case 0 ... 1: 996 return &unmap_pool[0]; 997 case 2 ... 4: 998 return &unmap_pool[1]; 999 case 5 ... 7: 1000 return &unmap_pool[2]; 1001 case 8: 1002 return &unmap_pool[3]; 1003 default: 1004 BUG(); 1005 return NULL; 1006 } 1007 } 1008 1009 static void dmaengine_unmap(struct kref *kref) 1010 { 1011 struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref); 1012 struct device *dev = unmap->dev; 1013 int cnt, i; 1014 1015 cnt = unmap->to_cnt; 1016 for (i = 0; i < cnt; i++) 1017 dma_unmap_page(dev, unmap->addr[i], unmap->len, 1018 DMA_TO_DEVICE); 1019 cnt += unmap->from_cnt; 1020 for (; i < cnt; i++) 1021 dma_unmap_page(dev, unmap->addr[i], unmap->len, 1022 DMA_FROM_DEVICE); 1023 cnt += unmap->bidi_cnt; 1024 for (; i < cnt; i++) { 1025 if (unmap->addr[i] == 0) 1026 continue; 1027 dma_unmap_page(dev, unmap->addr[i], unmap->len, 1028 DMA_BIDIRECTIONAL); 1029 } 1030 cnt = unmap->map_cnt; 1031 mempool_free(unmap, __get_unmap_pool(cnt)->pool); 1032 } 1033 1034 void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap) 1035 { 1036 if (unmap) 1037 kref_put(&unmap->kref, dmaengine_unmap); 1038 } 1039 EXPORT_SYMBOL_GPL(dmaengine_unmap_put); 1040 1041 static void dmaengine_destroy_unmap_pool(void) 1042 { 1043 int i; 1044 1045 for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) { 1046 struct dmaengine_unmap_pool *p = &unmap_pool[i]; 1047 1048 if (p->pool) 1049 mempool_destroy(p->pool); 1050 p->pool = NULL; 1051 if (p->cache) 1052 kmem_cache_destroy(p->cache); 1053 p->cache = NULL; 1054 } 1055 } 1056 1057 static int __init dmaengine_init_unmap_pool(void) 1058 { 1059 int i; 1060 1061 for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) { 1062 struct dmaengine_unmap_pool *p = &unmap_pool[i]; 1063 size_t size; 1064 1065 size = sizeof(struct dmaengine_unmap_data) + 1066 sizeof(dma_addr_t) * p->size; 1067 1068 p->cache = kmem_cache_create(p->name, size, 0, 1069 SLAB_HWCACHE_ALIGN, NULL); 1070 if (!p->cache) 1071 break; 1072 p->pool = mempool_create_slab_pool(1, p->cache); 1073 if (!p->pool) 1074 break; 1075 } 1076 1077 if (i == ARRAY_SIZE(unmap_pool)) 1078 return 0; 1079 1080 dmaengine_destroy_unmap_pool(); 1081 return -ENOMEM; 1082 } 1083 1084 struct dmaengine_unmap_data * 1085 dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags) 1086 { 1087 struct dmaengine_unmap_data *unmap; 1088 1089 unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags); 1090 if (!unmap) 1091 return NULL; 1092 1093 memset(unmap, 0, sizeof(*unmap)); 1094 kref_init(&unmap->kref); 1095 unmap->dev = dev; 1096 unmap->map_cnt = nr; 1097 1098 return unmap; 1099 } 1100 EXPORT_SYMBOL(dmaengine_get_unmap_data); 1101 1102 void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx, 1103 struct dma_chan *chan) 1104 { 1105 tx->chan = chan; 1106 #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH 1107 spin_lock_init(&tx->lock); 1108 #endif 1109 } 1110 EXPORT_SYMBOL(dma_async_tx_descriptor_init); 1111 1112 /* dma_wait_for_async_tx - spin wait for a transaction to complete 1113 * @tx: in-flight transaction to wait on 1114 */ 1115 enum dma_status 1116 dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx) 1117 { 1118 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); 1119 1120 if (!tx) 1121 return DMA_COMPLETE; 1122 1123 while (tx->cookie == -EBUSY) { 1124 if (time_after_eq(jiffies, dma_sync_wait_timeout)) { 1125 pr_err("%s timeout waiting for descriptor submission\n", 1126 __func__); 1127 return DMA_ERROR; 1128 } 1129 cpu_relax(); 1130 } 1131 return dma_sync_wait(tx->chan, tx->cookie); 1132 } 1133 EXPORT_SYMBOL_GPL(dma_wait_for_async_tx); 1134 1135 /* dma_run_dependencies - helper routine for dma drivers to process 1136 * (start) dependent operations on their target channel 1137 * @tx: transaction with dependencies 1138 */ 1139 void dma_run_dependencies(struct dma_async_tx_descriptor *tx) 1140 { 1141 struct dma_async_tx_descriptor *dep = txd_next(tx); 1142 struct dma_async_tx_descriptor *dep_next; 1143 struct dma_chan *chan; 1144 1145 if (!dep) 1146 return; 1147 1148 /* we'll submit tx->next now, so clear the link */ 1149 txd_clear_next(tx); 1150 chan = dep->chan; 1151 1152 /* keep submitting up until a channel switch is detected 1153 * in that case we will be called again as a result of 1154 * processing the interrupt from async_tx_channel_switch 1155 */ 1156 for (; dep; dep = dep_next) { 1157 txd_lock(dep); 1158 txd_clear_parent(dep); 1159 dep_next = txd_next(dep); 1160 if (dep_next && dep_next->chan == chan) 1161 txd_clear_next(dep); /* ->next will be submitted */ 1162 else 1163 dep_next = NULL; /* submit current dep and terminate */ 1164 txd_unlock(dep); 1165 1166 dep->tx_submit(dep); 1167 } 1168 1169 chan->device->device_issue_pending(chan); 1170 } 1171 EXPORT_SYMBOL_GPL(dma_run_dependencies); 1172 1173 static int __init dma_bus_init(void) 1174 { 1175 int err = dmaengine_init_unmap_pool(); 1176 1177 if (err) 1178 return err; 1179 return class_register(&dma_devclass); 1180 } 1181 arch_initcall(dma_bus_init); 1182 1183 1184