1# 2# DMA engine configuration 3# 4 5menuconfig DMADEVICES 6 bool "DMA Engine support" 7 depends on HAS_DMA 8 help 9 DMA engines can do asynchronous data transfers without 10 involving the host CPU. Currently, this framework can be 11 used to offload memory copies in the network stack and 12 RAID operations in the MD driver. This menu only presents 13 DMA Device drivers supported by the configured arch, it may 14 be empty in some cases. 15 16config DMADEVICES_DEBUG 17 bool "DMA Engine debugging" 18 depends on DMADEVICES != n 19 help 20 This is an option for use by developers; most people should 21 say N here. This enables DMA engine core and driver debugging. 22 23config DMADEVICES_VDEBUG 24 bool "DMA Engine verbose debugging" 25 depends on DMADEVICES_DEBUG != n 26 help 27 This is an option for use by developers; most people should 28 say N here. This enables deeper (more verbose) debugging of 29 the DMA engine core and drivers. 30 31 32if DMADEVICES 33 34comment "DMA Devices" 35 36config INTEL_MID_DMAC 37 tristate "Intel MID DMA support for Peripheral DMA controllers" 38 depends on PCI && X86 39 select DMA_ENGINE 40 default n 41 help 42 Enable support for the Intel(R) MID DMA engine present 43 in Intel MID chipsets. 44 45 Say Y here if you have such a chipset. 46 47 If unsure, say N. 48 49config ASYNC_TX_ENABLE_CHANNEL_SWITCH 50 bool 51 52config AMBA_PL08X 53 bool "ARM PrimeCell PL080 or PL081 support" 54 depends on ARM_AMBA 55 select DMA_ENGINE 56 select DMA_VIRTUAL_CHANNELS 57 help 58 Platform has a PL08x DMAC device 59 which can provide DMA engine support 60 61config INTEL_IOATDMA 62 tristate "Intel I/OAT DMA support" 63 depends on PCI && X86 64 select DMA_ENGINE 65 select DMA_ENGINE_RAID 66 select DCA 67 help 68 Enable support for the Intel(R) I/OAT DMA engine present 69 in recent Intel Xeon chipsets. 70 71 Say Y here if you have such a chipset. 72 73 If unsure, say N. 74 75config INTEL_IOP_ADMA 76 tristate "Intel IOP ADMA support" 77 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX 78 select DMA_ENGINE 79 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 80 help 81 Enable support for the Intel(R) IOP Series RAID engines. 82 83source "drivers/dma/dw/Kconfig" 84 85config AT_HDMAC 86 tristate "Atmel AHB DMA support" 87 depends on ARCH_AT91 88 select DMA_ENGINE 89 help 90 Support the Atmel AHB DMA controller. 91 92config FSL_DMA 93 tristate "Freescale Elo series DMA support" 94 depends on FSL_SOC 95 select DMA_ENGINE 96 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 97 ---help--- 98 Enable support for the Freescale Elo series DMA controllers. 99 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the 100 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on 101 some Txxx and Bxxx parts. 102 103config MPC512X_DMA 104 tristate "Freescale MPC512x built-in DMA engine support" 105 depends on PPC_MPC512x || PPC_MPC831x 106 select DMA_ENGINE 107 ---help--- 108 Enable support for the Freescale MPC512x built-in DMA engine. 109 110source "drivers/dma/bestcomm/Kconfig" 111 112config MV_XOR 113 bool "Marvell XOR engine support" 114 depends on PLAT_ORION 115 select DMA_ENGINE 116 select DMA_ENGINE_RAID 117 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 118 ---help--- 119 Enable support for the Marvell XOR engine. 120 121config MX3_IPU 122 bool "MX3x Image Processing Unit support" 123 depends on ARCH_MXC 124 select DMA_ENGINE 125 default y 126 help 127 If you plan to use the Image Processing unit in the i.MX3x, say 128 Y here. If unsure, select Y. 129 130config MX3_IPU_IRQS 131 int "Number of dynamically mapped interrupts for IPU" 132 depends on MX3_IPU 133 range 2 137 134 default 4 135 help 136 Out of 137 interrupt sources on i.MX31 IPU only very few are used. 137 To avoid bloating the irq_desc[] array we allocate a sufficient 138 number of IRQ slots and map them dynamically to specific sources. 139 140config TXX9_DMAC 141 tristate "Toshiba TXx9 SoC DMA support" 142 depends on MACH_TX49XX || MACH_TX39XX 143 select DMA_ENGINE 144 help 145 Support the TXx9 SoC internal DMA controller. This can be 146 integrated in chips such as the Toshiba TX4927/38/39. 147 148config TEGRA20_APB_DMA 149 bool "NVIDIA Tegra20 APB DMA support" 150 depends on ARCH_TEGRA 151 select DMA_ENGINE 152 help 153 Support for the NVIDIA Tegra20 APB DMA controller driver. The 154 DMA controller is having multiple DMA channel which can be 155 configured for different peripherals like audio, UART, SPI, 156 I2C etc which is in APB bus. 157 This DMA controller transfers data from memory to peripheral fifo 158 or vice versa. It does not support memory to memory data transfer. 159 160config S3C24XX_DMAC 161 tristate "Samsung S3C24XX DMA support" 162 depends on ARCH_S3C24XX && !S3C24XX_DMA 163 select DMA_ENGINE 164 select DMA_VIRTUAL_CHANNELS 165 help 166 Support for the Samsung S3C24XX DMA controller driver. The 167 DMA controller is having multiple DMA channels which can be 168 configured for different peripherals like audio, UART, SPI. 169 The DMA controller can transfer data from memory to peripheral, 170 periphal to memory, periphal to periphal and memory to memory. 171 172source "drivers/dma/sh/Kconfig" 173 174config COH901318 175 bool "ST-Ericsson COH901318 DMA support" 176 select DMA_ENGINE 177 depends on ARCH_U300 178 help 179 Enable support for ST-Ericsson COH 901 318 DMA. 180 181config STE_DMA40 182 bool "ST-Ericsson DMA40 support" 183 depends on ARCH_U8500 184 select DMA_ENGINE 185 help 186 Support for ST-Ericsson DMA40 controller 187 188config AMCC_PPC440SPE_ADMA 189 tristate "AMCC PPC440SPe ADMA support" 190 depends on 440SPe || 440SP 191 select DMA_ENGINE 192 select DMA_ENGINE_RAID 193 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL 194 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 195 help 196 Enable support for the AMCC PPC440SPe RAID engines. 197 198config TIMB_DMA 199 tristate "Timberdale FPGA DMA support" 200 depends on MFD_TIMBERDALE || HAS_IOMEM 201 select DMA_ENGINE 202 help 203 Enable support for the Timberdale FPGA DMA engine. 204 205config SIRF_DMA 206 tristate "CSR SiRFprimaII/SiRFmarco DMA support" 207 depends on ARCH_SIRF 208 select DMA_ENGINE 209 help 210 Enable support for the CSR SiRFprimaII DMA engine. 211 212config TI_EDMA 213 bool "TI EDMA support" 214 depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE 215 select DMA_ENGINE 216 select DMA_VIRTUAL_CHANNELS 217 select TI_PRIV_EDMA 218 default n 219 help 220 Enable support for the TI EDMA controller. This DMA 221 engine is found on TI DaVinci and AM33xx parts. 222 223config ARCH_HAS_ASYNC_TX_FIND_CHANNEL 224 bool 225 226config PL330_DMA 227 tristate "DMA API Driver for PL330" 228 select DMA_ENGINE 229 depends on ARM_AMBA 230 help 231 Select if your platform has one or more PL330 DMACs. 232 You need to provide platform specific settings via 233 platform_data for a dma-pl330 device. 234 235config PCH_DMA 236 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" 237 depends on PCI && X86 238 select DMA_ENGINE 239 help 240 Enable support for Intel EG20T PCH DMA engine. 241 242 This driver also can be used for LAPIS Semiconductor IOH(Input/ 243 Output Hub), ML7213, ML7223 and ML7831. 244 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is 245 for MP(Media Phone) use and ML7831 IOH is for general purpose use. 246 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. 247 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. 248 249config IMX_SDMA 250 tristate "i.MX SDMA support" 251 depends on ARCH_MXC 252 select DMA_ENGINE 253 help 254 Support the i.MX SDMA engine. This engine is integrated into 255 Freescale i.MX25/31/35/51/53 chips. 256 257config IMX_DMA 258 tristate "i.MX DMA support" 259 depends on ARCH_MXC 260 select DMA_ENGINE 261 help 262 Support the i.MX DMA engine. This engine is integrated into 263 Freescale i.MX1/21/27 chips. 264 265config MXS_DMA 266 bool "MXS DMA support" 267 depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q 268 select STMP_DEVICE 269 select DMA_ENGINE 270 help 271 Support the MXS DMA engine. This engine including APBH-DMA 272 and APBX-DMA is integrated into Freescale i.MX23/28 chips. 273 274config EP93XX_DMA 275 bool "Cirrus Logic EP93xx DMA support" 276 depends on ARCH_EP93XX 277 select DMA_ENGINE 278 help 279 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. 280 281config DMA_SA11X0 282 tristate "SA-11x0 DMA support" 283 depends on ARCH_SA1100 284 select DMA_ENGINE 285 select DMA_VIRTUAL_CHANNELS 286 help 287 Support the DMA engine found on Intel StrongARM SA-1100 and 288 SA-1110 SoCs. This DMA engine can only be used with on-chip 289 devices. 290 291config MMP_TDMA 292 bool "MMP Two-Channel DMA support" 293 depends on ARCH_MMP 294 select DMA_ENGINE 295 select MMP_SRAM 296 help 297 Support the MMP Two-Channel DMA engine. 298 This engine used for MMP Audio DMA and pxa910 SQU. 299 It needs sram driver under mach-mmp. 300 301 Say Y here if you enabled MMP ADMA, otherwise say N. 302 303config DMA_OMAP 304 tristate "OMAP DMA support" 305 depends on ARCH_OMAP 306 select DMA_ENGINE 307 select DMA_VIRTUAL_CHANNELS 308 309config DMA_BCM2835 310 tristate "BCM2835 DMA engine support" 311 depends on (ARCH_BCM2835 || MACH_BCM2708) 312 select DMA_ENGINE 313 select DMA_VIRTUAL_CHANNELS 314 315config TI_CPPI41 316 tristate "AM33xx CPPI41 DMA support" 317 depends on ARCH_OMAP 318 select DMA_ENGINE 319 help 320 The Communications Port Programming Interface (CPPI) 4.1 DMA engine 321 is currently used by the USB driver on AM335x platforms. 322 323config MMP_PDMA 324 bool "MMP PDMA support" 325 depends on (ARCH_MMP || ARCH_PXA) 326 select DMA_ENGINE 327 help 328 Support the MMP PDMA engine for PXA and MMP platform. 329 330config DMA_JZ4740 331 tristate "JZ4740 DMA support" 332 depends on MACH_JZ4740 333 select DMA_ENGINE 334 select DMA_VIRTUAL_CHANNELS 335 336config K3_DMA 337 tristate "Hisilicon K3 DMA support" 338 depends on ARCH_HI3xxx 339 select DMA_ENGINE 340 select DMA_VIRTUAL_CHANNELS 341 help 342 Support the DMA engine for Hisilicon K3 platform 343 devices. 344 345config MOXART_DMA 346 tristate "MOXART DMA support" 347 depends on ARCH_MOXART 348 select DMA_ENGINE 349 select DMA_OF 350 select DMA_VIRTUAL_CHANNELS 351 help 352 Enable support for the MOXA ART SoC DMA controller. 353 354config DMA_ENGINE 355 bool 356 357config DMA_VIRTUAL_CHANNELS 358 tristate 359 360config DMA_ACPI 361 def_bool y 362 depends on ACPI 363 364config DMA_OF 365 def_bool y 366 depends on OF 367 368comment "DMA Clients" 369 depends on DMA_ENGINE 370 371config NET_DMA 372 bool "Network: TCP receive copy offload" 373 depends on DMA_ENGINE && NET 374 default (INTEL_IOATDMA || FSL_DMA) 375 depends on BROKEN 376 help 377 This enables the use of DMA engines in the network stack to 378 offload receive copy-to-user operations, freeing CPU cycles. 379 380 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise 381 say N. 382 383config ASYNC_TX_DMA 384 bool "Async_tx: Offload support for the async_tx api" 385 depends on DMA_ENGINE 386 help 387 This allows the async_tx api to take advantage of offload engines for 388 memcpy, memset, xor, and raid6 p+q operations. If your platform has 389 a dma engine that can perform raid operations and you have enabled 390 MD_RAID456 say Y. 391 392 If unsure, say N. 393 394config DMATEST 395 tristate "DMA Test client" 396 depends on DMA_ENGINE 397 help 398 Simple DMA test client. Say N unless you're debugging a 399 DMA Device driver. 400 401config DMA_ENGINE_RAID 402 bool 403 404endif 405