xref: /openbmc/linux/drivers/dma/Kconfig (revision 7dd65feb)
1#
2# DMA engine configuration
3#
4
5menuconfig DMADEVICES
6	bool "DMA Engine support"
7	depends on HAS_DMA
8	help
9	  DMA engines can do asynchronous data transfers without
10	  involving the host CPU.  Currently, this framework can be
11	  used to offload memory copies in the network stack and
12	  RAID operations in the MD driver.  This menu only presents
13	  DMA Device drivers supported by the configured arch, it may
14	  be empty in some cases.
15
16if DMADEVICES
17
18comment "DMA Devices"
19
20config ASYNC_TX_DISABLE_CHANNEL_SWITCH
21	bool
22
23config INTEL_IOATDMA
24	tristate "Intel I/OAT DMA support"
25	depends on PCI && X86
26	select DMA_ENGINE
27	select DCA
28	select ASYNC_TX_DISABLE_CHANNEL_SWITCH
29	select ASYNC_TX_DISABLE_PQ_VAL_DMA
30	select ASYNC_TX_DISABLE_XOR_VAL_DMA
31	help
32	  Enable support for the Intel(R) I/OAT DMA engine present
33	  in recent Intel Xeon chipsets.
34
35	  Say Y here if you have such a chipset.
36
37	  If unsure, say N.
38
39config INTEL_IOP_ADMA
40	tristate "Intel IOP ADMA support"
41	depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
42	select DMA_ENGINE
43	help
44	  Enable support for the Intel(R) IOP Series RAID engines.
45
46config DW_DMAC
47	tristate "Synopsys DesignWare AHB DMA support"
48	depends on AVR32
49	select DMA_ENGINE
50	default y if CPU_AT32AP7000
51	help
52	  Support the Synopsys DesignWare AHB DMA controller.  This
53	  can be integrated in chips such as the Atmel AT32ap7000.
54
55config AT_HDMAC
56	tristate "Atmel AHB DMA support"
57	depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
58	select DMA_ENGINE
59	help
60	  Support the Atmel AHB DMA controller.  This can be integrated in
61	  chips such as the Atmel AT91SAM9RL.
62
63config FSL_DMA
64	tristate "Freescale Elo and Elo Plus DMA support"
65	depends on FSL_SOC
66	select DMA_ENGINE
67	---help---
68	  Enable support for the Freescale Elo and Elo Plus DMA controllers.
69	  The Elo is the DMA controller on some 82xx and 83xx parts, and the
70	  Elo Plus is the DMA controller on 85xx and 86xx parts.
71
72config MV_XOR
73	bool "Marvell XOR engine support"
74	depends on PLAT_ORION
75	select DMA_ENGINE
76	---help---
77	  Enable support for the Marvell XOR engine.
78
79config MX3_IPU
80	bool "MX3x Image Processing Unit support"
81	depends on ARCH_MX3
82	select DMA_ENGINE
83	default y
84	help
85	  If you plan to use the Image Processing unit in the i.MX3x, say
86	  Y here. If unsure, select Y.
87
88config MX3_IPU_IRQS
89	int "Number of dynamically mapped interrupts for IPU"
90	depends on MX3_IPU
91	range 2 137
92	default 4
93	help
94	  Out of 137 interrupt sources on i.MX31 IPU only very few are used.
95	  To avoid bloating the irq_desc[] array we allocate a sufficient
96	  number of IRQ slots and map them dynamically to specific sources.
97
98config TXX9_DMAC
99	tristate "Toshiba TXx9 SoC DMA support"
100	depends on MACH_TX49XX || MACH_TX39XX
101	select DMA_ENGINE
102	help
103	  Support the TXx9 SoC internal DMA controller.  This can be
104	  integrated in chips such as the Toshiba TX4927/38/39.
105
106config SH_DMAE
107	tristate "Renesas SuperH DMAC support"
108	depends on SUPERH && SH_DMA
109	depends on !SH_DMA_API
110	select DMA_ENGINE
111	help
112	  Enable support for the Renesas SuperH DMA controllers.
113
114config COH901318
115	bool "ST-Ericsson COH901318 DMA support"
116	select DMA_ENGINE
117	depends on ARCH_U300
118	help
119	  Enable support for ST-Ericsson COH 901 318 DMA.
120
121config AMCC_PPC440SPE_ADMA
122	tristate "AMCC PPC440SPe ADMA support"
123	depends on 440SPe || 440SP
124	select DMA_ENGINE
125	select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
126	help
127	  Enable support for the AMCC PPC440SPe RAID engines.
128
129config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
130	bool
131
132config DMA_ENGINE
133	bool
134
135comment "DMA Clients"
136	depends on DMA_ENGINE
137
138config NET_DMA
139	bool "Network: TCP receive copy offload"
140	depends on DMA_ENGINE && NET
141	default (INTEL_IOATDMA || FSL_DMA)
142	help
143	  This enables the use of DMA engines in the network stack to
144	  offload receive copy-to-user operations, freeing CPU cycles.
145
146	  Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
147	  say N.
148
149config ASYNC_TX_DMA
150	bool "Async_tx: Offload support for the async_tx api"
151	depends on DMA_ENGINE
152	help
153	  This allows the async_tx api to take advantage of offload engines for
154	  memcpy, memset, xor, and raid6 p+q operations.  If your platform has
155	  a dma engine that can perform raid operations and you have enabled
156	  MD_RAID456 say Y.
157
158	  If unsure, say N.
159
160config DMATEST
161	tristate "DMA Test client"
162	depends on DMA_ENGINE
163	help
164	  Simple DMA test client. Say N unless you're debugging a
165	  DMA Device driver.
166
167endif
168