1# SPDX-License-Identifier: GPL-2.0-only 2# 3# DMA engine configuration 4# 5 6menuconfig DMADEVICES 7 bool "DMA Engine support" 8 depends on HAS_DMA 9 help 10 DMA engines can do asynchronous data transfers without 11 involving the host CPU. Currently, this framework can be 12 used to offload memory copies in the network stack and 13 RAID operations in the MD driver. This menu only presents 14 DMA Device drivers supported by the configured arch, it may 15 be empty in some cases. 16 17config DMADEVICES_DEBUG 18 bool "DMA Engine debugging" 19 depends on DMADEVICES != n 20 help 21 This is an option for use by developers; most people should 22 say N here. This enables DMA engine core and driver debugging. 23 24config DMADEVICES_VDEBUG 25 bool "DMA Engine verbose debugging" 26 depends on DMADEVICES_DEBUG != n 27 help 28 This is an option for use by developers; most people should 29 say N here. This enables deeper (more verbose) debugging of 30 the DMA engine core and drivers. 31 32 33if DMADEVICES 34 35comment "DMA Devices" 36 37#core 38config ASYNC_TX_ENABLE_CHANNEL_SWITCH 39 bool 40 41config ARCH_HAS_ASYNC_TX_FIND_CHANNEL 42 bool 43 44config DMA_ENGINE 45 bool 46 47config DMA_VIRTUAL_CHANNELS 48 tristate 49 50config DMA_ACPI 51 def_bool y 52 depends on ACPI 53 54config DMA_OF 55 def_bool y 56 depends on OF 57 select DMA_ENGINE 58 59#devices 60config ALTERA_MSGDMA 61 tristate "Altera / Intel mSGDMA Engine" 62 depends on HAS_IOMEM 63 select DMA_ENGINE 64 help 65 Enable support for Altera / Intel mSGDMA controller. 66 67config AMBA_PL08X 68 bool "ARM PrimeCell PL080 or PL081 support" 69 depends on ARM_AMBA 70 select DMA_ENGINE 71 select DMA_VIRTUAL_CHANNELS 72 help 73 Say yes if your platform has a PL08x DMAC device which can 74 provide DMA engine support. This includes the original ARM 75 PL080 and PL081, Samsungs PL080 derivative and Faraday 76 Technology's FTDMAC020 PL080 derivative. 77 78config AMCC_PPC440SPE_ADMA 79 tristate "AMCC PPC440SPe ADMA support" 80 depends on 440SPe || 440SP 81 select DMA_ENGINE 82 select DMA_ENGINE_RAID 83 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL 84 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 85 help 86 Enable support for the AMCC PPC440SPe RAID engines. 87 88config APPLE_ADMAC 89 tristate "Apple ADMAC support" 90 depends on ARCH_APPLE || COMPILE_TEST 91 select DMA_ENGINE 92 default ARCH_APPLE 93 help 94 Enable support for Audio DMA Controller found on Apple Silicon SoCs. 95 96config AT_HDMAC 97 tristate "Atmel AHB DMA support" 98 depends on ARCH_AT91 99 select DMA_ENGINE 100 select DMA_VIRTUAL_CHANNELS 101 help 102 Support the Atmel AHB DMA controller. 103 104config AT_XDMAC 105 tristate "Atmel XDMA support" 106 depends on ARCH_AT91 107 select DMA_ENGINE 108 help 109 Support the Atmel XDMA controller. 110 111config AXI_DMAC 112 tristate "Analog Devices AXI-DMAC DMA support" 113 depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST 114 select DMA_ENGINE 115 select DMA_VIRTUAL_CHANNELS 116 select REGMAP_MMIO 117 help 118 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA 119 controller is often used in Analog Devices' reference designs for FPGA 120 platforms. 121 122config BCM_SBA_RAID 123 tristate "Broadcom SBA RAID engine support" 124 depends on ARM64 || COMPILE_TEST 125 depends on MAILBOX && RAID6_PQ 126 select DMA_ENGINE 127 select DMA_ENGINE_RAID 128 select ASYNC_TX_DISABLE_XOR_VAL_DMA 129 select ASYNC_TX_DISABLE_PQ_VAL_DMA 130 default m if ARCH_BCM_IPROC 131 help 132 Enable support for Broadcom SBA RAID Engine. The SBA RAID 133 engine is available on most of the Broadcom iProc SoCs. It 134 has the capability to offload memcpy, xor and pq computation 135 for raid5/6. 136 137config DMA_BCM2835 138 tristate "BCM2835 DMA engine support" 139 depends on ARCH_BCM2835 140 select DMA_ENGINE 141 select DMA_VIRTUAL_CHANNELS 142 143config DMA_JZ4780 144 tristate "JZ4780 DMA support" 145 depends on MIPS || COMPILE_TEST 146 select DMA_ENGINE 147 select DMA_VIRTUAL_CHANNELS 148 help 149 This selects support for the DMA controller in Ingenic JZ4780 SoCs. 150 If you have a board based on such a SoC and wish to use DMA for 151 devices which can use the DMA controller, say Y or M here. 152 153config DMA_SA11X0 154 tristate "SA-11x0 DMA support" 155 depends on ARCH_SA1100 || COMPILE_TEST 156 select DMA_ENGINE 157 select DMA_VIRTUAL_CHANNELS 158 help 159 Support the DMA engine found on Intel StrongARM SA-1100 and 160 SA-1110 SoCs. This DMA engine can only be used with on-chip 161 devices. 162 163config DMA_SUN4I 164 tristate "Allwinner A10 DMA SoCs support" 165 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I 166 default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) 167 select DMA_ENGINE 168 select DMA_VIRTUAL_CHANNELS 169 help 170 Enable support for the DMA controller present in the sun4i, 171 sun5i and sun7i Allwinner ARM SoCs. 172 173config DMA_SUN6I 174 tristate "Allwinner A31 SoCs DMA support" 175 depends on ARCH_SUNXI || COMPILE_TEST 176 depends on RESET_CONTROLLER 177 select DMA_ENGINE 178 select DMA_VIRTUAL_CHANNELS 179 help 180 Support for the DMA engine first found in Allwinner A31 SoCs. 181 182config DW_AXI_DMAC 183 tristate "Synopsys DesignWare AXI DMA support" 184 depends on OF 185 depends on HAS_IOMEM 186 select DMA_ENGINE 187 select DMA_VIRTUAL_CHANNELS 188 help 189 Enable support for Synopsys DesignWare AXI DMA controller. 190 NOTE: This driver wasn't tested on 64 bit platform because 191 of lack 64 bit platform with Synopsys DW AXI DMAC. 192 193config EP93XX_DMA 194 bool "Cirrus Logic EP93xx DMA support" 195 depends on ARCH_EP93XX || COMPILE_TEST 196 select DMA_ENGINE 197 help 198 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. 199 200config FSL_DMA 201 tristate "Freescale Elo series DMA support" 202 depends on FSL_SOC 203 select DMA_ENGINE 204 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 205 help 206 Enable support for the Freescale Elo series DMA controllers. 207 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the 208 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on 209 some Txxx and Bxxx parts. 210 211config FSL_EDMA 212 tristate "Freescale eDMA engine support" 213 depends on OF 214 select DMA_ENGINE 215 select DMA_VIRTUAL_CHANNELS 216 help 217 Support the Freescale eDMA engine with programmable channel 218 multiplexing capability for DMA request sources(slot). 219 This module can be found on Freescale Vybrid and LS-1 SoCs. 220 221config FSL_QDMA 222 tristate "NXP Layerscape qDMA engine support" 223 depends on ARM || ARM64 224 select DMA_ENGINE 225 select DMA_VIRTUAL_CHANNELS 226 select DMA_ENGINE_RAID 227 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 228 help 229 Support the NXP Layerscape qDMA engine with command queue and legacy mode. 230 Channel virtualization is supported through enqueuing of DMA jobs to, 231 or dequeuing DMA jobs from, different work queues. 232 This module can be found on NXP Layerscape SoCs. 233 The qdma driver only work on SoCs with a DPAA hardware block. 234 235config FSL_RAID 236 tristate "Freescale RAID engine Support" 237 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH 238 select DMA_ENGINE 239 select DMA_ENGINE_RAID 240 help 241 Enable support for Freescale RAID Engine. RAID Engine is 242 available on some QorIQ SoCs (like P5020/P5040). It has 243 the capability to offload memcpy, xor and pq computation 244 for raid5/6. 245 246config HISI_DMA 247 tristate "HiSilicon DMA Engine support" 248 depends on ARCH_HISI || COMPILE_TEST 249 depends on PCI_MSI 250 select DMA_ENGINE 251 select DMA_VIRTUAL_CHANNELS 252 help 253 Support HiSilicon Kunpeng DMA engine. 254 255config IMG_MDC_DMA 256 tristate "IMG MDC support" 257 depends on MIPS || COMPILE_TEST 258 depends on MFD_SYSCON 259 select DMA_ENGINE 260 select DMA_VIRTUAL_CHANNELS 261 help 262 Enable support for the IMG multi-threaded DMA controller (MDC). 263 264config IMX_DMA 265 tristate "i.MX DMA support" 266 depends on ARCH_MXC 267 select DMA_ENGINE 268 help 269 Support the i.MX DMA engine. This engine is integrated into 270 Freescale i.MX1/21/27 chips. 271 272config IMX_SDMA 273 tristate "i.MX SDMA support" 274 depends on ARCH_MXC 275 select DMA_ENGINE 276 select DMA_VIRTUAL_CHANNELS 277 help 278 Support the i.MX SDMA engine. This engine is integrated into 279 Freescale i.MX25/31/35/51/53/6 chips. 280 281config INTEL_IDMA64 282 tristate "Intel integrated DMA 64-bit support" 283 select DMA_ENGINE 284 select DMA_VIRTUAL_CHANNELS 285 help 286 Enable DMA support for Intel Low Power Subsystem such as found on 287 Intel Skylake PCH. 288 289config INTEL_IDXD_BUS 290 tristate 291 default INTEL_IDXD 292 293config INTEL_IDXD 294 tristate "Intel Data Accelerators support" 295 depends on PCI && X86_64 && !UML 296 depends on PCI_MSI 297 depends on PCI_PASID 298 depends on SBITMAP 299 select DMA_ENGINE 300 help 301 Enable support for the Intel(R) data accelerators present 302 in Intel Xeon CPU. 303 304 Say Y if you have such a platform. 305 306 If unsure, say N. 307 308config INTEL_IDXD_COMPAT 309 bool "Legacy behavior for idxd driver" 310 depends on PCI && X86_64 311 select INTEL_IDXD_BUS 312 help 313 Compatible driver to support old /sys/bus/dsa/drivers/dsa behavior. 314 The old behavior performed driver bind/unbind for device and wq 315 devices all under the dsa driver. The compat driver will emulate 316 the legacy behavior in order to allow existing support apps (i.e. 317 accel-config) to continue function. It is expected that accel-config 318 v3.2 and earlier will need the compat mode. A distro with later 319 accel-config version can disable this compat config. 320 321 Say Y if you have old applications that require such behavior. 322 323 If unsure, say N. 324 325# Config symbol that collects all the dependencies that's necessary to 326# support shared virtual memory for the devices supported by idxd. 327config INTEL_IDXD_SVM 328 bool "Accelerator Shared Virtual Memory Support" 329 depends on INTEL_IDXD 330 depends on INTEL_IOMMU_SVM 331 depends on PCI_PRI 332 depends on PCI_PASID 333 depends on PCI_IOV 334 335config INTEL_IDXD_PERFMON 336 bool "Intel Data Accelerators performance monitor support" 337 depends on INTEL_IDXD 338 help 339 Enable performance monitor (pmu) support for the Intel(R) 340 data accelerators present in Intel Xeon CPU. With this 341 enabled, perf can be used to monitor the DSA (Intel Data 342 Streaming Accelerator) events described in the Intel DSA 343 spec. 344 345 If unsure, say N. 346 347config INTEL_IOATDMA 348 tristate "Intel I/OAT DMA support" 349 depends on PCI && X86_64 && !UML 350 select DMA_ENGINE 351 select DMA_ENGINE_RAID 352 select DCA 353 help 354 Enable support for the Intel(R) I/OAT DMA engine present 355 in recent Intel Xeon chipsets. 356 357 Say Y here if you have such a chipset. 358 359 If unsure, say N. 360 361config K3_DMA 362 tristate "Hisilicon K3 DMA support" 363 depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST 364 select DMA_ENGINE 365 select DMA_VIRTUAL_CHANNELS 366 help 367 Support the DMA engine for Hisilicon K3 platform 368 devices. 369 370config LPC18XX_DMAMUX 371 bool "NXP LPC18xx/43xx DMA MUX for PL080" 372 depends on ARCH_LPC18XX || COMPILE_TEST 373 depends on OF && AMBA_PL08X 374 select MFD_SYSCON 375 help 376 Enable support for DMA on NXP LPC18xx/43xx platforms 377 with PL080 and multiplexed DMA request lines. 378 379config MCF_EDMA 380 tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs" 381 depends on M5441x || COMPILE_TEST 382 select DMA_ENGINE 383 select DMA_VIRTUAL_CHANNELS 384 help 385 Support the Freescale ColdFire eDMA engine, 64-channel 386 implementation that performs complex data transfers with 387 minimal intervention from a host processor. 388 This module can be found on Freescale ColdFire mcf5441x SoCs. 389 390config MILBEAUT_HDMAC 391 tristate "Milbeaut AHB DMA support" 392 depends on ARCH_MILBEAUT || COMPILE_TEST 393 depends on OF 394 select DMA_ENGINE 395 select DMA_VIRTUAL_CHANNELS 396 help 397 Say yes here to support the Socionext Milbeaut 398 HDMAC device. 399 400config MILBEAUT_XDMAC 401 tristate "Milbeaut AXI DMA support" 402 depends on ARCH_MILBEAUT || COMPILE_TEST 403 depends on OF 404 select DMA_ENGINE 405 select DMA_VIRTUAL_CHANNELS 406 help 407 Say yes here to support the Socionext Milbeaut 408 XDMAC device. 409 410config MMP_PDMA 411 tristate "MMP PDMA support" 412 depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST 413 select DMA_ENGINE 414 help 415 Support the MMP PDMA engine for PXA and MMP platform. 416 417config MMP_TDMA 418 tristate "MMP Two-Channel DMA support" 419 depends on ARCH_MMP || COMPILE_TEST 420 select DMA_ENGINE 421 select GENERIC_ALLOCATOR 422 help 423 Support the MMP Two-Channel DMA engine. 424 This engine used for MMP Audio DMA and pxa910 SQU. 425 426config MOXART_DMA 427 tristate "MOXART DMA support" 428 depends on ARCH_MOXART 429 select DMA_ENGINE 430 select DMA_VIRTUAL_CHANNELS 431 help 432 Enable support for the MOXA ART SoC DMA controller. 433 434 Say Y here if you enabled MMP ADMA, otherwise say N. 435 436config MPC512X_DMA 437 tristate "Freescale MPC512x built-in DMA engine support" 438 depends on PPC_MPC512x || PPC_MPC831x 439 select DMA_ENGINE 440 help 441 Enable support for the Freescale MPC512x built-in DMA engine. 442 443config MV_XOR 444 bool "Marvell XOR engine support" 445 depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST 446 select DMA_ENGINE 447 select DMA_ENGINE_RAID 448 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 449 help 450 Enable support for the Marvell XOR engine. 451 452config MV_XOR_V2 453 bool "Marvell XOR engine version 2 support " 454 depends on ARM64 455 select DMA_ENGINE 456 select DMA_ENGINE_RAID 457 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 458 select GENERIC_MSI_IRQ 459 help 460 Enable support for the Marvell version 2 XOR engine. 461 462 This engine provides acceleration for copy, XOR and RAID6 463 operations, and is available on Marvell Armada 7K and 8K 464 platforms. 465 466config MXS_DMA 467 bool "MXS DMA support" 468 depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST 469 select STMP_DEVICE 470 select DMA_ENGINE 471 help 472 Support the MXS DMA engine. This engine including APBH-DMA 473 and APBX-DMA is integrated into some Freescale chips. 474 475config MX3_IPU 476 bool "MX3x Image Processing Unit support" 477 depends on ARCH_MXC 478 select DMA_ENGINE 479 default y 480 help 481 If you plan to use the Image Processing unit in the i.MX3x, say 482 Y here. If unsure, select Y. 483 484config MX3_IPU_IRQS 485 int "Number of dynamically mapped interrupts for IPU" 486 depends on MX3_IPU 487 range 2 137 488 default 4 489 help 490 Out of 137 interrupt sources on i.MX31 IPU only very few are used. 491 To avoid bloating the irq_desc[] array we allocate a sufficient 492 number of IRQ slots and map them dynamically to specific sources. 493 494config NBPFAXI_DMA 495 tristate "Renesas Type-AXI NBPF DMA support" 496 select DMA_ENGINE 497 depends on ARM || COMPILE_TEST 498 help 499 Support for "Type-AXI" NBPF DMA IPs from Renesas 500 501config OWL_DMA 502 tristate "Actions Semi Owl SoCs DMA support" 503 depends on ARCH_ACTIONS 504 select DMA_ENGINE 505 select DMA_VIRTUAL_CHANNELS 506 help 507 Enable support for the Actions Semi Owl SoCs DMA controller. 508 509config PCH_DMA 510 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" 511 depends on PCI && (X86_32 || COMPILE_TEST) 512 select DMA_ENGINE 513 help 514 Enable support for Intel EG20T PCH DMA engine. 515 516 This driver also can be used for LAPIS Semiconductor IOH(Input/ 517 Output Hub), ML7213, ML7223 and ML7831. 518 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is 519 for MP(Media Phone) use and ML7831 IOH is for general purpose use. 520 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. 521 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. 522 523config PL330_DMA 524 tristate "DMA API Driver for PL330" 525 select DMA_ENGINE 526 depends on ARM_AMBA 527 help 528 Select if your platform has one or more PL330 DMACs. 529 You need to provide platform specific settings via 530 platform_data for a dma-pl330 device. 531 532config PXA_DMA 533 bool "PXA DMA support" 534 depends on (ARCH_MMP || ARCH_PXA) 535 select DMA_ENGINE 536 select DMA_VIRTUAL_CHANNELS 537 help 538 Support the DMA engine for PXA. It is also compatible with MMP PDMA 539 platform. The internal DMA IP of all PXA variants is supported, with 540 16 to 32 channels for peripheral to memory or memory to memory 541 transfers. 542 543config PLX_DMA 544 tristate "PLX ExpressLane PEX Switch DMA Engine Support" 545 depends on PCI 546 select DMA_ENGINE 547 help 548 Some PLX ExpressLane PCI Switches support additional DMA engines. 549 These are exposed via extra functions on the switch's 550 upstream port. Each function exposes one DMA channel. 551 552config STE_DMA40 553 bool "ST-Ericsson DMA40 support" 554 depends on ARCH_U8500 555 select DMA_ENGINE 556 select SRAM 557 help 558 Support for ST-Ericsson DMA40 controller 559 560config ST_FDMA 561 tristate "ST FDMA dmaengine support" 562 depends on ARCH_STI 563 depends on REMOTEPROC 564 select ST_SLIM_REMOTEPROC 565 select DMA_ENGINE 566 select DMA_VIRTUAL_CHANNELS 567 help 568 Enable support for ST FDMA controller. 569 It supports 16 independent DMA channels, accepts up to 32 DMA requests 570 571 Say Y here if you have such a chipset. 572 If unsure, say N. 573 574config STM32_DMA 575 bool "STMicroelectronics STM32 DMA support" 576 depends on ARCH_STM32 || COMPILE_TEST 577 select DMA_ENGINE 578 select DMA_VIRTUAL_CHANNELS 579 help 580 Enable support for the on-chip DMA controller on STMicroelectronics 581 STM32 MCUs. 582 If you have a board based on such a MCU and wish to use DMA say Y 583 here. 584 585config STM32_DMAMUX 586 bool "STMicroelectronics STM32 dma multiplexer support" 587 depends on STM32_DMA || COMPILE_TEST 588 help 589 Enable support for the on-chip DMA multiplexer on STMicroelectronics 590 STM32 MCUs. 591 If you have a board based on such a MCU and wish to use DMAMUX say Y 592 here. 593 594config STM32_MDMA 595 bool "STMicroelectronics STM32 master dma support" 596 depends on ARCH_STM32 || COMPILE_TEST 597 depends on OF 598 select DMA_ENGINE 599 select DMA_VIRTUAL_CHANNELS 600 help 601 Enable support for the on-chip MDMA controller on STMicroelectronics 602 STM32 platforms. 603 If you have a board based on STM32 SoC and wish to use the master DMA 604 say Y here. 605 606config SPRD_DMA 607 tristate "Spreadtrum DMA support" 608 depends on ARCH_SPRD || COMPILE_TEST 609 select DMA_ENGINE 610 select DMA_VIRTUAL_CHANNELS 611 help 612 Enable support for the on-chip DMA controller on Spreadtrum platform. 613 614config TXX9_DMAC 615 tristate "Toshiba TXx9 SoC DMA support" 616 depends on MACH_TX49XX 617 select DMA_ENGINE 618 help 619 Support the TXx9 SoC internal DMA controller. This can be 620 integrated in chips such as the Toshiba TX4927/38/39. 621 622config TEGRA186_GPC_DMA 623 tristate "NVIDIA Tegra GPC DMA support" 624 depends on (ARCH_TEGRA || COMPILE_TEST) && ARCH_DMA_ADDR_T_64BIT 625 depends on IOMMU_API 626 select DMA_ENGINE 627 select DMA_VIRTUAL_CHANNELS 628 help 629 Support for the NVIDIA Tegra General Purpose Central DMA controller. 630 The DMA controller has multiple DMA channels which can be configured 631 for different peripherals like UART, SPI, etc which are on APB bus. 632 This DMA controller transfers data from memory to peripheral FIFO 633 or vice versa. It also supports memory to memory data transfer. 634 635config TEGRA20_APB_DMA 636 tristate "NVIDIA Tegra20 APB DMA support" 637 depends on ARCH_TEGRA || COMPILE_TEST 638 select DMA_ENGINE 639 help 640 Support for the NVIDIA Tegra20 APB DMA controller driver. The 641 DMA controller is having multiple DMA channel which can be 642 configured for different peripherals like audio, UART, SPI, 643 I2C etc which is in APB bus. 644 This DMA controller transfers data from memory to peripheral fifo 645 or vice versa. It does not support memory to memory data transfer. 646 647config TEGRA210_ADMA 648 tristate "NVIDIA Tegra210 ADMA support" 649 depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) 650 select DMA_ENGINE 651 select DMA_VIRTUAL_CHANNELS 652 help 653 Support for the NVIDIA Tegra210 ADMA controller driver. The 654 DMA controller has multiple DMA channels and is used to service 655 various audio clients in the Tegra210 audio processing engine 656 (APE). This DMA controller transfers data from memory to 657 peripheral and vice versa. It does not support memory to 658 memory data transfer. 659 660config TIMB_DMA 661 tristate "Timberdale FPGA DMA support" 662 depends on MFD_TIMBERDALE || COMPILE_TEST 663 select DMA_ENGINE 664 help 665 Enable support for the Timberdale FPGA DMA engine. 666 667config UNIPHIER_MDMAC 668 tristate "UniPhier MIO DMAC" 669 depends on ARCH_UNIPHIER || COMPILE_TEST 670 depends on OF 671 select DMA_ENGINE 672 select DMA_VIRTUAL_CHANNELS 673 help 674 Enable support for the MIO DMAC (Media I/O DMA controller) on the 675 UniPhier platform. This DMA controller is used as the external 676 DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs. 677 678config UNIPHIER_XDMAC 679 tristate "UniPhier XDMAC support" 680 depends on ARCH_UNIPHIER || COMPILE_TEST 681 depends on OF 682 select DMA_ENGINE 683 select DMA_VIRTUAL_CHANNELS 684 help 685 Enable support for the XDMAC (external DMA controller) on the 686 UniPhier platform. This DMA controller can transfer data from 687 memory to memory, memory to peripheral and peripheral to memory. 688 689config XGENE_DMA 690 tristate "APM X-Gene DMA support" 691 depends on ARCH_XGENE || COMPILE_TEST 692 select DMA_ENGINE 693 select DMA_ENGINE_RAID 694 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 695 help 696 Enable support for the APM X-Gene SoC DMA engine. 697 698config XILINX_DMA 699 tristate "Xilinx AXI DMAS Engine" 700 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) 701 select DMA_ENGINE 702 help 703 Enable support for Xilinx AXI VDMA Soft IP. 704 705 AXI VDMA engine provides high-bandwidth direct memory access 706 between memory and AXI4-Stream video type target 707 peripherals including peripherals which support AXI4- 708 Stream Video Protocol. It has two stream interfaces/ 709 channels, Memory Mapped to Stream (MM2S) and Stream to 710 Memory Mapped (S2MM) for the data transfers. 711 AXI CDMA engine provides high-bandwidth direct memory access 712 between a memory-mapped source address and a memory-mapped 713 destination address. 714 AXI DMA engine provides high-bandwidth one dimensional direct 715 memory access between memory and AXI4-Stream target peripherals. 716 AXI MCDMA engine provides high-bandwidth direct memory access 717 between memory and AXI4-Stream target peripherals. It provides 718 the scatter gather interface with multiple channels independent 719 configuration support. 720 721config XILINX_XDMA 722 tristate "Xilinx DMA/Bridge Subsystem DMA Engine" 723 depends on HAS_IOMEM 724 select DMA_ENGINE 725 select DMA_VIRTUAL_CHANNELS 726 select REGMAP_MMIO 727 help 728 Enable support for Xilinx DMA/Bridge Subsystem DMA engine. The DMA 729 provides high performance block data movement between Host memory 730 and the DMA subsystem. These direct memory transfers can be both in 731 the Host to Card (H2C) and Card to Host (C2H) transfers. 732 The core also provides up to 16 user interrupt wires that generate 733 interrupts to the host. 734 735config XILINX_ZYNQMP_DMA 736 tristate "Xilinx ZynqMP DMA Engine" 737 depends on ARCH_ZYNQ || MICROBLAZE || ARM64 || COMPILE_TEST 738 select DMA_ENGINE 739 help 740 Enable support for Xilinx ZynqMP DMA controller. 741 742config XILINX_ZYNQMP_DPDMA 743 tristate "Xilinx DPDMA Engine" 744 depends on HAS_IOMEM && OF 745 select DMA_ENGINE 746 select DMA_VIRTUAL_CHANNELS 747 help 748 Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option 749 if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The 750 driver provides the dmaengine required by the DisplayPort subsystem 751 display driver. 752 753# driver files 754source "drivers/dma/bestcomm/Kconfig" 755 756source "drivers/dma/mediatek/Kconfig" 757 758source "drivers/dma/ptdma/Kconfig" 759 760source "drivers/dma/qcom/Kconfig" 761 762source "drivers/dma/dw/Kconfig" 763 764source "drivers/dma/dw-edma/Kconfig" 765 766source "drivers/dma/hsu/Kconfig" 767 768source "drivers/dma/sf-pdma/Kconfig" 769 770source "drivers/dma/sh/Kconfig" 771 772source "drivers/dma/ti/Kconfig" 773 774source "drivers/dma/fsl-dpaa2-qdma/Kconfig" 775 776source "drivers/dma/lgm/Kconfig" 777 778# clients 779comment "DMA Clients" 780 depends on DMA_ENGINE 781 782config ASYNC_TX_DMA 783 bool "Async_tx: Offload support for the async_tx api" 784 depends on DMA_ENGINE 785 help 786 This allows the async_tx api to take advantage of offload engines for 787 memcpy, memset, xor, and raid6 p+q operations. If your platform has 788 a dma engine that can perform raid operations and you have enabled 789 MD_RAID456 say Y. 790 791 If unsure, say N. 792 793config DMATEST 794 tristate "DMA Test client" 795 depends on DMA_ENGINE 796 select DMA_ENGINE_RAID 797 help 798 Simple DMA test client. Say N unless you're debugging a 799 DMA Device driver. 800 801config DMA_ENGINE_RAID 802 bool 803 804endif 805