xref: /openbmc/linux/drivers/dma/Kconfig (revision 39b6f3aa)
1#
2# DMA engine configuration
3#
4
5menuconfig DMADEVICES
6	bool "DMA Engine support"
7	depends on HAS_DMA
8	help
9	  DMA engines can do asynchronous data transfers without
10	  involving the host CPU.  Currently, this framework can be
11	  used to offload memory copies in the network stack and
12	  RAID operations in the MD driver.  This menu only presents
13	  DMA Device drivers supported by the configured arch, it may
14	  be empty in some cases.
15
16config DMADEVICES_DEBUG
17        bool "DMA Engine debugging"
18        depends on DMADEVICES != n
19        help
20          This is an option for use by developers; most people should
21          say N here.  This enables DMA engine core and driver debugging.
22
23config DMADEVICES_VDEBUG
24        bool "DMA Engine verbose debugging"
25        depends on DMADEVICES_DEBUG != n
26        help
27          This is an option for use by developers; most people should
28          say N here.  This enables deeper (more verbose) debugging of
29          the DMA engine core and drivers.
30
31
32if DMADEVICES
33
34comment "DMA Devices"
35
36config INTEL_MID_DMAC
37	tristate "Intel MID DMA support for Peripheral DMA controllers"
38	depends on PCI && X86
39	select DMA_ENGINE
40	default n
41	help
42	  Enable support for the Intel(R) MID DMA engine present
43	  in Intel MID chipsets.
44
45	  Say Y here if you have such a chipset.
46
47	  If unsure, say N.
48
49config ASYNC_TX_ENABLE_CHANNEL_SWITCH
50	bool
51
52config AMBA_PL08X
53	bool "ARM PrimeCell PL080 or PL081 support"
54	depends on ARM_AMBA
55	select DMA_ENGINE
56	select DMA_VIRTUAL_CHANNELS
57	help
58	  Platform has a PL08x DMAC device
59	  which can provide DMA engine support
60
61config INTEL_IOATDMA
62	tristate "Intel I/OAT DMA support"
63	depends on PCI && X86
64	select DMA_ENGINE
65	select DCA
66	help
67	  Enable support for the Intel(R) I/OAT DMA engine present
68	  in recent Intel Xeon chipsets.
69
70	  Say Y here if you have such a chipset.
71
72	  If unsure, say N.
73
74config INTEL_IOP_ADMA
75	tristate "Intel IOP ADMA support"
76	depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
77	select DMA_ENGINE
78	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
79	help
80	  Enable support for the Intel(R) IOP Series RAID engines.
81
82config DW_DMAC
83	tristate "Synopsys DesignWare AHB DMA support"
84	depends on GENERIC_HARDIRQS
85	select DMA_ENGINE
86	default y if CPU_AT32AP7000
87	help
88	  Support the Synopsys DesignWare AHB DMA controller.  This
89	  can be integrated in chips such as the Atmel AT32ap7000.
90
91config DW_DMAC_BIG_ENDIAN_IO
92	bool "Use big endian I/O register access"
93	default y if AVR32
94	depends on DW_DMAC
95	help
96	  Say yes here to use big endian I/O access when reading and writing
97	  to the DMA controller registers. This is needed on some platforms,
98	  like the Atmel AVR32 architecture.
99
100	  If unsure, use the default setting.
101
102config AT_HDMAC
103	tristate "Atmel AHB DMA support"
104	depends on ARCH_AT91
105	select DMA_ENGINE
106	help
107	  Support the Atmel AHB DMA controller.
108
109config FSL_DMA
110	tristate "Freescale Elo and Elo Plus DMA support"
111	depends on FSL_SOC
112	select DMA_ENGINE
113	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
114	---help---
115	  Enable support for the Freescale Elo and Elo Plus DMA controllers.
116	  The Elo is the DMA controller on some 82xx and 83xx parts, and the
117	  Elo Plus is the DMA controller on 85xx and 86xx parts.
118
119config MPC512X_DMA
120	tristate "Freescale MPC512x built-in DMA engine support"
121	depends on PPC_MPC512x || PPC_MPC831x
122	select DMA_ENGINE
123	---help---
124	  Enable support for the Freescale MPC512x built-in DMA engine.
125
126source "drivers/dma/bestcomm/Kconfig"
127
128config MV_XOR
129	bool "Marvell XOR engine support"
130	depends on PLAT_ORION
131	select DMA_ENGINE
132	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
133	---help---
134	  Enable support for the Marvell XOR engine.
135
136config MX3_IPU
137	bool "MX3x Image Processing Unit support"
138	depends on ARCH_MXC
139	select DMA_ENGINE
140	default y
141	help
142	  If you plan to use the Image Processing unit in the i.MX3x, say
143	  Y here. If unsure, select Y.
144
145config MX3_IPU_IRQS
146	int "Number of dynamically mapped interrupts for IPU"
147	depends on MX3_IPU
148	range 2 137
149	default 4
150	help
151	  Out of 137 interrupt sources on i.MX31 IPU only very few are used.
152	  To avoid bloating the irq_desc[] array we allocate a sufficient
153	  number of IRQ slots and map them dynamically to specific sources.
154
155config TXX9_DMAC
156	tristate "Toshiba TXx9 SoC DMA support"
157	depends on MACH_TX49XX || MACH_TX39XX
158	select DMA_ENGINE
159	help
160	  Support the TXx9 SoC internal DMA controller.  This can be
161	  integrated in chips such as the Toshiba TX4927/38/39.
162
163config TEGRA20_APB_DMA
164	bool "NVIDIA Tegra20 APB DMA support"
165	depends on ARCH_TEGRA
166	select DMA_ENGINE
167	help
168	  Support for the NVIDIA Tegra20 APB DMA controller driver. The
169	  DMA controller is having multiple DMA channel which can be
170	  configured for different peripherals like audio, UART, SPI,
171	  I2C etc which is in APB bus.
172	  This DMA controller transfers data from memory to peripheral fifo
173	  or vice versa. It does not support memory to memory data transfer.
174
175source "drivers/dma/sh/Kconfig"
176
177config COH901318
178	bool "ST-Ericsson COH901318 DMA support"
179	select DMA_ENGINE
180	depends on ARCH_U300
181	help
182	  Enable support for ST-Ericsson COH 901 318 DMA.
183
184config STE_DMA40
185	bool "ST-Ericsson DMA40 support"
186	depends on ARCH_U8500
187	select DMA_ENGINE
188	help
189	  Support for ST-Ericsson DMA40 controller
190
191config AMCC_PPC440SPE_ADMA
192	tristate "AMCC PPC440SPe ADMA support"
193	depends on 440SPe || 440SP
194	select DMA_ENGINE
195	select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
196	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
197	help
198	  Enable support for the AMCC PPC440SPe RAID engines.
199
200config TIMB_DMA
201	tristate "Timberdale FPGA DMA support"
202	depends on MFD_TIMBERDALE || HAS_IOMEM
203	select DMA_ENGINE
204	help
205	  Enable support for the Timberdale FPGA DMA engine.
206
207config SIRF_DMA
208	tristate "CSR SiRFprimaII/SiRFmarco DMA support"
209	depends on ARCH_SIRF
210	select DMA_ENGINE
211	help
212	  Enable support for the CSR SiRFprimaII DMA engine.
213
214config TI_EDMA
215	tristate "TI EDMA support"
216	depends on ARCH_DAVINCI
217	select DMA_ENGINE
218	select DMA_VIRTUAL_CHANNELS
219	default n
220	help
221	  Enable support for the TI EDMA controller. This DMA
222	  engine is found on TI DaVinci and AM33xx parts.
223
224config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
225	bool
226
227config PL330_DMA
228	tristate "DMA API Driver for PL330"
229	select DMA_ENGINE
230	depends on ARM_AMBA
231	help
232	  Select if your platform has one or more PL330 DMACs.
233	  You need to provide platform specific settings via
234	  platform_data for a dma-pl330 device.
235
236config PCH_DMA
237	tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
238	depends on PCI && X86
239	select DMA_ENGINE
240	help
241	  Enable support for Intel EG20T PCH DMA engine.
242
243	  This driver also can be used for LAPIS Semiconductor IOH(Input/
244	  Output Hub), ML7213, ML7223 and ML7831.
245	  ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
246	  for MP(Media Phone) use and ML7831 IOH is for general purpose use.
247	  ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
248	  ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
249
250config IMX_SDMA
251	tristate "i.MX SDMA support"
252	depends on ARCH_MXC
253	select DMA_ENGINE
254	help
255	  Support the i.MX SDMA engine. This engine is integrated into
256	  Freescale i.MX25/31/35/51/53 chips.
257
258config IMX_DMA
259	tristate "i.MX DMA support"
260	depends on ARCH_MXC
261	select DMA_ENGINE
262	help
263	  Support the i.MX DMA engine. This engine is integrated into
264	  Freescale i.MX1/21/27 chips.
265
266config MXS_DMA
267	bool "MXS DMA support"
268	depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
269	select STMP_DEVICE
270	select DMA_ENGINE
271	help
272	  Support the MXS DMA engine. This engine including APBH-DMA
273	  and APBX-DMA is integrated into Freescale i.MX23/28 chips.
274
275config EP93XX_DMA
276	bool "Cirrus Logic EP93xx DMA support"
277	depends on ARCH_EP93XX
278	select DMA_ENGINE
279	help
280	  Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
281
282config DMA_SA11X0
283	tristate "SA-11x0 DMA support"
284	depends on ARCH_SA1100
285	select DMA_ENGINE
286	select DMA_VIRTUAL_CHANNELS
287	help
288	  Support the DMA engine found on Intel StrongARM SA-1100 and
289	  SA-1110 SoCs.  This DMA engine can only be used with on-chip
290	  devices.
291
292config MMP_TDMA
293	bool "MMP Two-Channel DMA support"
294	depends on ARCH_MMP
295	select DMA_ENGINE
296	help
297	  Support the MMP Two-Channel DMA engine.
298	  This engine used for MMP Audio DMA and pxa910 SQU.
299
300	  Say Y here if you enabled MMP ADMA, otherwise say N.
301
302config DMA_OMAP
303	tristate "OMAP DMA support"
304	depends on ARCH_OMAP
305	select DMA_ENGINE
306	select DMA_VIRTUAL_CHANNELS
307
308config MMP_PDMA
309	bool "MMP PDMA support"
310	depends on (ARCH_MMP || ARCH_PXA)
311	select DMA_ENGINE
312	help
313	  Support the MMP PDMA engine for PXA and MMP platfrom.
314
315config DMA_ENGINE
316	bool
317
318config DMA_VIRTUAL_CHANNELS
319	tristate
320
321config DMA_ACPI
322	def_bool y
323	depends on ACPI
324
325config DMA_OF
326	def_bool y
327	depends on OF
328
329comment "DMA Clients"
330	depends on DMA_ENGINE
331
332config NET_DMA
333	bool "Network: TCP receive copy offload"
334	depends on DMA_ENGINE && NET
335	default (INTEL_IOATDMA || FSL_DMA)
336	help
337	  This enables the use of DMA engines in the network stack to
338	  offload receive copy-to-user operations, freeing CPU cycles.
339
340	  Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
341	  say N.
342
343config ASYNC_TX_DMA
344	bool "Async_tx: Offload support for the async_tx api"
345	depends on DMA_ENGINE
346	help
347	  This allows the async_tx api to take advantage of offload engines for
348	  memcpy, memset, xor, and raid6 p+q operations.  If your platform has
349	  a dma engine that can perform raid operations and you have enabled
350	  MD_RAID456 say Y.
351
352	  If unsure, say N.
353
354config DMATEST
355	tristate "DMA Test client"
356	depends on DMA_ENGINE
357	help
358	  Simple DMA test client. Say N unless you're debugging a
359	  DMA Device driver.
360
361endif
362