1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Fence mechanism for dma-buf and to allow for asynchronous dma access 4 * 5 * Copyright (C) 2012 Canonical Ltd 6 * Copyright (C) 2012 Texas Instruments 7 * 8 * Authors: 9 * Rob Clark <robdclark@gmail.com> 10 * Maarten Lankhorst <maarten.lankhorst@canonical.com> 11 */ 12 13 #include <linux/slab.h> 14 #include <linux/export.h> 15 #include <linux/atomic.h> 16 #include <linux/dma-fence.h> 17 #include <linux/sched/signal.h> 18 19 #define CREATE_TRACE_POINTS 20 #include <trace/events/dma_fence.h> 21 22 EXPORT_TRACEPOINT_SYMBOL(dma_fence_emit); 23 EXPORT_TRACEPOINT_SYMBOL(dma_fence_enable_signal); 24 EXPORT_TRACEPOINT_SYMBOL(dma_fence_signaled); 25 26 static DEFINE_SPINLOCK(dma_fence_stub_lock); 27 static struct dma_fence dma_fence_stub; 28 29 /* 30 * fence context counter: each execution context should have its own 31 * fence context, this allows checking if fences belong to the same 32 * context or not. One device can have multiple separate contexts, 33 * and they're used if some engine can run independently of another. 34 */ 35 static atomic64_t dma_fence_context_counter = ATOMIC64_INIT(1); 36 37 /** 38 * DOC: DMA fences overview 39 * 40 * DMA fences, represented by &struct dma_fence, are the kernel internal 41 * synchronization primitive for DMA operations like GPU rendering, video 42 * encoding/decoding, or displaying buffers on a screen. 43 * 44 * A fence is initialized using dma_fence_init() and completed using 45 * dma_fence_signal(). Fences are associated with a context, allocated through 46 * dma_fence_context_alloc(), and all fences on the same context are 47 * fully ordered. 48 * 49 * Since the purposes of fences is to facilitate cross-device and 50 * cross-application synchronization, there's multiple ways to use one: 51 * 52 * - Individual fences can be exposed as a &sync_file, accessed as a file 53 * descriptor from userspace, created by calling sync_file_create(). This is 54 * called explicit fencing, since userspace passes around explicit 55 * synchronization points. 56 * 57 * - Some subsystems also have their own explicit fencing primitives, like 58 * &drm_syncobj. Compared to &sync_file, a &drm_syncobj allows the underlying 59 * fence to be updated. 60 * 61 * - Then there's also implicit fencing, where the synchronization points are 62 * implicitly passed around as part of shared &dma_buf instances. Such 63 * implicit fences are stored in &struct reservation_object through the 64 * &dma_buf.resv pointer. 65 */ 66 67 static const char *dma_fence_stub_get_name(struct dma_fence *fence) 68 { 69 return "stub"; 70 } 71 72 static const struct dma_fence_ops dma_fence_stub_ops = { 73 .get_driver_name = dma_fence_stub_get_name, 74 .get_timeline_name = dma_fence_stub_get_name, 75 }; 76 77 /** 78 * dma_fence_get_stub - return a signaled fence 79 * 80 * Return a stub fence which is already signaled. 81 */ 82 struct dma_fence *dma_fence_get_stub(void) 83 { 84 spin_lock(&dma_fence_stub_lock); 85 if (!dma_fence_stub.ops) { 86 dma_fence_init(&dma_fence_stub, 87 &dma_fence_stub_ops, 88 &dma_fence_stub_lock, 89 0, 0); 90 dma_fence_signal_locked(&dma_fence_stub); 91 } 92 spin_unlock(&dma_fence_stub_lock); 93 94 return dma_fence_get(&dma_fence_stub); 95 } 96 EXPORT_SYMBOL(dma_fence_get_stub); 97 98 /** 99 * dma_fence_context_alloc - allocate an array of fence contexts 100 * @num: amount of contexts to allocate 101 * 102 * This function will return the first index of the number of fence contexts 103 * allocated. The fence context is used for setting &dma_fence.context to a 104 * unique number by passing the context to dma_fence_init(). 105 */ 106 u64 dma_fence_context_alloc(unsigned num) 107 { 108 WARN_ON(!num); 109 return atomic64_add_return(num, &dma_fence_context_counter) - num; 110 } 111 EXPORT_SYMBOL(dma_fence_context_alloc); 112 113 /** 114 * dma_fence_signal_locked - signal completion of a fence 115 * @fence: the fence to signal 116 * 117 * Signal completion for software callbacks on a fence, this will unblock 118 * dma_fence_wait() calls and run all the callbacks added with 119 * dma_fence_add_callback(). Can be called multiple times, but since a fence 120 * can only go from the unsignaled to the signaled state and not back, it will 121 * only be effective the first time. 122 * 123 * Unlike dma_fence_signal(), this function must be called with &dma_fence.lock 124 * held. 125 * 126 * Returns 0 on success and a negative error value when @fence has been 127 * signalled already. 128 */ 129 int dma_fence_signal_locked(struct dma_fence *fence) 130 { 131 struct dma_fence_cb *cur, *tmp; 132 int ret = 0; 133 134 lockdep_assert_held(fence->lock); 135 136 if (WARN_ON(!fence)) 137 return -EINVAL; 138 139 if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) { 140 ret = -EINVAL; 141 142 /* 143 * we might have raced with the unlocked dma_fence_signal, 144 * still run through all callbacks 145 */ 146 } else { 147 fence->timestamp = ktime_get(); 148 set_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags); 149 trace_dma_fence_signaled(fence); 150 } 151 152 list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) { 153 list_del_init(&cur->node); 154 cur->func(fence, cur); 155 } 156 return ret; 157 } 158 EXPORT_SYMBOL(dma_fence_signal_locked); 159 160 /** 161 * dma_fence_signal - signal completion of a fence 162 * @fence: the fence to signal 163 * 164 * Signal completion for software callbacks on a fence, this will unblock 165 * dma_fence_wait() calls and run all the callbacks added with 166 * dma_fence_add_callback(). Can be called multiple times, but since a fence 167 * can only go from the unsignaled to the signaled state and not back, it will 168 * only be effective the first time. 169 * 170 * Returns 0 on success and a negative error value when @fence has been 171 * signalled already. 172 */ 173 int dma_fence_signal(struct dma_fence *fence) 174 { 175 unsigned long flags; 176 177 if (!fence) 178 return -EINVAL; 179 180 if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) 181 return -EINVAL; 182 183 fence->timestamp = ktime_get(); 184 set_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags); 185 trace_dma_fence_signaled(fence); 186 187 if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &fence->flags)) { 188 struct dma_fence_cb *cur, *tmp; 189 190 spin_lock_irqsave(fence->lock, flags); 191 list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) { 192 list_del_init(&cur->node); 193 cur->func(fence, cur); 194 } 195 spin_unlock_irqrestore(fence->lock, flags); 196 } 197 return 0; 198 } 199 EXPORT_SYMBOL(dma_fence_signal); 200 201 /** 202 * dma_fence_wait_timeout - sleep until the fence gets signaled 203 * or until timeout elapses 204 * @fence: the fence to wait on 205 * @intr: if true, do an interruptible wait 206 * @timeout: timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT 207 * 208 * Returns -ERESTARTSYS if interrupted, 0 if the wait timed out, or the 209 * remaining timeout in jiffies on success. Other error values may be 210 * returned on custom implementations. 211 * 212 * Performs a synchronous wait on this fence. It is assumed the caller 213 * directly or indirectly (buf-mgr between reservation and committing) 214 * holds a reference to the fence, otherwise the fence might be 215 * freed before return, resulting in undefined behavior. 216 * 217 * See also dma_fence_wait() and dma_fence_wait_any_timeout(). 218 */ 219 signed long 220 dma_fence_wait_timeout(struct dma_fence *fence, bool intr, signed long timeout) 221 { 222 signed long ret; 223 224 if (WARN_ON(timeout < 0)) 225 return -EINVAL; 226 227 trace_dma_fence_wait_start(fence); 228 if (fence->ops->wait) 229 ret = fence->ops->wait(fence, intr, timeout); 230 else 231 ret = dma_fence_default_wait(fence, intr, timeout); 232 trace_dma_fence_wait_end(fence); 233 return ret; 234 } 235 EXPORT_SYMBOL(dma_fence_wait_timeout); 236 237 /** 238 * dma_fence_release - default relese function for fences 239 * @kref: &dma_fence.recfount 240 * 241 * This is the default release functions for &dma_fence. Drivers shouldn't call 242 * this directly, but instead call dma_fence_put(). 243 */ 244 void dma_fence_release(struct kref *kref) 245 { 246 struct dma_fence *fence = 247 container_of(kref, struct dma_fence, refcount); 248 249 trace_dma_fence_destroy(fence); 250 251 if (WARN(!list_empty(&fence->cb_list), 252 "Fence %s:%s:%llx:%llx released with pending signals!\n", 253 fence->ops->get_driver_name(fence), 254 fence->ops->get_timeline_name(fence), 255 fence->context, fence->seqno)) { 256 unsigned long flags; 257 258 /* 259 * Failed to signal before release, likely a refcounting issue. 260 * 261 * This should never happen, but if it does make sure that we 262 * don't leave chains dangling. We set the error flag first 263 * so that the callbacks know this signal is due to an error. 264 */ 265 spin_lock_irqsave(fence->lock, flags); 266 fence->error = -EDEADLK; 267 dma_fence_signal_locked(fence); 268 spin_unlock_irqrestore(fence->lock, flags); 269 } 270 271 if (fence->ops->release) 272 fence->ops->release(fence); 273 else 274 dma_fence_free(fence); 275 } 276 EXPORT_SYMBOL(dma_fence_release); 277 278 /** 279 * dma_fence_free - default release function for &dma_fence. 280 * @fence: fence to release 281 * 282 * This is the default implementation for &dma_fence_ops.release. It calls 283 * kfree_rcu() on @fence. 284 */ 285 void dma_fence_free(struct dma_fence *fence) 286 { 287 kfree_rcu(fence, rcu); 288 } 289 EXPORT_SYMBOL(dma_fence_free); 290 291 /** 292 * dma_fence_enable_sw_signaling - enable signaling on fence 293 * @fence: the fence to enable 294 * 295 * This will request for sw signaling to be enabled, to make the fence 296 * complete as soon as possible. This calls &dma_fence_ops.enable_signaling 297 * internally. 298 */ 299 void dma_fence_enable_sw_signaling(struct dma_fence *fence) 300 { 301 unsigned long flags; 302 303 if (!test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, 304 &fence->flags) && 305 !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) && 306 fence->ops->enable_signaling) { 307 trace_dma_fence_enable_signal(fence); 308 309 spin_lock_irqsave(fence->lock, flags); 310 311 if (!fence->ops->enable_signaling(fence)) 312 dma_fence_signal_locked(fence); 313 314 spin_unlock_irqrestore(fence->lock, flags); 315 } 316 } 317 EXPORT_SYMBOL(dma_fence_enable_sw_signaling); 318 319 /** 320 * dma_fence_add_callback - add a callback to be called when the fence 321 * is signaled 322 * @fence: the fence to wait on 323 * @cb: the callback to register 324 * @func: the function to call 325 * 326 * @cb will be initialized by dma_fence_add_callback(), no initialization 327 * by the caller is required. Any number of callbacks can be registered 328 * to a fence, but a callback can only be registered to one fence at a time. 329 * 330 * Note that the callback can be called from an atomic context. If 331 * fence is already signaled, this function will return -ENOENT (and 332 * *not* call the callback). 333 * 334 * Add a software callback to the fence. Same restrictions apply to 335 * refcount as it does to dma_fence_wait(), however the caller doesn't need to 336 * keep a refcount to fence afterward dma_fence_add_callback() has returned: 337 * when software access is enabled, the creator of the fence is required to keep 338 * the fence alive until after it signals with dma_fence_signal(). The callback 339 * itself can be called from irq context. 340 * 341 * Returns 0 in case of success, -ENOENT if the fence is already signaled 342 * and -EINVAL in case of error. 343 */ 344 int dma_fence_add_callback(struct dma_fence *fence, struct dma_fence_cb *cb, 345 dma_fence_func_t func) 346 { 347 unsigned long flags; 348 int ret = 0; 349 bool was_set; 350 351 if (WARN_ON(!fence || !func)) 352 return -EINVAL; 353 354 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) { 355 INIT_LIST_HEAD(&cb->node); 356 return -ENOENT; 357 } 358 359 spin_lock_irqsave(fence->lock, flags); 360 361 was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, 362 &fence->flags); 363 364 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) 365 ret = -ENOENT; 366 else if (!was_set && fence->ops->enable_signaling) { 367 trace_dma_fence_enable_signal(fence); 368 369 if (!fence->ops->enable_signaling(fence)) { 370 dma_fence_signal_locked(fence); 371 ret = -ENOENT; 372 } 373 } 374 375 if (!ret) { 376 cb->func = func; 377 list_add_tail(&cb->node, &fence->cb_list); 378 } else 379 INIT_LIST_HEAD(&cb->node); 380 spin_unlock_irqrestore(fence->lock, flags); 381 382 return ret; 383 } 384 EXPORT_SYMBOL(dma_fence_add_callback); 385 386 /** 387 * dma_fence_get_status - returns the status upon completion 388 * @fence: the dma_fence to query 389 * 390 * This wraps dma_fence_get_status_locked() to return the error status 391 * condition on a signaled fence. See dma_fence_get_status_locked() for more 392 * details. 393 * 394 * Returns 0 if the fence has not yet been signaled, 1 if the fence has 395 * been signaled without an error condition, or a negative error code 396 * if the fence has been completed in err. 397 */ 398 int dma_fence_get_status(struct dma_fence *fence) 399 { 400 unsigned long flags; 401 int status; 402 403 spin_lock_irqsave(fence->lock, flags); 404 status = dma_fence_get_status_locked(fence); 405 spin_unlock_irqrestore(fence->lock, flags); 406 407 return status; 408 } 409 EXPORT_SYMBOL(dma_fence_get_status); 410 411 /** 412 * dma_fence_remove_callback - remove a callback from the signaling list 413 * @fence: the fence to wait on 414 * @cb: the callback to remove 415 * 416 * Remove a previously queued callback from the fence. This function returns 417 * true if the callback is successfully removed, or false if the fence has 418 * already been signaled. 419 * 420 * *WARNING*: 421 * Cancelling a callback should only be done if you really know what you're 422 * doing, since deadlocks and race conditions could occur all too easily. For 423 * this reason, it should only ever be done on hardware lockup recovery, 424 * with a reference held to the fence. 425 * 426 * Behaviour is undefined if @cb has not been added to @fence using 427 * dma_fence_add_callback() beforehand. 428 */ 429 bool 430 dma_fence_remove_callback(struct dma_fence *fence, struct dma_fence_cb *cb) 431 { 432 unsigned long flags; 433 bool ret; 434 435 spin_lock_irqsave(fence->lock, flags); 436 437 ret = !list_empty(&cb->node); 438 if (ret) 439 list_del_init(&cb->node); 440 441 spin_unlock_irqrestore(fence->lock, flags); 442 443 return ret; 444 } 445 EXPORT_SYMBOL(dma_fence_remove_callback); 446 447 struct default_wait_cb { 448 struct dma_fence_cb base; 449 struct task_struct *task; 450 }; 451 452 static void 453 dma_fence_default_wait_cb(struct dma_fence *fence, struct dma_fence_cb *cb) 454 { 455 struct default_wait_cb *wait = 456 container_of(cb, struct default_wait_cb, base); 457 458 wake_up_state(wait->task, TASK_NORMAL); 459 } 460 461 /** 462 * dma_fence_default_wait - default sleep until the fence gets signaled 463 * or until timeout elapses 464 * @fence: the fence to wait on 465 * @intr: if true, do an interruptible wait 466 * @timeout: timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT 467 * 468 * Returns -ERESTARTSYS if interrupted, 0 if the wait timed out, or the 469 * remaining timeout in jiffies on success. If timeout is zero the value one is 470 * returned if the fence is already signaled for consistency with other 471 * functions taking a jiffies timeout. 472 */ 473 signed long 474 dma_fence_default_wait(struct dma_fence *fence, bool intr, signed long timeout) 475 { 476 struct default_wait_cb cb; 477 unsigned long flags; 478 signed long ret = timeout ? timeout : 1; 479 bool was_set; 480 481 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) 482 return ret; 483 484 spin_lock_irqsave(fence->lock, flags); 485 486 if (intr && signal_pending(current)) { 487 ret = -ERESTARTSYS; 488 goto out; 489 } 490 491 was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, 492 &fence->flags); 493 494 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) 495 goto out; 496 497 if (!was_set && fence->ops->enable_signaling) { 498 trace_dma_fence_enable_signal(fence); 499 500 if (!fence->ops->enable_signaling(fence)) { 501 dma_fence_signal_locked(fence); 502 goto out; 503 } 504 } 505 506 if (!timeout) { 507 ret = 0; 508 goto out; 509 } 510 511 cb.base.func = dma_fence_default_wait_cb; 512 cb.task = current; 513 list_add(&cb.base.node, &fence->cb_list); 514 515 while (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) && ret > 0) { 516 if (intr) 517 __set_current_state(TASK_INTERRUPTIBLE); 518 else 519 __set_current_state(TASK_UNINTERRUPTIBLE); 520 spin_unlock_irqrestore(fence->lock, flags); 521 522 ret = schedule_timeout(ret); 523 524 spin_lock_irqsave(fence->lock, flags); 525 if (ret > 0 && intr && signal_pending(current)) 526 ret = -ERESTARTSYS; 527 } 528 529 if (!list_empty(&cb.base.node)) 530 list_del(&cb.base.node); 531 __set_current_state(TASK_RUNNING); 532 533 out: 534 spin_unlock_irqrestore(fence->lock, flags); 535 return ret; 536 } 537 EXPORT_SYMBOL(dma_fence_default_wait); 538 539 static bool 540 dma_fence_test_signaled_any(struct dma_fence **fences, uint32_t count, 541 uint32_t *idx) 542 { 543 int i; 544 545 for (i = 0; i < count; ++i) { 546 struct dma_fence *fence = fences[i]; 547 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) { 548 if (idx) 549 *idx = i; 550 return true; 551 } 552 } 553 return false; 554 } 555 556 /** 557 * dma_fence_wait_any_timeout - sleep until any fence gets signaled 558 * or until timeout elapses 559 * @fences: array of fences to wait on 560 * @count: number of fences to wait on 561 * @intr: if true, do an interruptible wait 562 * @timeout: timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT 563 * @idx: used to store the first signaled fence index, meaningful only on 564 * positive return 565 * 566 * Returns -EINVAL on custom fence wait implementation, -ERESTARTSYS if 567 * interrupted, 0 if the wait timed out, or the remaining timeout in jiffies 568 * on success. 569 * 570 * Synchronous waits for the first fence in the array to be signaled. The 571 * caller needs to hold a reference to all fences in the array, otherwise a 572 * fence might be freed before return, resulting in undefined behavior. 573 * 574 * See also dma_fence_wait() and dma_fence_wait_timeout(). 575 */ 576 signed long 577 dma_fence_wait_any_timeout(struct dma_fence **fences, uint32_t count, 578 bool intr, signed long timeout, uint32_t *idx) 579 { 580 struct default_wait_cb *cb; 581 signed long ret = timeout; 582 unsigned i; 583 584 if (WARN_ON(!fences || !count || timeout < 0)) 585 return -EINVAL; 586 587 if (timeout == 0) { 588 for (i = 0; i < count; ++i) 589 if (dma_fence_is_signaled(fences[i])) { 590 if (idx) 591 *idx = i; 592 return 1; 593 } 594 595 return 0; 596 } 597 598 cb = kcalloc(count, sizeof(struct default_wait_cb), GFP_KERNEL); 599 if (cb == NULL) { 600 ret = -ENOMEM; 601 goto err_free_cb; 602 } 603 604 for (i = 0; i < count; ++i) { 605 struct dma_fence *fence = fences[i]; 606 607 cb[i].task = current; 608 if (dma_fence_add_callback(fence, &cb[i].base, 609 dma_fence_default_wait_cb)) { 610 /* This fence is already signaled */ 611 if (idx) 612 *idx = i; 613 goto fence_rm_cb; 614 } 615 } 616 617 while (ret > 0) { 618 if (intr) 619 set_current_state(TASK_INTERRUPTIBLE); 620 else 621 set_current_state(TASK_UNINTERRUPTIBLE); 622 623 if (dma_fence_test_signaled_any(fences, count, idx)) 624 break; 625 626 ret = schedule_timeout(ret); 627 628 if (ret > 0 && intr && signal_pending(current)) 629 ret = -ERESTARTSYS; 630 } 631 632 __set_current_state(TASK_RUNNING); 633 634 fence_rm_cb: 635 while (i-- > 0) 636 dma_fence_remove_callback(fences[i], &cb[i].base); 637 638 err_free_cb: 639 kfree(cb); 640 641 return ret; 642 } 643 EXPORT_SYMBOL(dma_fence_wait_any_timeout); 644 645 /** 646 * dma_fence_init - Initialize a custom fence. 647 * @fence: the fence to initialize 648 * @ops: the dma_fence_ops for operations on this fence 649 * @lock: the irqsafe spinlock to use for locking this fence 650 * @context: the execution context this fence is run on 651 * @seqno: a linear increasing sequence number for this context 652 * 653 * Initializes an allocated fence, the caller doesn't have to keep its 654 * refcount after committing with this fence, but it will need to hold a 655 * refcount again if &dma_fence_ops.enable_signaling gets called. 656 * 657 * context and seqno are used for easy comparison between fences, allowing 658 * to check which fence is later by simply using dma_fence_later(). 659 */ 660 void 661 dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, 662 spinlock_t *lock, u64 context, u64 seqno) 663 { 664 BUG_ON(!lock); 665 BUG_ON(!ops || !ops->get_driver_name || !ops->get_timeline_name); 666 667 kref_init(&fence->refcount); 668 fence->ops = ops; 669 INIT_LIST_HEAD(&fence->cb_list); 670 fence->lock = lock; 671 fence->context = context; 672 fence->seqno = seqno; 673 fence->flags = 0UL; 674 fence->error = 0; 675 676 trace_dma_fence_init(fence); 677 } 678 EXPORT_SYMBOL(dma_fence_init); 679