1f262f28cSChanwoo Choi /* 2f262f28cSChanwoo Choi * exynos_ppmu.c - EXYNOS PPMU (Platform Performance Monitoring Unit) support 3f262f28cSChanwoo Choi * 477fe46a3SChanwoo Choi * Copyright (c) 2014-2015 Samsung Electronics Co., Ltd. 5f262f28cSChanwoo Choi * Author : Chanwoo Choi <cw00.choi@samsung.com> 6f262f28cSChanwoo Choi * 7f262f28cSChanwoo Choi * This program is free software; you can redistribute it and/or modify 8f262f28cSChanwoo Choi * it under the terms of the GNU General Public License version 2 as 9f262f28cSChanwoo Choi * published by the Free Software Foundation. 10f262f28cSChanwoo Choi * 11f262f28cSChanwoo Choi * This driver is based on drivers/devfreq/exynos/exynos_ppmu.c 12f262f28cSChanwoo Choi */ 13f262f28cSChanwoo Choi 14f262f28cSChanwoo Choi #include <linux/clk.h> 15f262f28cSChanwoo Choi #include <linux/io.h> 16f262f28cSChanwoo Choi #include <linux/kernel.h> 17f262f28cSChanwoo Choi #include <linux/module.h> 18f262f28cSChanwoo Choi #include <linux/of_address.h> 19f262f28cSChanwoo Choi #include <linux/platform_device.h> 202a3ea647SChanwoo Choi #include <linux/regmap.h> 21f262f28cSChanwoo Choi #include <linux/suspend.h> 22f262f28cSChanwoo Choi #include <linux/devfreq-event.h> 23f262f28cSChanwoo Choi 24f262f28cSChanwoo Choi #include "exynos-ppmu.h" 25f262f28cSChanwoo Choi 26f262f28cSChanwoo Choi struct exynos_ppmu_data { 27f262f28cSChanwoo Choi struct clk *clk; 28f262f28cSChanwoo Choi }; 29f262f28cSChanwoo Choi 30f262f28cSChanwoo Choi struct exynos_ppmu { 31f262f28cSChanwoo Choi struct devfreq_event_dev **edev; 32f262f28cSChanwoo Choi struct devfreq_event_desc *desc; 33f262f28cSChanwoo Choi unsigned int num_events; 34f262f28cSChanwoo Choi 35f262f28cSChanwoo Choi struct device *dev; 362a3ea647SChanwoo Choi struct regmap *regmap; 37f262f28cSChanwoo Choi 38f262f28cSChanwoo Choi struct exynos_ppmu_data ppmu; 39f262f28cSChanwoo Choi }; 40f262f28cSChanwoo Choi 41f262f28cSChanwoo Choi #define PPMU_EVENT(name) \ 42f262f28cSChanwoo Choi { "ppmu-event0-"#name, PPMU_PMNCNT0 }, \ 43f262f28cSChanwoo Choi { "ppmu-event1-"#name, PPMU_PMNCNT1 }, \ 44f262f28cSChanwoo Choi { "ppmu-event2-"#name, PPMU_PMNCNT2 }, \ 45f262f28cSChanwoo Choi { "ppmu-event3-"#name, PPMU_PMNCNT3 } 46f262f28cSChanwoo Choi 47f262f28cSChanwoo Choi struct __exynos_ppmu_events { 48f262f28cSChanwoo Choi char *name; 49f262f28cSChanwoo Choi int id; 50f262f28cSChanwoo Choi } ppmu_events[] = { 51f262f28cSChanwoo Choi /* For Exynos3250, Exynos4 and Exynos5260 */ 52f262f28cSChanwoo Choi PPMU_EVENT(g3d), 53f262f28cSChanwoo Choi PPMU_EVENT(fsys), 54f262f28cSChanwoo Choi 55f262f28cSChanwoo Choi /* For Exynos4 SoCs and Exynos3250 */ 56f262f28cSChanwoo Choi PPMU_EVENT(dmc0), 57f262f28cSChanwoo Choi PPMU_EVENT(dmc1), 58f262f28cSChanwoo Choi PPMU_EVENT(cpu), 59f262f28cSChanwoo Choi PPMU_EVENT(rightbus), 60f262f28cSChanwoo Choi PPMU_EVENT(leftbus), 61f262f28cSChanwoo Choi PPMU_EVENT(lcd0), 62f262f28cSChanwoo Choi PPMU_EVENT(camif), 63f262f28cSChanwoo Choi 64f262f28cSChanwoo Choi /* Only for Exynos3250 and Exynos5260 */ 65f262f28cSChanwoo Choi PPMU_EVENT(mfc), 66f262f28cSChanwoo Choi 67f262f28cSChanwoo Choi /* Only for Exynos4 SoCs */ 68f262f28cSChanwoo Choi PPMU_EVENT(mfc-left), 69f262f28cSChanwoo Choi PPMU_EVENT(mfc-right), 70f262f28cSChanwoo Choi 71f262f28cSChanwoo Choi /* Only for Exynos5260 SoCs */ 72f262f28cSChanwoo Choi PPMU_EVENT(drex0-s0), 73f262f28cSChanwoo Choi PPMU_EVENT(drex0-s1), 74f262f28cSChanwoo Choi PPMU_EVENT(drex1-s0), 75f262f28cSChanwoo Choi PPMU_EVENT(drex1-s1), 76f262f28cSChanwoo Choi PPMU_EVENT(eagle), 77f262f28cSChanwoo Choi PPMU_EVENT(kfc), 78f262f28cSChanwoo Choi PPMU_EVENT(isp), 79f262f28cSChanwoo Choi PPMU_EVENT(fimc), 80f262f28cSChanwoo Choi PPMU_EVENT(gscl), 81f262f28cSChanwoo Choi PPMU_EVENT(mscl), 82f262f28cSChanwoo Choi PPMU_EVENT(fimd0x), 83f262f28cSChanwoo Choi PPMU_EVENT(fimd1x), 8477fe46a3SChanwoo Choi 8577fe46a3SChanwoo Choi /* Only for Exynos5433 SoCs */ 8677fe46a3SChanwoo Choi PPMU_EVENT(d0-cpu), 8777fe46a3SChanwoo Choi PPMU_EVENT(d0-general), 8877fe46a3SChanwoo Choi PPMU_EVENT(d0-rt), 8977fe46a3SChanwoo Choi PPMU_EVENT(d1-cpu), 9077fe46a3SChanwoo Choi PPMU_EVENT(d1-general), 9177fe46a3SChanwoo Choi PPMU_EVENT(d1-rt), 92f262f28cSChanwoo Choi }; 93f262f28cSChanwoo Choi 94f262f28cSChanwoo Choi static int exynos_ppmu_find_ppmu_id(struct devfreq_event_dev *edev) 95f262f28cSChanwoo Choi { 96f262f28cSChanwoo Choi int i; 97f262f28cSChanwoo Choi 98f262f28cSChanwoo Choi for (i = 0; i < ARRAY_SIZE(ppmu_events); i++) 99f262f28cSChanwoo Choi if (!strcmp(edev->desc->name, ppmu_events[i].name)) 100f262f28cSChanwoo Choi return ppmu_events[i].id; 101f262f28cSChanwoo Choi 102f262f28cSChanwoo Choi return -EINVAL; 103f262f28cSChanwoo Choi } 104f262f28cSChanwoo Choi 10577fe46a3SChanwoo Choi /* 10677fe46a3SChanwoo Choi * The devfreq-event ops structure for PPMU v1.1 10777fe46a3SChanwoo Choi */ 108f262f28cSChanwoo Choi static int exynos_ppmu_disable(struct devfreq_event_dev *edev) 109f262f28cSChanwoo Choi { 110f262f28cSChanwoo Choi struct exynos_ppmu *info = devfreq_event_get_drvdata(edev); 1112a3ea647SChanwoo Choi int ret; 112f262f28cSChanwoo Choi u32 pmnc; 113f262f28cSChanwoo Choi 114f262f28cSChanwoo Choi /* Disable all counters */ 1152a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_CNTENC, 1162a3ea647SChanwoo Choi PPMU_CCNT_MASK | 117f262f28cSChanwoo Choi PPMU_PMCNT0_MASK | 118f262f28cSChanwoo Choi PPMU_PMCNT1_MASK | 119f262f28cSChanwoo Choi PPMU_PMCNT2_MASK | 1202a3ea647SChanwoo Choi PPMU_PMCNT3_MASK); 1212a3ea647SChanwoo Choi if (ret < 0) 1222a3ea647SChanwoo Choi return ret; 123f262f28cSChanwoo Choi 124f262f28cSChanwoo Choi /* Disable PPMU */ 1252a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_PMNC, &pmnc); 1262a3ea647SChanwoo Choi if (ret < 0) 1272a3ea647SChanwoo Choi return ret; 1282a3ea647SChanwoo Choi 129f262f28cSChanwoo Choi pmnc &= ~PPMU_PMNC_ENABLE_MASK; 1302a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_PMNC, pmnc); 1312a3ea647SChanwoo Choi if (ret < 0) 1322a3ea647SChanwoo Choi return ret; 133f262f28cSChanwoo Choi 134f262f28cSChanwoo Choi return 0; 135f262f28cSChanwoo Choi } 136f262f28cSChanwoo Choi 137f262f28cSChanwoo Choi static int exynos_ppmu_set_event(struct devfreq_event_dev *edev) 138f262f28cSChanwoo Choi { 139f262f28cSChanwoo Choi struct exynos_ppmu *info = devfreq_event_get_drvdata(edev); 140f262f28cSChanwoo Choi int id = exynos_ppmu_find_ppmu_id(edev); 1412a3ea647SChanwoo Choi int ret; 142f262f28cSChanwoo Choi u32 pmnc, cntens; 143f262f28cSChanwoo Choi 144f262f28cSChanwoo Choi if (id < 0) 145f262f28cSChanwoo Choi return id; 146f262f28cSChanwoo Choi 147f262f28cSChanwoo Choi /* Enable specific counter */ 1482a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_CNTENS, &cntens); 1492a3ea647SChanwoo Choi if (ret < 0) 1502a3ea647SChanwoo Choi return ret; 1512a3ea647SChanwoo Choi 152f262f28cSChanwoo Choi cntens |= (PPMU_CCNT_MASK | (PPMU_ENABLE << id)); 1532a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_CNTENS, cntens); 1542a3ea647SChanwoo Choi if (ret < 0) 1552a3ea647SChanwoo Choi return ret; 156f262f28cSChanwoo Choi 157f262f28cSChanwoo Choi /* Set the event of Read/Write data count */ 1582a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_BEVTxSEL(id), 1592a3ea647SChanwoo Choi PPMU_RO_DATA_CNT | PPMU_WO_DATA_CNT); 1602a3ea647SChanwoo Choi if (ret < 0) 1612a3ea647SChanwoo Choi return ret; 162f262f28cSChanwoo Choi 163f262f28cSChanwoo Choi /* Reset cycle counter/performance counter and enable PPMU */ 1642a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_PMNC, &pmnc); 1652a3ea647SChanwoo Choi if (ret < 0) 1662a3ea647SChanwoo Choi return ret; 1672a3ea647SChanwoo Choi 168f262f28cSChanwoo Choi pmnc &= ~(PPMU_PMNC_ENABLE_MASK 169f262f28cSChanwoo Choi | PPMU_PMNC_COUNTER_RESET_MASK 170f262f28cSChanwoo Choi | PPMU_PMNC_CC_RESET_MASK); 171f262f28cSChanwoo Choi pmnc |= (PPMU_ENABLE << PPMU_PMNC_ENABLE_SHIFT); 172f262f28cSChanwoo Choi pmnc |= (PPMU_ENABLE << PPMU_PMNC_COUNTER_RESET_SHIFT); 173f262f28cSChanwoo Choi pmnc |= (PPMU_ENABLE << PPMU_PMNC_CC_RESET_SHIFT); 1742a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_PMNC, pmnc); 1752a3ea647SChanwoo Choi if (ret < 0) 1762a3ea647SChanwoo Choi return ret; 177f262f28cSChanwoo Choi 178f262f28cSChanwoo Choi return 0; 179f262f28cSChanwoo Choi } 180f262f28cSChanwoo Choi 181f262f28cSChanwoo Choi static int exynos_ppmu_get_event(struct devfreq_event_dev *edev, 182f262f28cSChanwoo Choi struct devfreq_event_data *edata) 183f262f28cSChanwoo Choi { 184f262f28cSChanwoo Choi struct exynos_ppmu *info = devfreq_event_get_drvdata(edev); 185f262f28cSChanwoo Choi int id = exynos_ppmu_find_ppmu_id(edev); 1862a3ea647SChanwoo Choi unsigned int total_count, load_count; 1872a3ea647SChanwoo Choi unsigned int pmcnt3_high, pmcnt3_low; 1882a3ea647SChanwoo Choi unsigned int pmnc, cntenc; 1892a3ea647SChanwoo Choi int ret; 190f262f28cSChanwoo Choi 191f262f28cSChanwoo Choi if (id < 0) 192f262f28cSChanwoo Choi return -EINVAL; 193f262f28cSChanwoo Choi 194f262f28cSChanwoo Choi /* Disable PPMU */ 1952a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_PMNC, &pmnc); 1962a3ea647SChanwoo Choi if (ret < 0) 1972a3ea647SChanwoo Choi return ret; 1982a3ea647SChanwoo Choi 199f262f28cSChanwoo Choi pmnc &= ~PPMU_PMNC_ENABLE_MASK; 2002a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_PMNC, pmnc); 2012a3ea647SChanwoo Choi if (ret < 0) 2022a3ea647SChanwoo Choi return ret; 203f262f28cSChanwoo Choi 204f262f28cSChanwoo Choi /* Read cycle count */ 2052a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_CCNT, &total_count); 2062a3ea647SChanwoo Choi if (ret < 0) 2072a3ea647SChanwoo Choi return ret; 2082a3ea647SChanwoo Choi edata->total_count = total_count; 209f262f28cSChanwoo Choi 210f262f28cSChanwoo Choi /* Read performance count */ 211f262f28cSChanwoo Choi switch (id) { 212f262f28cSChanwoo Choi case PPMU_PMNCNT0: 213f262f28cSChanwoo Choi case PPMU_PMNCNT1: 214f262f28cSChanwoo Choi case PPMU_PMNCNT2: 2152a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_PMNCT(id), &load_count); 2162a3ea647SChanwoo Choi if (ret < 0) 2172a3ea647SChanwoo Choi return ret; 2182a3ea647SChanwoo Choi edata->load_count = load_count; 219f262f28cSChanwoo Choi break; 220f262f28cSChanwoo Choi case PPMU_PMNCNT3: 2212a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_PMCNT3_HIGH, &pmcnt3_high); 2222a3ea647SChanwoo Choi if (ret < 0) 2232a3ea647SChanwoo Choi return ret; 2242a3ea647SChanwoo Choi 2252a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_PMCNT3_LOW, &pmcnt3_low); 2262a3ea647SChanwoo Choi if (ret < 0) 2272a3ea647SChanwoo Choi return ret; 2282a3ea647SChanwoo Choi 2292a3ea647SChanwoo Choi edata->load_count = ((pmcnt3_high << 8) | pmcnt3_low); 230f262f28cSChanwoo Choi break; 231f262f28cSChanwoo Choi default: 232f262f28cSChanwoo Choi return -EINVAL; 233f262f28cSChanwoo Choi } 234f262f28cSChanwoo Choi 235f262f28cSChanwoo Choi /* Disable specific counter */ 2362a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_CNTENC, &cntenc); 2372a3ea647SChanwoo Choi if (ret < 0) 2382a3ea647SChanwoo Choi return ret; 2392a3ea647SChanwoo Choi 240f262f28cSChanwoo Choi cntenc |= (PPMU_CCNT_MASK | (PPMU_ENABLE << id)); 2412a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_CNTENC, cntenc); 2422a3ea647SChanwoo Choi if (ret < 0) 2432a3ea647SChanwoo Choi return ret; 244f262f28cSChanwoo Choi 245f262f28cSChanwoo Choi dev_dbg(&edev->dev, "%s (event: %ld/%ld)\n", edev->desc->name, 246f262f28cSChanwoo Choi edata->load_count, edata->total_count); 247f262f28cSChanwoo Choi 248f262f28cSChanwoo Choi return 0; 249f262f28cSChanwoo Choi } 250f262f28cSChanwoo Choi 2516f240fbcSChanwoo Choi static const struct devfreq_event_ops exynos_ppmu_ops = { 252f262f28cSChanwoo Choi .disable = exynos_ppmu_disable, 253f262f28cSChanwoo Choi .set_event = exynos_ppmu_set_event, 254f262f28cSChanwoo Choi .get_event = exynos_ppmu_get_event, 255f262f28cSChanwoo Choi }; 256f262f28cSChanwoo Choi 25777fe46a3SChanwoo Choi /* 25877fe46a3SChanwoo Choi * The devfreq-event ops structure for PPMU v2.0 25977fe46a3SChanwoo Choi */ 26077fe46a3SChanwoo Choi static int exynos_ppmu_v2_disable(struct devfreq_event_dev *edev) 26177fe46a3SChanwoo Choi { 26277fe46a3SChanwoo Choi struct exynos_ppmu *info = devfreq_event_get_drvdata(edev); 2632a3ea647SChanwoo Choi int ret; 26477fe46a3SChanwoo Choi u32 pmnc, clear; 26577fe46a3SChanwoo Choi 26677fe46a3SChanwoo Choi /* Disable all counters */ 26777fe46a3SChanwoo Choi clear = (PPMU_CCNT_MASK | PPMU_PMCNT0_MASK | PPMU_PMCNT1_MASK 26877fe46a3SChanwoo Choi | PPMU_PMCNT2_MASK | PPMU_PMCNT3_MASK); 2692a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_FLAG, clear); 2702a3ea647SChanwoo Choi if (ret < 0) 2712a3ea647SChanwoo Choi return ret; 27277fe46a3SChanwoo Choi 2732a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_INTENC, clear); 2742a3ea647SChanwoo Choi if (ret < 0) 2752a3ea647SChanwoo Choi return ret; 27677fe46a3SChanwoo Choi 2772a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CNTENC, clear); 2782a3ea647SChanwoo Choi if (ret < 0) 2792a3ea647SChanwoo Choi return ret; 2802a3ea647SChanwoo Choi 2812a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CNT_RESET, clear); 2822a3ea647SChanwoo Choi if (ret < 0) 2832a3ea647SChanwoo Choi return ret; 2842a3ea647SChanwoo Choi 2852a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CIG_CFG0, 0x0); 2862a3ea647SChanwoo Choi if (ret < 0) 2872a3ea647SChanwoo Choi return ret; 2882a3ea647SChanwoo Choi 2892a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CIG_CFG1, 0x0); 2902a3ea647SChanwoo Choi if (ret < 0) 2912a3ea647SChanwoo Choi return ret; 2922a3ea647SChanwoo Choi 2932a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CIG_CFG2, 0x0); 2942a3ea647SChanwoo Choi if (ret < 0) 2952a3ea647SChanwoo Choi return ret; 2962a3ea647SChanwoo Choi 2972a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CIG_RESULT, 0x0); 2982a3ea647SChanwoo Choi if (ret < 0) 2992a3ea647SChanwoo Choi return ret; 3002a3ea647SChanwoo Choi 3012a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CNT_AUTO, 0x0); 3022a3ea647SChanwoo Choi if (ret < 0) 3032a3ea647SChanwoo Choi return ret; 3042a3ea647SChanwoo Choi 3052a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CH_EV0_TYPE, 0x0); 3062a3ea647SChanwoo Choi if (ret < 0) 3072a3ea647SChanwoo Choi return ret; 3082a3ea647SChanwoo Choi 3092a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CH_EV1_TYPE, 0x0); 3102a3ea647SChanwoo Choi if (ret < 0) 3112a3ea647SChanwoo Choi return ret; 3122a3ea647SChanwoo Choi 3132a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CH_EV2_TYPE, 0x0); 3142a3ea647SChanwoo Choi if (ret < 0) 3152a3ea647SChanwoo Choi return ret; 3162a3ea647SChanwoo Choi 3172a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CH_EV3_TYPE, 0x0); 3182a3ea647SChanwoo Choi if (ret < 0) 3192a3ea647SChanwoo Choi return ret; 3202a3ea647SChanwoo Choi 3212a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_SM_ID_V, 0x0); 3222a3ea647SChanwoo Choi if (ret < 0) 3232a3ea647SChanwoo Choi return ret; 3242a3ea647SChanwoo Choi 3252a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_SM_ID_A, 0x0); 3262a3ea647SChanwoo Choi if (ret < 0) 3272a3ea647SChanwoo Choi return ret; 3282a3ea647SChanwoo Choi 3292a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_SM_OTHERS_V, 0x0); 3302a3ea647SChanwoo Choi if (ret < 0) 3312a3ea647SChanwoo Choi return ret; 3322a3ea647SChanwoo Choi 3332a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_SM_OTHERS_A, 0x0); 3342a3ea647SChanwoo Choi if (ret < 0) 3352a3ea647SChanwoo Choi return ret; 3362a3ea647SChanwoo Choi 3372a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_INTERRUPT_RESET, 0x0); 3382a3ea647SChanwoo Choi if (ret < 0) 3392a3ea647SChanwoo Choi return ret; 34077fe46a3SChanwoo Choi 34177fe46a3SChanwoo Choi /* Disable PPMU */ 3422a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_PMNC, &pmnc); 3432a3ea647SChanwoo Choi if (ret < 0) 3442a3ea647SChanwoo Choi return ret; 3452a3ea647SChanwoo Choi 34677fe46a3SChanwoo Choi pmnc &= ~PPMU_PMNC_ENABLE_MASK; 3472a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_PMNC, pmnc); 3482a3ea647SChanwoo Choi if (ret < 0) 3492a3ea647SChanwoo Choi return ret; 35077fe46a3SChanwoo Choi 35177fe46a3SChanwoo Choi return 0; 35277fe46a3SChanwoo Choi } 35377fe46a3SChanwoo Choi 35477fe46a3SChanwoo Choi static int exynos_ppmu_v2_set_event(struct devfreq_event_dev *edev) 35577fe46a3SChanwoo Choi { 35677fe46a3SChanwoo Choi struct exynos_ppmu *info = devfreq_event_get_drvdata(edev); 3572a3ea647SChanwoo Choi unsigned int pmnc, cntens; 35877fe46a3SChanwoo Choi int id = exynos_ppmu_find_ppmu_id(edev); 3592a3ea647SChanwoo Choi int ret; 36077fe46a3SChanwoo Choi 36177fe46a3SChanwoo Choi /* Enable all counters */ 3622a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_CNTENS, &cntens); 3632a3ea647SChanwoo Choi if (ret < 0) 3642a3ea647SChanwoo Choi return ret; 3652a3ea647SChanwoo Choi 36677fe46a3SChanwoo Choi cntens |= (PPMU_CCNT_MASK | (PPMU_ENABLE << id)); 3672a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CNTENS, cntens); 3682a3ea647SChanwoo Choi if (ret < 0) 3692a3ea647SChanwoo Choi return ret; 37077fe46a3SChanwoo Choi 37177fe46a3SChanwoo Choi /* Set the event of Read/Write data count */ 37277fe46a3SChanwoo Choi switch (id) { 37377fe46a3SChanwoo Choi case PPMU_PMNCNT0: 37477fe46a3SChanwoo Choi case PPMU_PMNCNT1: 37577fe46a3SChanwoo Choi case PPMU_PMNCNT2: 3762a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CH_EVx_TYPE(id), 3772a3ea647SChanwoo Choi PPMU_V2_RO_DATA_CNT | PPMU_V2_WO_DATA_CNT); 3782a3ea647SChanwoo Choi if (ret < 0) 3792a3ea647SChanwoo Choi return ret; 38077fe46a3SChanwoo Choi break; 38177fe46a3SChanwoo Choi case PPMU_PMNCNT3: 3822a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CH_EVx_TYPE(id), 3832a3ea647SChanwoo Choi PPMU_V2_EVT3_RW_DATA_CNT); 3842a3ea647SChanwoo Choi if (ret < 0) 3852a3ea647SChanwoo Choi return ret; 38677fe46a3SChanwoo Choi break; 38777fe46a3SChanwoo Choi } 38877fe46a3SChanwoo Choi 38977fe46a3SChanwoo Choi /* Reset cycle counter/performance counter and enable PPMU */ 3902a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_PMNC, &pmnc); 3912a3ea647SChanwoo Choi if (ret < 0) 3922a3ea647SChanwoo Choi return ret; 3932a3ea647SChanwoo Choi 39477fe46a3SChanwoo Choi pmnc &= ~(PPMU_PMNC_ENABLE_MASK 39577fe46a3SChanwoo Choi | PPMU_PMNC_COUNTER_RESET_MASK 39677fe46a3SChanwoo Choi | PPMU_PMNC_CC_RESET_MASK 39777fe46a3SChanwoo Choi | PPMU_PMNC_CC_DIVIDER_MASK 39877fe46a3SChanwoo Choi | PPMU_V2_PMNC_START_MODE_MASK); 39977fe46a3SChanwoo Choi pmnc |= (PPMU_ENABLE << PPMU_PMNC_ENABLE_SHIFT); 40077fe46a3SChanwoo Choi pmnc |= (PPMU_ENABLE << PPMU_PMNC_COUNTER_RESET_SHIFT); 40177fe46a3SChanwoo Choi pmnc |= (PPMU_ENABLE << PPMU_PMNC_CC_RESET_SHIFT); 40277fe46a3SChanwoo Choi pmnc |= (PPMU_V2_MODE_MANUAL << PPMU_V2_PMNC_START_MODE_SHIFT); 4032a3ea647SChanwoo Choi 4042a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_PMNC, pmnc); 4052a3ea647SChanwoo Choi if (ret < 0) 4062a3ea647SChanwoo Choi return ret; 40777fe46a3SChanwoo Choi 40877fe46a3SChanwoo Choi return 0; 40977fe46a3SChanwoo Choi } 41077fe46a3SChanwoo Choi 41177fe46a3SChanwoo Choi static int exynos_ppmu_v2_get_event(struct devfreq_event_dev *edev, 41277fe46a3SChanwoo Choi struct devfreq_event_data *edata) 41377fe46a3SChanwoo Choi { 41477fe46a3SChanwoo Choi struct exynos_ppmu *info = devfreq_event_get_drvdata(edev); 41577fe46a3SChanwoo Choi int id = exynos_ppmu_find_ppmu_id(edev); 4162a3ea647SChanwoo Choi int ret; 4172a3ea647SChanwoo Choi unsigned int pmnc, cntenc; 4182a3ea647SChanwoo Choi unsigned int pmcnt_high, pmcnt_low; 4192a3ea647SChanwoo Choi unsigned int total_count, count; 4202a3ea647SChanwoo Choi unsigned long load_count = 0; 42177fe46a3SChanwoo Choi 42277fe46a3SChanwoo Choi /* Disable PPMU */ 4232a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_PMNC, &pmnc); 4242a3ea647SChanwoo Choi if (ret < 0) 4252a3ea647SChanwoo Choi return ret; 4262a3ea647SChanwoo Choi 42777fe46a3SChanwoo Choi pmnc &= ~PPMU_PMNC_ENABLE_MASK; 4282a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_PMNC, pmnc); 4292a3ea647SChanwoo Choi if (ret < 0) 4302a3ea647SChanwoo Choi return ret; 43177fe46a3SChanwoo Choi 43277fe46a3SChanwoo Choi /* Read cycle count and performance count */ 4332a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_CCNT, &total_count); 4342a3ea647SChanwoo Choi if (ret < 0) 4352a3ea647SChanwoo Choi return ret; 4362a3ea647SChanwoo Choi edata->total_count = total_count; 43777fe46a3SChanwoo Choi 43877fe46a3SChanwoo Choi switch (id) { 43977fe46a3SChanwoo Choi case PPMU_PMNCNT0: 44077fe46a3SChanwoo Choi case PPMU_PMNCNT1: 44177fe46a3SChanwoo Choi case PPMU_PMNCNT2: 4422a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_PMNCT(id), &count); 4432a3ea647SChanwoo Choi if (ret < 0) 4442a3ea647SChanwoo Choi return ret; 4452a3ea647SChanwoo Choi load_count = count; 44677fe46a3SChanwoo Choi break; 44777fe46a3SChanwoo Choi case PPMU_PMNCNT3: 4482a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_PMCNT3_HIGH, 4492a3ea647SChanwoo Choi &pmcnt_high); 4502a3ea647SChanwoo Choi if (ret < 0) 4512a3ea647SChanwoo Choi return ret; 4522a3ea647SChanwoo Choi 4532a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_PMCNT3_LOW, &pmcnt_low); 4542a3ea647SChanwoo Choi if (ret < 0) 4552a3ea647SChanwoo Choi return ret; 4562a3ea647SChanwoo Choi 4572a3ea647SChanwoo Choi load_count = ((u64)((pmcnt_high & 0xff)) << 32)+ (u64)pmcnt_low; 45877fe46a3SChanwoo Choi break; 45977fe46a3SChanwoo Choi } 46077fe46a3SChanwoo Choi edata->load_count = load_count; 46177fe46a3SChanwoo Choi 46277fe46a3SChanwoo Choi /* Disable all counters */ 4632a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_CNTENC, &cntenc); 4642a3ea647SChanwoo Choi if (ret < 0) 4652a3ea647SChanwoo Choi return 0; 4662a3ea647SChanwoo Choi 46777fe46a3SChanwoo Choi cntenc |= (PPMU_CCNT_MASK | (PPMU_ENABLE << id)); 4682a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CNTENC, cntenc); 4692a3ea647SChanwoo Choi if (ret < 0) 4702a3ea647SChanwoo Choi return ret; 47177fe46a3SChanwoo Choi 47277fe46a3SChanwoo Choi dev_dbg(&edev->dev, "%25s (load: %ld / %ld)\n", edev->desc->name, 47377fe46a3SChanwoo Choi edata->load_count, edata->total_count); 47477fe46a3SChanwoo Choi return 0; 47577fe46a3SChanwoo Choi } 47677fe46a3SChanwoo Choi 47777fe46a3SChanwoo Choi static const struct devfreq_event_ops exynos_ppmu_v2_ops = { 47877fe46a3SChanwoo Choi .disable = exynos_ppmu_v2_disable, 47977fe46a3SChanwoo Choi .set_event = exynos_ppmu_v2_set_event, 48077fe46a3SChanwoo Choi .get_event = exynos_ppmu_v2_get_event, 48177fe46a3SChanwoo Choi }; 48277fe46a3SChanwoo Choi 48377fe46a3SChanwoo Choi static const struct of_device_id exynos_ppmu_id_match[] = { 48477fe46a3SChanwoo Choi { 48577fe46a3SChanwoo Choi .compatible = "samsung,exynos-ppmu", 48677fe46a3SChanwoo Choi .data = (void *)&exynos_ppmu_ops, 48777fe46a3SChanwoo Choi }, { 48877fe46a3SChanwoo Choi .compatible = "samsung,exynos-ppmu-v2", 48977fe46a3SChanwoo Choi .data = (void *)&exynos_ppmu_v2_ops, 49077fe46a3SChanwoo Choi }, 49177fe46a3SChanwoo Choi { /* sentinel */ }, 49277fe46a3SChanwoo Choi }; 49329e477f2SJavier Martinez Canillas MODULE_DEVICE_TABLE(of, exynos_ppmu_id_match); 49477fe46a3SChanwoo Choi 49577fe46a3SChanwoo Choi static struct devfreq_event_ops *exynos_bus_get_ops(struct device_node *np) 49677fe46a3SChanwoo Choi { 49777fe46a3SChanwoo Choi const struct of_device_id *match; 49877fe46a3SChanwoo Choi 49977fe46a3SChanwoo Choi match = of_match_node(exynos_ppmu_id_match, np); 50077fe46a3SChanwoo Choi return (struct devfreq_event_ops *)match->data; 50177fe46a3SChanwoo Choi } 50277fe46a3SChanwoo Choi 503f262f28cSChanwoo Choi static int of_get_devfreq_events(struct device_node *np, 504f262f28cSChanwoo Choi struct exynos_ppmu *info) 505f262f28cSChanwoo Choi { 506f262f28cSChanwoo Choi struct devfreq_event_desc *desc; 50777fe46a3SChanwoo Choi struct devfreq_event_ops *event_ops; 508f262f28cSChanwoo Choi struct device *dev = info->dev; 509f262f28cSChanwoo Choi struct device_node *events_np, *node; 510f262f28cSChanwoo Choi int i, j, count; 511f262f28cSChanwoo Choi 512f262f28cSChanwoo Choi events_np = of_get_child_by_name(np, "events"); 513f262f28cSChanwoo Choi if (!events_np) { 514f262f28cSChanwoo Choi dev_err(dev, 515f262f28cSChanwoo Choi "failed to get child node of devfreq-event devices\n"); 516f262f28cSChanwoo Choi return -EINVAL; 517f262f28cSChanwoo Choi } 51877fe46a3SChanwoo Choi event_ops = exynos_bus_get_ops(np); 519f262f28cSChanwoo Choi 520f262f28cSChanwoo Choi count = of_get_child_count(events_np); 521f262f28cSChanwoo Choi desc = devm_kzalloc(dev, sizeof(*desc) * count, GFP_KERNEL); 522f262f28cSChanwoo Choi if (!desc) 523f262f28cSChanwoo Choi return -ENOMEM; 524f262f28cSChanwoo Choi info->num_events = count; 525f262f28cSChanwoo Choi 526f262f28cSChanwoo Choi j = 0; 527f262f28cSChanwoo Choi for_each_child_of_node(events_np, node) { 528f262f28cSChanwoo Choi for (i = 0; i < ARRAY_SIZE(ppmu_events); i++) { 529f262f28cSChanwoo Choi if (!ppmu_events[i].name) 530f262f28cSChanwoo Choi continue; 531f262f28cSChanwoo Choi 532f262f28cSChanwoo Choi if (!of_node_cmp(node->name, ppmu_events[i].name)) 533f262f28cSChanwoo Choi break; 534f262f28cSChanwoo Choi } 535f262f28cSChanwoo Choi 536f262f28cSChanwoo Choi if (i == ARRAY_SIZE(ppmu_events)) { 537f262f28cSChanwoo Choi dev_warn(dev, 538f262f28cSChanwoo Choi "don't know how to configure events : %s\n", 539f262f28cSChanwoo Choi node->name); 540f262f28cSChanwoo Choi continue; 541f262f28cSChanwoo Choi } 542f262f28cSChanwoo Choi 54377fe46a3SChanwoo Choi desc[j].ops = event_ops; 544f262f28cSChanwoo Choi desc[j].driver_data = info; 545f262f28cSChanwoo Choi 546f262f28cSChanwoo Choi of_property_read_string(node, "event-name", &desc[j].name); 547f262f28cSChanwoo Choi 548f262f28cSChanwoo Choi j++; 549f262f28cSChanwoo Choi } 550f262f28cSChanwoo Choi info->desc = desc; 551f262f28cSChanwoo Choi 552f262f28cSChanwoo Choi of_node_put(events_np); 553f262f28cSChanwoo Choi 554f262f28cSChanwoo Choi return 0; 555f262f28cSChanwoo Choi } 556f262f28cSChanwoo Choi 5572a3ea647SChanwoo Choi static struct regmap_config exynos_ppmu_regmap_config = { 5582a3ea647SChanwoo Choi .reg_bits = 32, 5592a3ea647SChanwoo Choi .val_bits = 32, 5602a3ea647SChanwoo Choi .reg_stride = 4, 5612a3ea647SChanwoo Choi }; 5622a3ea647SChanwoo Choi 5632a3ea647SChanwoo Choi static int exynos_ppmu_parse_dt(struct platform_device *pdev, 5642a3ea647SChanwoo Choi struct exynos_ppmu *info) 565f262f28cSChanwoo Choi { 566f262f28cSChanwoo Choi struct device *dev = info->dev; 567f262f28cSChanwoo Choi struct device_node *np = dev->of_node; 5682a3ea647SChanwoo Choi struct resource *res; 5692a3ea647SChanwoo Choi void __iomem *base; 570f262f28cSChanwoo Choi int ret = 0; 571f262f28cSChanwoo Choi 572f262f28cSChanwoo Choi if (!np) { 573f262f28cSChanwoo Choi dev_err(dev, "failed to find devicetree node\n"); 574f262f28cSChanwoo Choi return -EINVAL; 575f262f28cSChanwoo Choi } 576f262f28cSChanwoo Choi 577f262f28cSChanwoo Choi /* Maps the memory mapped IO to control PPMU register */ 5782a3ea647SChanwoo Choi res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 5792a3ea647SChanwoo Choi base = devm_ioremap_resource(dev, res); 5802a3ea647SChanwoo Choi if (IS_ERR(base)) 5812a3ea647SChanwoo Choi return PTR_ERR(base); 5822a3ea647SChanwoo Choi 5832a3ea647SChanwoo Choi exynos_ppmu_regmap_config.max_register = resource_size(res) - 4; 5842a3ea647SChanwoo Choi info->regmap = devm_regmap_init_mmio(dev, base, 5852a3ea647SChanwoo Choi &exynos_ppmu_regmap_config); 5862a3ea647SChanwoo Choi if (IS_ERR(info->regmap)) { 5872a3ea647SChanwoo Choi dev_err(dev, "failed to initialize regmap\n"); 5882a3ea647SChanwoo Choi return PTR_ERR(info->regmap); 589f262f28cSChanwoo Choi } 590f262f28cSChanwoo Choi 591f262f28cSChanwoo Choi info->ppmu.clk = devm_clk_get(dev, "ppmu"); 592f262f28cSChanwoo Choi if (IS_ERR(info->ppmu.clk)) { 593f262f28cSChanwoo Choi info->ppmu.clk = NULL; 594f262f28cSChanwoo Choi dev_warn(dev, "cannot get PPMU clock\n"); 595f262f28cSChanwoo Choi } 596f262f28cSChanwoo Choi 597f262f28cSChanwoo Choi ret = of_get_devfreq_events(np, info); 598f262f28cSChanwoo Choi if (ret < 0) { 599f262f28cSChanwoo Choi dev_err(dev, "failed to parse exynos ppmu dt node\n"); 6002a3ea647SChanwoo Choi return ret; 601f262f28cSChanwoo Choi } 602f262f28cSChanwoo Choi 603f262f28cSChanwoo Choi return 0; 604f262f28cSChanwoo Choi } 605f262f28cSChanwoo Choi 606f262f28cSChanwoo Choi static int exynos_ppmu_probe(struct platform_device *pdev) 607f262f28cSChanwoo Choi { 608f262f28cSChanwoo Choi struct exynos_ppmu *info; 609f262f28cSChanwoo Choi struct devfreq_event_dev **edev; 610f262f28cSChanwoo Choi struct devfreq_event_desc *desc; 611f262f28cSChanwoo Choi int i, ret = 0, size; 612f262f28cSChanwoo Choi 613f262f28cSChanwoo Choi info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); 614f262f28cSChanwoo Choi if (!info) 615f262f28cSChanwoo Choi return -ENOMEM; 616f262f28cSChanwoo Choi 617f262f28cSChanwoo Choi info->dev = &pdev->dev; 618f262f28cSChanwoo Choi 619f262f28cSChanwoo Choi /* Parse dt data to get resource */ 6202a3ea647SChanwoo Choi ret = exynos_ppmu_parse_dt(pdev, info); 621f262f28cSChanwoo Choi if (ret < 0) { 622f262f28cSChanwoo Choi dev_err(&pdev->dev, 623f262f28cSChanwoo Choi "failed to parse devicetree for resource\n"); 624f262f28cSChanwoo Choi return ret; 625f262f28cSChanwoo Choi } 626f262f28cSChanwoo Choi desc = info->desc; 627f262f28cSChanwoo Choi 628f262f28cSChanwoo Choi size = sizeof(struct devfreq_event_dev *) * info->num_events; 629f262f28cSChanwoo Choi info->edev = devm_kzalloc(&pdev->dev, size, GFP_KERNEL); 630f262f28cSChanwoo Choi if (!info->edev) { 631f262f28cSChanwoo Choi dev_err(&pdev->dev, 632f262f28cSChanwoo Choi "failed to allocate memory devfreq-event devices\n"); 6332a3ea647SChanwoo Choi return -ENOMEM; 634f262f28cSChanwoo Choi } 635f262f28cSChanwoo Choi edev = info->edev; 636f262f28cSChanwoo Choi platform_set_drvdata(pdev, info); 637f262f28cSChanwoo Choi 638f262f28cSChanwoo Choi for (i = 0; i < info->num_events; i++) { 639f262f28cSChanwoo Choi edev[i] = devm_devfreq_event_add_edev(&pdev->dev, &desc[i]); 64004a695edSDan Carpenter if (IS_ERR(edev[i])) { 64104a695edSDan Carpenter ret = PTR_ERR(edev[i]); 642f262f28cSChanwoo Choi dev_err(&pdev->dev, 643f262f28cSChanwoo Choi "failed to add devfreq-event device\n"); 6442a3ea647SChanwoo Choi return PTR_ERR(edev[i]); 645f262f28cSChanwoo Choi } 646b0d75c08SChanwoo Choi 647b0d75c08SChanwoo Choi pr_info("exynos-ppmu: new PPMU device registered %s (%s)\n", 648b0d75c08SChanwoo Choi dev_name(&pdev->dev), desc[i].name); 649f262f28cSChanwoo Choi } 650f262f28cSChanwoo Choi 651f262f28cSChanwoo Choi clk_prepare_enable(info->ppmu.clk); 652f262f28cSChanwoo Choi 653f262f28cSChanwoo Choi return 0; 654f262f28cSChanwoo Choi } 655f262f28cSChanwoo Choi 656f262f28cSChanwoo Choi static int exynos_ppmu_remove(struct platform_device *pdev) 657f262f28cSChanwoo Choi { 658f262f28cSChanwoo Choi struct exynos_ppmu *info = platform_get_drvdata(pdev); 659f262f28cSChanwoo Choi 660f262f28cSChanwoo Choi clk_disable_unprepare(info->ppmu.clk); 661f262f28cSChanwoo Choi 662f262f28cSChanwoo Choi return 0; 663f262f28cSChanwoo Choi } 664f262f28cSChanwoo Choi 665f262f28cSChanwoo Choi static struct platform_driver exynos_ppmu_driver = { 666f262f28cSChanwoo Choi .probe = exynos_ppmu_probe, 667f262f28cSChanwoo Choi .remove = exynos_ppmu_remove, 668f262f28cSChanwoo Choi .driver = { 669f262f28cSChanwoo Choi .name = "exynos-ppmu", 670f262f28cSChanwoo Choi .of_match_table = exynos_ppmu_id_match, 671f262f28cSChanwoo Choi }, 672f262f28cSChanwoo Choi }; 673f262f28cSChanwoo Choi module_platform_driver(exynos_ppmu_driver); 674f262f28cSChanwoo Choi 675f262f28cSChanwoo Choi MODULE_DESCRIPTION("Exynos PPMU(Platform Performance Monitoring Unit) driver"); 676f262f28cSChanwoo Choi MODULE_AUTHOR("Chanwoo Choi <cw00.choi@samsung.com>"); 677f262f28cSChanwoo Choi MODULE_LICENSE("GPL"); 678