1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2f262f28cSChanwoo Choi /* 3f262f28cSChanwoo Choi * exynos_ppmu.c - EXYNOS PPMU (Platform Performance Monitoring Unit) support 4f262f28cSChanwoo Choi * 577fe46a3SChanwoo Choi * Copyright (c) 2014-2015 Samsung Electronics Co., Ltd. 6f262f28cSChanwoo Choi * Author : Chanwoo Choi <cw00.choi@samsung.com> 7f262f28cSChanwoo Choi * 8f262f28cSChanwoo Choi * This driver is based on drivers/devfreq/exynos/exynos_ppmu.c 9f262f28cSChanwoo Choi */ 10f262f28cSChanwoo Choi 11f262f28cSChanwoo Choi #include <linux/clk.h> 12f262f28cSChanwoo Choi #include <linux/io.h> 13f262f28cSChanwoo Choi #include <linux/kernel.h> 14f262f28cSChanwoo Choi #include <linux/module.h> 15f262f28cSChanwoo Choi #include <linux/of_address.h> 16f262f28cSChanwoo Choi #include <linux/platform_device.h> 172a3ea647SChanwoo Choi #include <linux/regmap.h> 18f262f28cSChanwoo Choi #include <linux/suspend.h> 19f262f28cSChanwoo Choi #include <linux/devfreq-event.h> 20f262f28cSChanwoo Choi 21f262f28cSChanwoo Choi #include "exynos-ppmu.h" 22f262f28cSChanwoo Choi 23f262f28cSChanwoo Choi struct exynos_ppmu_data { 24f262f28cSChanwoo Choi struct clk *clk; 25f262f28cSChanwoo Choi }; 26f262f28cSChanwoo Choi 27f262f28cSChanwoo Choi struct exynos_ppmu { 28f262f28cSChanwoo Choi struct devfreq_event_dev **edev; 29f262f28cSChanwoo Choi struct devfreq_event_desc *desc; 30f262f28cSChanwoo Choi unsigned int num_events; 31f262f28cSChanwoo Choi 32f262f28cSChanwoo Choi struct device *dev; 332a3ea647SChanwoo Choi struct regmap *regmap; 34f262f28cSChanwoo Choi 35f262f28cSChanwoo Choi struct exynos_ppmu_data ppmu; 36f262f28cSChanwoo Choi }; 37f262f28cSChanwoo Choi 38f262f28cSChanwoo Choi #define PPMU_EVENT(name) \ 39f262f28cSChanwoo Choi { "ppmu-event0-"#name, PPMU_PMNCNT0 }, \ 40f262f28cSChanwoo Choi { "ppmu-event1-"#name, PPMU_PMNCNT1 }, \ 41f262f28cSChanwoo Choi { "ppmu-event2-"#name, PPMU_PMNCNT2 }, \ 42f262f28cSChanwoo Choi { "ppmu-event3-"#name, PPMU_PMNCNT3 } 43f262f28cSChanwoo Choi 446b1355f9SKrzysztof Kozlowski static struct __exynos_ppmu_events { 45f262f28cSChanwoo Choi char *name; 46f262f28cSChanwoo Choi int id; 47f262f28cSChanwoo Choi } ppmu_events[] = { 48f262f28cSChanwoo Choi /* For Exynos3250, Exynos4 and Exynos5260 */ 49f262f28cSChanwoo Choi PPMU_EVENT(g3d), 50f262f28cSChanwoo Choi PPMU_EVENT(fsys), 51f262f28cSChanwoo Choi 52f262f28cSChanwoo Choi /* For Exynos4 SoCs and Exynos3250 */ 53f262f28cSChanwoo Choi PPMU_EVENT(dmc0), 54f262f28cSChanwoo Choi PPMU_EVENT(dmc1), 55f262f28cSChanwoo Choi PPMU_EVENT(cpu), 56f262f28cSChanwoo Choi PPMU_EVENT(rightbus), 57f262f28cSChanwoo Choi PPMU_EVENT(leftbus), 58f262f28cSChanwoo Choi PPMU_EVENT(lcd0), 59f262f28cSChanwoo Choi PPMU_EVENT(camif), 60f262f28cSChanwoo Choi 61f262f28cSChanwoo Choi /* Only for Exynos3250 and Exynos5260 */ 62f262f28cSChanwoo Choi PPMU_EVENT(mfc), 63f262f28cSChanwoo Choi 64f262f28cSChanwoo Choi /* Only for Exynos4 SoCs */ 65f262f28cSChanwoo Choi PPMU_EVENT(mfc-left), 66f262f28cSChanwoo Choi PPMU_EVENT(mfc-right), 67f262f28cSChanwoo Choi 68f262f28cSChanwoo Choi /* Only for Exynos5260 SoCs */ 69f262f28cSChanwoo Choi PPMU_EVENT(drex0-s0), 70f262f28cSChanwoo Choi PPMU_EVENT(drex0-s1), 71f262f28cSChanwoo Choi PPMU_EVENT(drex1-s0), 72f262f28cSChanwoo Choi PPMU_EVENT(drex1-s1), 73f262f28cSChanwoo Choi PPMU_EVENT(eagle), 74f262f28cSChanwoo Choi PPMU_EVENT(kfc), 75f262f28cSChanwoo Choi PPMU_EVENT(isp), 76f262f28cSChanwoo Choi PPMU_EVENT(fimc), 77f262f28cSChanwoo Choi PPMU_EVENT(gscl), 78f262f28cSChanwoo Choi PPMU_EVENT(mscl), 79f262f28cSChanwoo Choi PPMU_EVENT(fimd0x), 80f262f28cSChanwoo Choi PPMU_EVENT(fimd1x), 8177fe46a3SChanwoo Choi 8277fe46a3SChanwoo Choi /* Only for Exynos5433 SoCs */ 8377fe46a3SChanwoo Choi PPMU_EVENT(d0-cpu), 8477fe46a3SChanwoo Choi PPMU_EVENT(d0-general), 8577fe46a3SChanwoo Choi PPMU_EVENT(d0-rt), 8677fe46a3SChanwoo Choi PPMU_EVENT(d1-cpu), 8777fe46a3SChanwoo Choi PPMU_EVENT(d1-general), 8877fe46a3SChanwoo Choi PPMU_EVENT(d1-rt), 895f866963SLukasz Luba 905f866963SLukasz Luba /* For Exynos5422 SoC */ 915f866963SLukasz Luba PPMU_EVENT(dmc0_0), 925f866963SLukasz Luba PPMU_EVENT(dmc0_1), 935f866963SLukasz Luba PPMU_EVENT(dmc1_0), 945f866963SLukasz Luba PPMU_EVENT(dmc1_1), 95f262f28cSChanwoo Choi }; 96f262f28cSChanwoo Choi 97f262f28cSChanwoo Choi static int exynos_ppmu_find_ppmu_id(struct devfreq_event_dev *edev) 98f262f28cSChanwoo Choi { 99f262f28cSChanwoo Choi int i; 100f262f28cSChanwoo Choi 101f262f28cSChanwoo Choi for (i = 0; i < ARRAY_SIZE(ppmu_events); i++) 102f262f28cSChanwoo Choi if (!strcmp(edev->desc->name, ppmu_events[i].name)) 103f262f28cSChanwoo Choi return ppmu_events[i].id; 104f262f28cSChanwoo Choi 105f262f28cSChanwoo Choi return -EINVAL; 106f262f28cSChanwoo Choi } 107f262f28cSChanwoo Choi 10877fe46a3SChanwoo Choi /* 10977fe46a3SChanwoo Choi * The devfreq-event ops structure for PPMU v1.1 11077fe46a3SChanwoo Choi */ 111f262f28cSChanwoo Choi static int exynos_ppmu_disable(struct devfreq_event_dev *edev) 112f262f28cSChanwoo Choi { 113f262f28cSChanwoo Choi struct exynos_ppmu *info = devfreq_event_get_drvdata(edev); 1142a3ea647SChanwoo Choi int ret; 115f262f28cSChanwoo Choi u32 pmnc; 116f262f28cSChanwoo Choi 117f262f28cSChanwoo Choi /* Disable all counters */ 1182a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_CNTENC, 1192a3ea647SChanwoo Choi PPMU_CCNT_MASK | 120f262f28cSChanwoo Choi PPMU_PMCNT0_MASK | 121f262f28cSChanwoo Choi PPMU_PMCNT1_MASK | 122f262f28cSChanwoo Choi PPMU_PMCNT2_MASK | 1232a3ea647SChanwoo Choi PPMU_PMCNT3_MASK); 1242a3ea647SChanwoo Choi if (ret < 0) 1252a3ea647SChanwoo Choi return ret; 126f262f28cSChanwoo Choi 127f262f28cSChanwoo Choi /* Disable PPMU */ 1282a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_PMNC, &pmnc); 1292a3ea647SChanwoo Choi if (ret < 0) 1302a3ea647SChanwoo Choi return ret; 1312a3ea647SChanwoo Choi 132f262f28cSChanwoo Choi pmnc &= ~PPMU_PMNC_ENABLE_MASK; 1332a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_PMNC, pmnc); 1342a3ea647SChanwoo Choi if (ret < 0) 1352a3ea647SChanwoo Choi return ret; 136f262f28cSChanwoo Choi 137f262f28cSChanwoo Choi return 0; 138f262f28cSChanwoo Choi } 139f262f28cSChanwoo Choi 140f262f28cSChanwoo Choi static int exynos_ppmu_set_event(struct devfreq_event_dev *edev) 141f262f28cSChanwoo Choi { 142f262f28cSChanwoo Choi struct exynos_ppmu *info = devfreq_event_get_drvdata(edev); 143f262f28cSChanwoo Choi int id = exynos_ppmu_find_ppmu_id(edev); 1442a3ea647SChanwoo Choi int ret; 145f262f28cSChanwoo Choi u32 pmnc, cntens; 146f262f28cSChanwoo Choi 147f262f28cSChanwoo Choi if (id < 0) 148f262f28cSChanwoo Choi return id; 149f262f28cSChanwoo Choi 150f262f28cSChanwoo Choi /* Enable specific counter */ 1512a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_CNTENS, &cntens); 1522a3ea647SChanwoo Choi if (ret < 0) 1532a3ea647SChanwoo Choi return ret; 1542a3ea647SChanwoo Choi 155f262f28cSChanwoo Choi cntens |= (PPMU_CCNT_MASK | (PPMU_ENABLE << id)); 1562a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_CNTENS, cntens); 1572a3ea647SChanwoo Choi if (ret < 0) 1582a3ea647SChanwoo Choi return ret; 159f262f28cSChanwoo Choi 160f262f28cSChanwoo Choi /* Set the event of Read/Write data count */ 1612a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_BEVTxSEL(id), 1622a3ea647SChanwoo Choi PPMU_RO_DATA_CNT | PPMU_WO_DATA_CNT); 1632a3ea647SChanwoo Choi if (ret < 0) 1642a3ea647SChanwoo Choi return ret; 165f262f28cSChanwoo Choi 166f262f28cSChanwoo Choi /* Reset cycle counter/performance counter and enable PPMU */ 1672a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_PMNC, &pmnc); 1682a3ea647SChanwoo Choi if (ret < 0) 1692a3ea647SChanwoo Choi return ret; 1702a3ea647SChanwoo Choi 171f262f28cSChanwoo Choi pmnc &= ~(PPMU_PMNC_ENABLE_MASK 172f262f28cSChanwoo Choi | PPMU_PMNC_COUNTER_RESET_MASK 173f262f28cSChanwoo Choi | PPMU_PMNC_CC_RESET_MASK); 174f262f28cSChanwoo Choi pmnc |= (PPMU_ENABLE << PPMU_PMNC_ENABLE_SHIFT); 175f262f28cSChanwoo Choi pmnc |= (PPMU_ENABLE << PPMU_PMNC_COUNTER_RESET_SHIFT); 176f262f28cSChanwoo Choi pmnc |= (PPMU_ENABLE << PPMU_PMNC_CC_RESET_SHIFT); 1772a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_PMNC, pmnc); 1782a3ea647SChanwoo Choi if (ret < 0) 1792a3ea647SChanwoo Choi return ret; 180f262f28cSChanwoo Choi 181f262f28cSChanwoo Choi return 0; 182f262f28cSChanwoo Choi } 183f262f28cSChanwoo Choi 184f262f28cSChanwoo Choi static int exynos_ppmu_get_event(struct devfreq_event_dev *edev, 185f262f28cSChanwoo Choi struct devfreq_event_data *edata) 186f262f28cSChanwoo Choi { 187f262f28cSChanwoo Choi struct exynos_ppmu *info = devfreq_event_get_drvdata(edev); 188f262f28cSChanwoo Choi int id = exynos_ppmu_find_ppmu_id(edev); 1892a3ea647SChanwoo Choi unsigned int total_count, load_count; 1902a3ea647SChanwoo Choi unsigned int pmcnt3_high, pmcnt3_low; 1912a3ea647SChanwoo Choi unsigned int pmnc, cntenc; 1922a3ea647SChanwoo Choi int ret; 193f262f28cSChanwoo Choi 194f262f28cSChanwoo Choi if (id < 0) 195f262f28cSChanwoo Choi return -EINVAL; 196f262f28cSChanwoo Choi 197f262f28cSChanwoo Choi /* Disable PPMU */ 1982a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_PMNC, &pmnc); 1992a3ea647SChanwoo Choi if (ret < 0) 2002a3ea647SChanwoo Choi return ret; 2012a3ea647SChanwoo Choi 202f262f28cSChanwoo Choi pmnc &= ~PPMU_PMNC_ENABLE_MASK; 2032a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_PMNC, pmnc); 2042a3ea647SChanwoo Choi if (ret < 0) 2052a3ea647SChanwoo Choi return ret; 206f262f28cSChanwoo Choi 207f262f28cSChanwoo Choi /* Read cycle count */ 2082a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_CCNT, &total_count); 2092a3ea647SChanwoo Choi if (ret < 0) 2102a3ea647SChanwoo Choi return ret; 2112a3ea647SChanwoo Choi edata->total_count = total_count; 212f262f28cSChanwoo Choi 213f262f28cSChanwoo Choi /* Read performance count */ 214f262f28cSChanwoo Choi switch (id) { 215f262f28cSChanwoo Choi case PPMU_PMNCNT0: 216f262f28cSChanwoo Choi case PPMU_PMNCNT1: 217f262f28cSChanwoo Choi case PPMU_PMNCNT2: 2182a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_PMNCT(id), &load_count); 2192a3ea647SChanwoo Choi if (ret < 0) 2202a3ea647SChanwoo Choi return ret; 2212a3ea647SChanwoo Choi edata->load_count = load_count; 222f262f28cSChanwoo Choi break; 223f262f28cSChanwoo Choi case PPMU_PMNCNT3: 2242a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_PMCNT3_HIGH, &pmcnt3_high); 2252a3ea647SChanwoo Choi if (ret < 0) 2262a3ea647SChanwoo Choi return ret; 2272a3ea647SChanwoo Choi 2282a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_PMCNT3_LOW, &pmcnt3_low); 2292a3ea647SChanwoo Choi if (ret < 0) 2302a3ea647SChanwoo Choi return ret; 2312a3ea647SChanwoo Choi 2322a3ea647SChanwoo Choi edata->load_count = ((pmcnt3_high << 8) | pmcnt3_low); 233f262f28cSChanwoo Choi break; 234f262f28cSChanwoo Choi default: 235f262f28cSChanwoo Choi return -EINVAL; 236f262f28cSChanwoo Choi } 237f262f28cSChanwoo Choi 238f262f28cSChanwoo Choi /* Disable specific counter */ 2392a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_CNTENC, &cntenc); 2402a3ea647SChanwoo Choi if (ret < 0) 2412a3ea647SChanwoo Choi return ret; 2422a3ea647SChanwoo Choi 243f262f28cSChanwoo Choi cntenc |= (PPMU_CCNT_MASK | (PPMU_ENABLE << id)); 2442a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_CNTENC, cntenc); 2452a3ea647SChanwoo Choi if (ret < 0) 2462a3ea647SChanwoo Choi return ret; 247f262f28cSChanwoo Choi 248f262f28cSChanwoo Choi dev_dbg(&edev->dev, "%s (event: %ld/%ld)\n", edev->desc->name, 249f262f28cSChanwoo Choi edata->load_count, edata->total_count); 250f262f28cSChanwoo Choi 251f262f28cSChanwoo Choi return 0; 252f262f28cSChanwoo Choi } 253f262f28cSChanwoo Choi 2546f240fbcSChanwoo Choi static const struct devfreq_event_ops exynos_ppmu_ops = { 255f262f28cSChanwoo Choi .disable = exynos_ppmu_disable, 256f262f28cSChanwoo Choi .set_event = exynos_ppmu_set_event, 257f262f28cSChanwoo Choi .get_event = exynos_ppmu_get_event, 258f262f28cSChanwoo Choi }; 259f262f28cSChanwoo Choi 26077fe46a3SChanwoo Choi /* 26177fe46a3SChanwoo Choi * The devfreq-event ops structure for PPMU v2.0 26277fe46a3SChanwoo Choi */ 26377fe46a3SChanwoo Choi static int exynos_ppmu_v2_disable(struct devfreq_event_dev *edev) 26477fe46a3SChanwoo Choi { 26577fe46a3SChanwoo Choi struct exynos_ppmu *info = devfreq_event_get_drvdata(edev); 2662a3ea647SChanwoo Choi int ret; 26777fe46a3SChanwoo Choi u32 pmnc, clear; 26877fe46a3SChanwoo Choi 26977fe46a3SChanwoo Choi /* Disable all counters */ 27077fe46a3SChanwoo Choi clear = (PPMU_CCNT_MASK | PPMU_PMCNT0_MASK | PPMU_PMCNT1_MASK 27177fe46a3SChanwoo Choi | PPMU_PMCNT2_MASK | PPMU_PMCNT3_MASK); 2722a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_FLAG, clear); 2732a3ea647SChanwoo Choi if (ret < 0) 2742a3ea647SChanwoo Choi return ret; 27577fe46a3SChanwoo Choi 2762a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_INTENC, clear); 2772a3ea647SChanwoo Choi if (ret < 0) 2782a3ea647SChanwoo Choi return ret; 27977fe46a3SChanwoo Choi 2802a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CNTENC, clear); 2812a3ea647SChanwoo Choi if (ret < 0) 2822a3ea647SChanwoo Choi return ret; 2832a3ea647SChanwoo Choi 2842a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CNT_RESET, clear); 2852a3ea647SChanwoo Choi if (ret < 0) 2862a3ea647SChanwoo Choi return ret; 2872a3ea647SChanwoo Choi 2882a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CIG_CFG0, 0x0); 2892a3ea647SChanwoo Choi if (ret < 0) 2902a3ea647SChanwoo Choi return ret; 2912a3ea647SChanwoo Choi 2922a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CIG_CFG1, 0x0); 2932a3ea647SChanwoo Choi if (ret < 0) 2942a3ea647SChanwoo Choi return ret; 2952a3ea647SChanwoo Choi 2962a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CIG_CFG2, 0x0); 2972a3ea647SChanwoo Choi if (ret < 0) 2982a3ea647SChanwoo Choi return ret; 2992a3ea647SChanwoo Choi 3002a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CIG_RESULT, 0x0); 3012a3ea647SChanwoo Choi if (ret < 0) 3022a3ea647SChanwoo Choi return ret; 3032a3ea647SChanwoo Choi 3042a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CNT_AUTO, 0x0); 3052a3ea647SChanwoo Choi if (ret < 0) 3062a3ea647SChanwoo Choi return ret; 3072a3ea647SChanwoo Choi 3082a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CH_EV0_TYPE, 0x0); 3092a3ea647SChanwoo Choi if (ret < 0) 3102a3ea647SChanwoo Choi return ret; 3112a3ea647SChanwoo Choi 3122a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CH_EV1_TYPE, 0x0); 3132a3ea647SChanwoo Choi if (ret < 0) 3142a3ea647SChanwoo Choi return ret; 3152a3ea647SChanwoo Choi 3162a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CH_EV2_TYPE, 0x0); 3172a3ea647SChanwoo Choi if (ret < 0) 3182a3ea647SChanwoo Choi return ret; 3192a3ea647SChanwoo Choi 3202a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CH_EV3_TYPE, 0x0); 3212a3ea647SChanwoo Choi if (ret < 0) 3222a3ea647SChanwoo Choi return ret; 3232a3ea647SChanwoo Choi 3242a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_SM_ID_V, 0x0); 3252a3ea647SChanwoo Choi if (ret < 0) 3262a3ea647SChanwoo Choi return ret; 3272a3ea647SChanwoo Choi 3282a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_SM_ID_A, 0x0); 3292a3ea647SChanwoo Choi if (ret < 0) 3302a3ea647SChanwoo Choi return ret; 3312a3ea647SChanwoo Choi 3322a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_SM_OTHERS_V, 0x0); 3332a3ea647SChanwoo Choi if (ret < 0) 3342a3ea647SChanwoo Choi return ret; 3352a3ea647SChanwoo Choi 3362a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_SM_OTHERS_A, 0x0); 3372a3ea647SChanwoo Choi if (ret < 0) 3382a3ea647SChanwoo Choi return ret; 3392a3ea647SChanwoo Choi 3402a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_INTERRUPT_RESET, 0x0); 3412a3ea647SChanwoo Choi if (ret < 0) 3422a3ea647SChanwoo Choi return ret; 34377fe46a3SChanwoo Choi 34477fe46a3SChanwoo Choi /* Disable PPMU */ 3452a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_PMNC, &pmnc); 3462a3ea647SChanwoo Choi if (ret < 0) 3472a3ea647SChanwoo Choi return ret; 3482a3ea647SChanwoo Choi 34977fe46a3SChanwoo Choi pmnc &= ~PPMU_PMNC_ENABLE_MASK; 3502a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_PMNC, pmnc); 3512a3ea647SChanwoo Choi if (ret < 0) 3522a3ea647SChanwoo Choi return ret; 35377fe46a3SChanwoo Choi 35477fe46a3SChanwoo Choi return 0; 35577fe46a3SChanwoo Choi } 35677fe46a3SChanwoo Choi 35777fe46a3SChanwoo Choi static int exynos_ppmu_v2_set_event(struct devfreq_event_dev *edev) 35877fe46a3SChanwoo Choi { 35977fe46a3SChanwoo Choi struct exynos_ppmu *info = devfreq_event_get_drvdata(edev); 3602a3ea647SChanwoo Choi unsigned int pmnc, cntens; 36177fe46a3SChanwoo Choi int id = exynos_ppmu_find_ppmu_id(edev); 3622a3ea647SChanwoo Choi int ret; 36377fe46a3SChanwoo Choi 36477fe46a3SChanwoo Choi /* Enable all counters */ 3652a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_CNTENS, &cntens); 3662a3ea647SChanwoo Choi if (ret < 0) 3672a3ea647SChanwoo Choi return ret; 3682a3ea647SChanwoo Choi 36977fe46a3SChanwoo Choi cntens |= (PPMU_CCNT_MASK | (PPMU_ENABLE << id)); 3702a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CNTENS, cntens); 3712a3ea647SChanwoo Choi if (ret < 0) 3722a3ea647SChanwoo Choi return ret; 37377fe46a3SChanwoo Choi 37477fe46a3SChanwoo Choi /* Set the event of Read/Write data count */ 37577fe46a3SChanwoo Choi switch (id) { 37677fe46a3SChanwoo Choi case PPMU_PMNCNT0: 37777fe46a3SChanwoo Choi case PPMU_PMNCNT1: 37877fe46a3SChanwoo Choi case PPMU_PMNCNT2: 3792a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CH_EVx_TYPE(id), 3802a3ea647SChanwoo Choi PPMU_V2_RO_DATA_CNT | PPMU_V2_WO_DATA_CNT); 3812a3ea647SChanwoo Choi if (ret < 0) 3822a3ea647SChanwoo Choi return ret; 38377fe46a3SChanwoo Choi break; 38477fe46a3SChanwoo Choi case PPMU_PMNCNT3: 3852a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CH_EVx_TYPE(id), 3862a3ea647SChanwoo Choi PPMU_V2_EVT3_RW_DATA_CNT); 3872a3ea647SChanwoo Choi if (ret < 0) 3882a3ea647SChanwoo Choi return ret; 38977fe46a3SChanwoo Choi break; 39077fe46a3SChanwoo Choi } 39177fe46a3SChanwoo Choi 39277fe46a3SChanwoo Choi /* Reset cycle counter/performance counter and enable PPMU */ 3932a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_PMNC, &pmnc); 3942a3ea647SChanwoo Choi if (ret < 0) 3952a3ea647SChanwoo Choi return ret; 3962a3ea647SChanwoo Choi 39777fe46a3SChanwoo Choi pmnc &= ~(PPMU_PMNC_ENABLE_MASK 39877fe46a3SChanwoo Choi | PPMU_PMNC_COUNTER_RESET_MASK 39977fe46a3SChanwoo Choi | PPMU_PMNC_CC_RESET_MASK 40077fe46a3SChanwoo Choi | PPMU_PMNC_CC_DIVIDER_MASK 40177fe46a3SChanwoo Choi | PPMU_V2_PMNC_START_MODE_MASK); 40277fe46a3SChanwoo Choi pmnc |= (PPMU_ENABLE << PPMU_PMNC_ENABLE_SHIFT); 40377fe46a3SChanwoo Choi pmnc |= (PPMU_ENABLE << PPMU_PMNC_COUNTER_RESET_SHIFT); 40477fe46a3SChanwoo Choi pmnc |= (PPMU_ENABLE << PPMU_PMNC_CC_RESET_SHIFT); 40577fe46a3SChanwoo Choi pmnc |= (PPMU_V2_MODE_MANUAL << PPMU_V2_PMNC_START_MODE_SHIFT); 4062a3ea647SChanwoo Choi 4072a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_PMNC, pmnc); 4082a3ea647SChanwoo Choi if (ret < 0) 4092a3ea647SChanwoo Choi return ret; 41077fe46a3SChanwoo Choi 41177fe46a3SChanwoo Choi return 0; 41277fe46a3SChanwoo Choi } 41377fe46a3SChanwoo Choi 41477fe46a3SChanwoo Choi static int exynos_ppmu_v2_get_event(struct devfreq_event_dev *edev, 41577fe46a3SChanwoo Choi struct devfreq_event_data *edata) 41677fe46a3SChanwoo Choi { 41777fe46a3SChanwoo Choi struct exynos_ppmu *info = devfreq_event_get_drvdata(edev); 41877fe46a3SChanwoo Choi int id = exynos_ppmu_find_ppmu_id(edev); 4192a3ea647SChanwoo Choi int ret; 4202a3ea647SChanwoo Choi unsigned int pmnc, cntenc; 4212a3ea647SChanwoo Choi unsigned int pmcnt_high, pmcnt_low; 4222a3ea647SChanwoo Choi unsigned int total_count, count; 4232a3ea647SChanwoo Choi unsigned long load_count = 0; 42477fe46a3SChanwoo Choi 42577fe46a3SChanwoo Choi /* Disable PPMU */ 4262a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_PMNC, &pmnc); 4272a3ea647SChanwoo Choi if (ret < 0) 4282a3ea647SChanwoo Choi return ret; 4292a3ea647SChanwoo Choi 43077fe46a3SChanwoo Choi pmnc &= ~PPMU_PMNC_ENABLE_MASK; 4312a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_PMNC, pmnc); 4322a3ea647SChanwoo Choi if (ret < 0) 4332a3ea647SChanwoo Choi return ret; 43477fe46a3SChanwoo Choi 43577fe46a3SChanwoo Choi /* Read cycle count and performance count */ 4362a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_CCNT, &total_count); 4372a3ea647SChanwoo Choi if (ret < 0) 4382a3ea647SChanwoo Choi return ret; 4392a3ea647SChanwoo Choi edata->total_count = total_count; 44077fe46a3SChanwoo Choi 44177fe46a3SChanwoo Choi switch (id) { 44277fe46a3SChanwoo Choi case PPMU_PMNCNT0: 44377fe46a3SChanwoo Choi case PPMU_PMNCNT1: 44477fe46a3SChanwoo Choi case PPMU_PMNCNT2: 4452a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_PMNCT(id), &count); 4462a3ea647SChanwoo Choi if (ret < 0) 4472a3ea647SChanwoo Choi return ret; 4482a3ea647SChanwoo Choi load_count = count; 44977fe46a3SChanwoo Choi break; 45077fe46a3SChanwoo Choi case PPMU_PMNCNT3: 4512a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_PMCNT3_HIGH, 4522a3ea647SChanwoo Choi &pmcnt_high); 4532a3ea647SChanwoo Choi if (ret < 0) 4542a3ea647SChanwoo Choi return ret; 4552a3ea647SChanwoo Choi 4562a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_PMCNT3_LOW, &pmcnt_low); 4572a3ea647SChanwoo Choi if (ret < 0) 4582a3ea647SChanwoo Choi return ret; 4592a3ea647SChanwoo Choi 4602a3ea647SChanwoo Choi load_count = ((u64)((pmcnt_high & 0xff)) << 32)+ (u64)pmcnt_low; 46177fe46a3SChanwoo Choi break; 46277fe46a3SChanwoo Choi } 46377fe46a3SChanwoo Choi edata->load_count = load_count; 46477fe46a3SChanwoo Choi 46577fe46a3SChanwoo Choi /* Disable all counters */ 4662a3ea647SChanwoo Choi ret = regmap_read(info->regmap, PPMU_V2_CNTENC, &cntenc); 4672a3ea647SChanwoo Choi if (ret < 0) 4682a3ea647SChanwoo Choi return 0; 4692a3ea647SChanwoo Choi 47077fe46a3SChanwoo Choi cntenc |= (PPMU_CCNT_MASK | (PPMU_ENABLE << id)); 4712a3ea647SChanwoo Choi ret = regmap_write(info->regmap, PPMU_V2_CNTENC, cntenc); 4722a3ea647SChanwoo Choi if (ret < 0) 4732a3ea647SChanwoo Choi return ret; 47477fe46a3SChanwoo Choi 47577fe46a3SChanwoo Choi dev_dbg(&edev->dev, "%25s (load: %ld / %ld)\n", edev->desc->name, 47677fe46a3SChanwoo Choi edata->load_count, edata->total_count); 47777fe46a3SChanwoo Choi return 0; 47877fe46a3SChanwoo Choi } 47977fe46a3SChanwoo Choi 48077fe46a3SChanwoo Choi static const struct devfreq_event_ops exynos_ppmu_v2_ops = { 48177fe46a3SChanwoo Choi .disable = exynos_ppmu_v2_disable, 48277fe46a3SChanwoo Choi .set_event = exynos_ppmu_v2_set_event, 48377fe46a3SChanwoo Choi .get_event = exynos_ppmu_v2_get_event, 48477fe46a3SChanwoo Choi }; 48577fe46a3SChanwoo Choi 48677fe46a3SChanwoo Choi static const struct of_device_id exynos_ppmu_id_match[] = { 48777fe46a3SChanwoo Choi { 48877fe46a3SChanwoo Choi .compatible = "samsung,exynos-ppmu", 48977fe46a3SChanwoo Choi .data = (void *)&exynos_ppmu_ops, 49077fe46a3SChanwoo Choi }, { 49177fe46a3SChanwoo Choi .compatible = "samsung,exynos-ppmu-v2", 49277fe46a3SChanwoo Choi .data = (void *)&exynos_ppmu_v2_ops, 49377fe46a3SChanwoo Choi }, 49477fe46a3SChanwoo Choi { /* sentinel */ }, 49577fe46a3SChanwoo Choi }; 49629e477f2SJavier Martinez Canillas MODULE_DEVICE_TABLE(of, exynos_ppmu_id_match); 49777fe46a3SChanwoo Choi 49877fe46a3SChanwoo Choi static struct devfreq_event_ops *exynos_bus_get_ops(struct device_node *np) 49977fe46a3SChanwoo Choi { 50077fe46a3SChanwoo Choi const struct of_device_id *match; 50177fe46a3SChanwoo Choi 50277fe46a3SChanwoo Choi match = of_match_node(exynos_ppmu_id_match, np); 50377fe46a3SChanwoo Choi return (struct devfreq_event_ops *)match->data; 50477fe46a3SChanwoo Choi } 50577fe46a3SChanwoo Choi 506f262f28cSChanwoo Choi static int of_get_devfreq_events(struct device_node *np, 507f262f28cSChanwoo Choi struct exynos_ppmu *info) 508f262f28cSChanwoo Choi { 509f262f28cSChanwoo Choi struct devfreq_event_desc *desc; 51077fe46a3SChanwoo Choi struct devfreq_event_ops *event_ops; 511f262f28cSChanwoo Choi struct device *dev = info->dev; 512f262f28cSChanwoo Choi struct device_node *events_np, *node; 513f262f28cSChanwoo Choi int i, j, count; 514f262f28cSChanwoo Choi 515f262f28cSChanwoo Choi events_np = of_get_child_by_name(np, "events"); 516f262f28cSChanwoo Choi if (!events_np) { 517f262f28cSChanwoo Choi dev_err(dev, 518f262f28cSChanwoo Choi "failed to get child node of devfreq-event devices\n"); 519f262f28cSChanwoo Choi return -EINVAL; 520f262f28cSChanwoo Choi } 52177fe46a3SChanwoo Choi event_ops = exynos_bus_get_ops(np); 522f262f28cSChanwoo Choi 523f262f28cSChanwoo Choi count = of_get_child_count(events_np); 524a86854d0SKees Cook desc = devm_kcalloc(dev, count, sizeof(*desc), GFP_KERNEL); 525f262f28cSChanwoo Choi if (!desc) 526f262f28cSChanwoo Choi return -ENOMEM; 527f262f28cSChanwoo Choi info->num_events = count; 528f262f28cSChanwoo Choi 529f262f28cSChanwoo Choi j = 0; 530f262f28cSChanwoo Choi for_each_child_of_node(events_np, node) { 531f262f28cSChanwoo Choi for (i = 0; i < ARRAY_SIZE(ppmu_events); i++) { 532f262f28cSChanwoo Choi if (!ppmu_events[i].name) 533f262f28cSChanwoo Choi continue; 534f262f28cSChanwoo Choi 5350d00a239SRob Herring if (of_node_name_eq(node, ppmu_events[i].name)) 536f262f28cSChanwoo Choi break; 537f262f28cSChanwoo Choi } 538f262f28cSChanwoo Choi 539f262f28cSChanwoo Choi if (i == ARRAY_SIZE(ppmu_events)) { 540f262f28cSChanwoo Choi dev_warn(dev, 541f037eb8cSRob Herring "don't know how to configure events : %pOFn\n", 542f037eb8cSRob Herring node); 543f262f28cSChanwoo Choi continue; 544f262f28cSChanwoo Choi } 545f262f28cSChanwoo Choi 54677fe46a3SChanwoo Choi desc[j].ops = event_ops; 547f262f28cSChanwoo Choi desc[j].driver_data = info; 548f262f28cSChanwoo Choi 549f262f28cSChanwoo Choi of_property_read_string(node, "event-name", &desc[j].name); 550f262f28cSChanwoo Choi 551f262f28cSChanwoo Choi j++; 552f262f28cSChanwoo Choi } 553f262f28cSChanwoo Choi info->desc = desc; 554f262f28cSChanwoo Choi 555f262f28cSChanwoo Choi of_node_put(events_np); 556f262f28cSChanwoo Choi 557f262f28cSChanwoo Choi return 0; 558f262f28cSChanwoo Choi } 559f262f28cSChanwoo Choi 5602a3ea647SChanwoo Choi static struct regmap_config exynos_ppmu_regmap_config = { 5612a3ea647SChanwoo Choi .reg_bits = 32, 5622a3ea647SChanwoo Choi .val_bits = 32, 5632a3ea647SChanwoo Choi .reg_stride = 4, 5642a3ea647SChanwoo Choi }; 5652a3ea647SChanwoo Choi 5662a3ea647SChanwoo Choi static int exynos_ppmu_parse_dt(struct platform_device *pdev, 5672a3ea647SChanwoo Choi struct exynos_ppmu *info) 568f262f28cSChanwoo Choi { 569f262f28cSChanwoo Choi struct device *dev = info->dev; 570f262f28cSChanwoo Choi struct device_node *np = dev->of_node; 5712a3ea647SChanwoo Choi struct resource *res; 5722a3ea647SChanwoo Choi void __iomem *base; 573f262f28cSChanwoo Choi int ret = 0; 574f262f28cSChanwoo Choi 575f262f28cSChanwoo Choi if (!np) { 576f262f28cSChanwoo Choi dev_err(dev, "failed to find devicetree node\n"); 577f262f28cSChanwoo Choi return -EINVAL; 578f262f28cSChanwoo Choi } 579f262f28cSChanwoo Choi 580f262f28cSChanwoo Choi /* Maps the memory mapped IO to control PPMU register */ 5812a3ea647SChanwoo Choi res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 5822a3ea647SChanwoo Choi base = devm_ioremap_resource(dev, res); 5832a3ea647SChanwoo Choi if (IS_ERR(base)) 5842a3ea647SChanwoo Choi return PTR_ERR(base); 5852a3ea647SChanwoo Choi 5862a3ea647SChanwoo Choi exynos_ppmu_regmap_config.max_register = resource_size(res) - 4; 5872a3ea647SChanwoo Choi info->regmap = devm_regmap_init_mmio(dev, base, 5882a3ea647SChanwoo Choi &exynos_ppmu_regmap_config); 5892a3ea647SChanwoo Choi if (IS_ERR(info->regmap)) { 5902a3ea647SChanwoo Choi dev_err(dev, "failed to initialize regmap\n"); 5912a3ea647SChanwoo Choi return PTR_ERR(info->regmap); 592f262f28cSChanwoo Choi } 593f262f28cSChanwoo Choi 594f262f28cSChanwoo Choi info->ppmu.clk = devm_clk_get(dev, "ppmu"); 595f262f28cSChanwoo Choi if (IS_ERR(info->ppmu.clk)) { 596f262f28cSChanwoo Choi info->ppmu.clk = NULL; 597f262f28cSChanwoo Choi dev_warn(dev, "cannot get PPMU clock\n"); 598f262f28cSChanwoo Choi } 599f262f28cSChanwoo Choi 600f262f28cSChanwoo Choi ret = of_get_devfreq_events(np, info); 601f262f28cSChanwoo Choi if (ret < 0) { 602f262f28cSChanwoo Choi dev_err(dev, "failed to parse exynos ppmu dt node\n"); 6032a3ea647SChanwoo Choi return ret; 604f262f28cSChanwoo Choi } 605f262f28cSChanwoo Choi 606f262f28cSChanwoo Choi return 0; 607f262f28cSChanwoo Choi } 608f262f28cSChanwoo Choi 609f262f28cSChanwoo Choi static int exynos_ppmu_probe(struct platform_device *pdev) 610f262f28cSChanwoo Choi { 611f262f28cSChanwoo Choi struct exynos_ppmu *info; 612f262f28cSChanwoo Choi struct devfreq_event_dev **edev; 613f262f28cSChanwoo Choi struct devfreq_event_desc *desc; 614f262f28cSChanwoo Choi int i, ret = 0, size; 615f262f28cSChanwoo Choi 616f262f28cSChanwoo Choi info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); 617f262f28cSChanwoo Choi if (!info) 618f262f28cSChanwoo Choi return -ENOMEM; 619f262f28cSChanwoo Choi 620f262f28cSChanwoo Choi info->dev = &pdev->dev; 621f262f28cSChanwoo Choi 622f262f28cSChanwoo Choi /* Parse dt data to get resource */ 6232a3ea647SChanwoo Choi ret = exynos_ppmu_parse_dt(pdev, info); 624f262f28cSChanwoo Choi if (ret < 0) { 625f262f28cSChanwoo Choi dev_err(&pdev->dev, 626f262f28cSChanwoo Choi "failed to parse devicetree for resource\n"); 627f262f28cSChanwoo Choi return ret; 628f262f28cSChanwoo Choi } 629f262f28cSChanwoo Choi desc = info->desc; 630f262f28cSChanwoo Choi 631f262f28cSChanwoo Choi size = sizeof(struct devfreq_event_dev *) * info->num_events; 632f262f28cSChanwoo Choi info->edev = devm_kzalloc(&pdev->dev, size, GFP_KERNEL); 63312ba2c65SMarkus Elfring if (!info->edev) 6342a3ea647SChanwoo Choi return -ENOMEM; 63512ba2c65SMarkus Elfring 636f262f28cSChanwoo Choi edev = info->edev; 637f262f28cSChanwoo Choi platform_set_drvdata(pdev, info); 638f262f28cSChanwoo Choi 639f262f28cSChanwoo Choi for (i = 0; i < info->num_events; i++) { 640f262f28cSChanwoo Choi edev[i] = devm_devfreq_event_add_edev(&pdev->dev, &desc[i]); 64104a695edSDan Carpenter if (IS_ERR(edev[i])) { 64204a695edSDan Carpenter ret = PTR_ERR(edev[i]); 643f262f28cSChanwoo Choi dev_err(&pdev->dev, 644f262f28cSChanwoo Choi "failed to add devfreq-event device\n"); 6452a3ea647SChanwoo Choi return PTR_ERR(edev[i]); 646f262f28cSChanwoo Choi } 647b0d75c08SChanwoo Choi 648b0d75c08SChanwoo Choi pr_info("exynos-ppmu: new PPMU device registered %s (%s)\n", 649b0d75c08SChanwoo Choi dev_name(&pdev->dev), desc[i].name); 650f262f28cSChanwoo Choi } 651f262f28cSChanwoo Choi 65297a6ba5bSArvind Yadav ret = clk_prepare_enable(info->ppmu.clk); 65397a6ba5bSArvind Yadav if (ret) { 65497a6ba5bSArvind Yadav dev_err(&pdev->dev, "failed to prepare ppmu clock\n"); 65597a6ba5bSArvind Yadav return ret; 65697a6ba5bSArvind Yadav } 657f262f28cSChanwoo Choi 658f262f28cSChanwoo Choi return 0; 659f262f28cSChanwoo Choi } 660f262f28cSChanwoo Choi 661f262f28cSChanwoo Choi static int exynos_ppmu_remove(struct platform_device *pdev) 662f262f28cSChanwoo Choi { 663f262f28cSChanwoo Choi struct exynos_ppmu *info = platform_get_drvdata(pdev); 664f262f28cSChanwoo Choi 665f262f28cSChanwoo Choi clk_disable_unprepare(info->ppmu.clk); 666f262f28cSChanwoo Choi 667f262f28cSChanwoo Choi return 0; 668f262f28cSChanwoo Choi } 669f262f28cSChanwoo Choi 670f262f28cSChanwoo Choi static struct platform_driver exynos_ppmu_driver = { 671f262f28cSChanwoo Choi .probe = exynos_ppmu_probe, 672f262f28cSChanwoo Choi .remove = exynos_ppmu_remove, 673f262f28cSChanwoo Choi .driver = { 674f262f28cSChanwoo Choi .name = "exynos-ppmu", 675f262f28cSChanwoo Choi .of_match_table = exynos_ppmu_id_match, 676f262f28cSChanwoo Choi }, 677f262f28cSChanwoo Choi }; 678f262f28cSChanwoo Choi module_platform_driver(exynos_ppmu_driver); 679f262f28cSChanwoo Choi 680f262f28cSChanwoo Choi MODULE_DESCRIPTION("Exynos PPMU(Platform Performance Monitoring Unit) driver"); 681f262f28cSChanwoo Choi MODULE_AUTHOR("Chanwoo Choi <cw00.choi@samsung.com>"); 682f262f28cSChanwoo Choi MODULE_LICENSE("GPL"); 683