xref: /openbmc/linux/drivers/devfreq/Kconfig (revision 84b102f5)
1# SPDX-License-Identifier: GPL-2.0-only
2menuconfig PM_DEVFREQ
3	bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support"
4	select SRCU
5	select PM_OPP
6	help
7	  A device may have a list of frequencies and voltages available.
8	  devfreq, a generic DVFS framework can be registered for a device
9	  in order to let the governor provided to devfreq choose an
10	  operating frequency based on the device driver's policy.
11
12	  Each device may have its own governor and policy. Devfreq can
13	  reevaluate the device state periodically and/or based on the
14	  notification to "nb", a notifier block, of devfreq.
15
16	  Like some CPUs with CPUfreq, a device may have multiple clocks.
17	  However, because the clock frequencies of a single device are
18	  determined by the single device's state, an instance of devfreq
19	  is attached to a single device and returns a "representative"
20	  clock frequency of the device, which is also attached
21	  to a device by 1-to-1. The device registering devfreq takes the
22	  responsibility to "interpret" the representative frequency and
23	  to set its every clock accordingly with the "target" callback
24	  given to devfreq.
25
26	  When OPP is used with the devfreq device, it is recommended to
27	  register devfreq's nb to the OPP's notifier head.  If OPP is
28	  used with the devfreq device, you may use OPP helper
29	  functions defined in devfreq.h.
30
31if PM_DEVFREQ
32
33comment "DEVFREQ Governors"
34
35config DEVFREQ_GOV_SIMPLE_ONDEMAND
36	tristate "Simple Ondemand"
37	help
38	  Chooses frequency based on the recent load on the device. Works
39	  similar as ONDEMAND governor of CPUFREQ does. A device with
40	  Simple-Ondemand should be able to provide busy/total counter
41	  values that imply the usage rate. A device may provide tuned
42	  values to the governor with data field at devfreq_add_device().
43
44config DEVFREQ_GOV_PERFORMANCE
45	tristate "Performance"
46	help
47	  Sets the frequency at the maximum available frequency.
48	  This governor always returns UINT_MAX as frequency so that
49	  the DEVFREQ framework returns the highest frequency available
50	  at any time.
51
52config DEVFREQ_GOV_POWERSAVE
53	tristate "Powersave"
54	help
55	  Sets the frequency at the minimum available frequency.
56	  This governor always returns 0 as frequency so that
57	  the DEVFREQ framework returns the lowest frequency available
58	  at any time.
59
60config DEVFREQ_GOV_USERSPACE
61	tristate "Userspace"
62	help
63	  Sets the frequency at the user specified one.
64	  This governor returns the user configured frequency if there
65	  has been an input to /sys/devices/.../power/devfreq_set_freq.
66	  Otherwise, the governor does not change the frequency
67	  given at the initialization.
68
69config DEVFREQ_GOV_PASSIVE
70	tristate "Passive"
71	help
72	  Sets the frequency based on the frequency of its parent devfreq
73	  device. This governor does not change the frequency by itself
74	  through sysfs entries. The passive governor recommends that
75	  devfreq device uses the OPP table to get the frequency/voltage.
76
77comment "DEVFREQ Drivers"
78
79config ARM_EXYNOS_BUS_DEVFREQ
80	tristate "ARM Exynos Generic Memory Bus DEVFREQ Driver"
81	depends on ARCH_EXYNOS || COMPILE_TEST
82	select DEVFREQ_GOV_SIMPLE_ONDEMAND
83	select DEVFREQ_GOV_PASSIVE
84	select DEVFREQ_EVENT_EXYNOS_PPMU
85	select PM_DEVFREQ_EVENT
86	help
87	  This adds the common DEVFREQ driver for Exynos Memory bus. Exynos
88	  Memory bus has one more group of memory bus (e.g, MIF and INT block).
89	  Each memory bus group could contain many memoby bus block. It reads
90	  PPMU counters of memory controllers by using DEVFREQ-event device
91	  and adjusts the operating frequencies and voltages with OPP support.
92	  This does not yet operate with optimal voltages.
93
94config ARM_IMX_BUS_DEVFREQ
95	tristate "i.MX Generic Bus DEVFREQ Driver"
96	depends on ARCH_MXC || COMPILE_TEST
97	select DEVFREQ_GOV_USERSPACE
98	help
99	  This adds the generic DEVFREQ driver for i.MX interconnects. It
100	  allows adjusting NIC/NOC frequency.
101
102config ARM_IMX8M_DDRC_DEVFREQ
103	tristate "i.MX8M DDRC DEVFREQ Driver"
104	depends on (ARCH_MXC && HAVE_ARM_SMCCC) || \
105		(COMPILE_TEST && HAVE_ARM_SMCCC)
106	select DEVFREQ_GOV_SIMPLE_ONDEMAND
107	select DEVFREQ_GOV_USERSPACE
108	help
109	  This adds the DEVFREQ driver for the i.MX8M DDR Controller. It allows
110	  adjusting DRAM frequency.
111
112config ARM_TEGRA_DEVFREQ
113	tristate "NVIDIA Tegra30/114/124/210 DEVFREQ Driver"
114	depends on ARCH_TEGRA_3x_SOC || ARCH_TEGRA_114_SOC || \
115		ARCH_TEGRA_132_SOC || ARCH_TEGRA_124_SOC || \
116		ARCH_TEGRA_210_SOC || \
117		COMPILE_TEST
118	depends on COMMON_CLK
119	help
120	  This adds the DEVFREQ driver for the Tegra family of SoCs.
121	  It reads ACTMON counters of memory controllers and adjusts the
122	  operating frequencies and voltages with OPP support.
123
124config ARM_RK3399_DMC_DEVFREQ
125	tristate "ARM RK3399 DMC DEVFREQ Driver"
126	depends on (ARCH_ROCKCHIP && HAVE_ARM_SMCCC) || \
127		(COMPILE_TEST && HAVE_ARM_SMCCC)
128	select DEVFREQ_EVENT_ROCKCHIP_DFI
129	select DEVFREQ_GOV_SIMPLE_ONDEMAND
130	select PM_DEVFREQ_EVENT
131	help
132	  This adds the DEVFREQ driver for the RK3399 DMC(Dynamic Memory Controller).
133	  It sets the frequency for the memory controller and reads the usage counts
134	  from hardware.
135
136source "drivers/devfreq/event/Kconfig"
137
138endif # PM_DEVFREQ
139