1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright(c) 2022 Intel Corporation. All rights reserved. */ 3 #include <linux/device.h> 4 #include <linux/module.h> 5 #include <linux/pci.h> 6 7 #include "cxlmem.h" 8 #include "cxlpci.h" 9 10 /** 11 * DOC: cxl mem 12 * 13 * CXL memory endpoint devices and switches are CXL capable devices that are 14 * participating in CXL.mem protocol. Their functionality builds on top of the 15 * CXL.io protocol that allows enumerating and configuring components via 16 * standard PCI mechanisms. 17 * 18 * The cxl_mem driver owns kicking off the enumeration of this CXL.mem 19 * capability. With the detection of a CXL capable endpoint, the driver will 20 * walk up to find the platform specific port it is connected to, and determine 21 * if there are intervening switches in the path. If there are switches, a 22 * secondary action is to enumerate those (implemented in cxl_core). Finally the 23 * cxl_mem driver adds the device it is bound to as a CXL endpoint-port for use 24 * in higher level operations. 25 */ 26 27 static int create_endpoint(struct cxl_memdev *cxlmd, 28 struct cxl_port *parent_port) 29 { 30 struct cxl_dev_state *cxlds = cxlmd->cxlds; 31 struct cxl_port *endpoint; 32 33 endpoint = devm_cxl_add_port(&parent_port->dev, &cxlmd->dev, 34 cxlds->component_reg_phys, parent_port); 35 if (IS_ERR(endpoint)) 36 return PTR_ERR(endpoint); 37 38 dev_dbg(&cxlmd->dev, "add: %s\n", dev_name(&endpoint->dev)); 39 40 if (!endpoint->dev.driver) { 41 dev_err(&cxlmd->dev, "%s failed probe\n", 42 dev_name(&endpoint->dev)); 43 return -ENXIO; 44 } 45 46 return cxl_endpoint_autoremove(cxlmd, endpoint); 47 } 48 49 static void enable_suspend(void *data) 50 { 51 cxl_mem_active_dec(); 52 } 53 54 static int cxl_mem_probe(struct device *dev) 55 { 56 struct cxl_memdev *cxlmd = to_cxl_memdev(dev); 57 struct cxl_port *parent_port; 58 int rc; 59 60 /* 61 * Someone is trying to reattach this device after it lost its port 62 * connection (an endpoint port previously registered by this memdev was 63 * disabled). This racy check is ok because if the port is still gone, 64 * no harm done, and if the port hierarchy comes back it will re-trigger 65 * this probe. Port rescan and memdev detach work share the same 66 * single-threaded workqueue. 67 */ 68 if (work_pending(&cxlmd->detach_work)) 69 return -EBUSY; 70 71 rc = devm_cxl_enumerate_ports(cxlmd); 72 if (rc) 73 return rc; 74 75 parent_port = cxl_mem_find_port(cxlmd); 76 if (!parent_port) { 77 dev_err(dev, "CXL port topology not found\n"); 78 return -ENXIO; 79 } 80 81 device_lock(&parent_port->dev); 82 if (!parent_port->dev.driver) { 83 dev_err(dev, "CXL port topology %s not enabled\n", 84 dev_name(&parent_port->dev)); 85 rc = -ENXIO; 86 goto unlock; 87 } 88 89 rc = create_endpoint(cxlmd, parent_port); 90 unlock: 91 device_unlock(&parent_port->dev); 92 put_device(&parent_port->dev); 93 if (rc) 94 return rc; 95 96 /* 97 * The kernel may be operating out of CXL memory on this device, 98 * there is no spec defined way to determine whether this device 99 * preserves contents over suspend, and there is no simple way 100 * to arrange for the suspend image to avoid CXL memory which 101 * would setup a circular dependency between PCI resume and save 102 * state restoration. 103 * 104 * TODO: support suspend when all the regions this device is 105 * hosting are locked and covered by the system address map, 106 * i.e. platform firmware owns restoring the HDM configuration 107 * that it locked. 108 */ 109 cxl_mem_active_inc(); 110 return devm_add_action_or_reset(dev, enable_suspend, NULL); 111 } 112 113 static struct cxl_driver cxl_mem_driver = { 114 .name = "cxl_mem", 115 .probe = cxl_mem_probe, 116 .id = CXL_DEVICE_MEMORY_EXPANDER, 117 }; 118 119 module_cxl_driver(cxl_mem_driver); 120 121 MODULE_LICENSE("GPL v2"); 122 MODULE_IMPORT_NS(CXL); 123 MODULE_ALIAS_CXL(CXL_DEVICE_MEMORY_EXPANDER); 124 /* 125 * create_endpoint() wants to validate port driver attach immediately after 126 * endpoint registration. 127 */ 128 MODULE_SOFTDEP("pre: cxl_port"); 129