1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Copyright(c) 2020 Intel Corporation. */ 3 4 #ifndef __CXL_CORE_H__ 5 #define __CXL_CORE_H__ 6 7 extern const struct device_type cxl_nvdimm_bridge_type; 8 extern const struct device_type cxl_nvdimm_type; 9 extern const struct device_type cxl_pmu_type; 10 11 extern struct attribute_group cxl_base_attribute_group; 12 13 #ifdef CONFIG_CXL_REGION 14 extern struct device_attribute dev_attr_create_pmem_region; 15 extern struct device_attribute dev_attr_create_ram_region; 16 extern struct device_attribute dev_attr_delete_region; 17 extern struct device_attribute dev_attr_region; 18 extern const struct device_type cxl_pmem_region_type; 19 extern const struct device_type cxl_dax_region_type; 20 extern const struct device_type cxl_region_type; 21 void cxl_decoder_kill_region(struct cxl_endpoint_decoder *cxled); 22 #define CXL_REGION_ATTR(x) (&dev_attr_##x.attr) 23 #define CXL_REGION_TYPE(x) (&cxl_region_type) 24 #define SET_CXL_REGION_ATTR(x) (&dev_attr_##x.attr), 25 #define CXL_PMEM_REGION_TYPE(x) (&cxl_pmem_region_type) 26 #define CXL_DAX_REGION_TYPE(x) (&cxl_dax_region_type) 27 int cxl_region_init(void); 28 void cxl_region_exit(void); 29 int cxl_get_poison_by_endpoint(struct cxl_port *port); 30 struct cxl_region *cxl_dpa_to_region(const struct cxl_memdev *cxlmd, u64 dpa); 31 32 #else 33 static inline 34 struct cxl_region *cxl_dpa_to_region(const struct cxl_memdev *cxlmd, u64 dpa) 35 { 36 return NULL; 37 } 38 static inline int cxl_get_poison_by_endpoint(struct cxl_port *port) 39 { 40 return 0; 41 } 42 static inline void cxl_decoder_kill_region(struct cxl_endpoint_decoder *cxled) 43 { 44 } 45 static inline int cxl_region_init(void) 46 { 47 return 0; 48 } 49 static inline void cxl_region_exit(void) 50 { 51 } 52 #define CXL_REGION_ATTR(x) NULL 53 #define CXL_REGION_TYPE(x) NULL 54 #define SET_CXL_REGION_ATTR(x) 55 #define CXL_PMEM_REGION_TYPE(x) NULL 56 #define CXL_DAX_REGION_TYPE(x) NULL 57 #endif 58 59 struct cxl_send_command; 60 struct cxl_mem_query_commands; 61 int cxl_query_cmd(struct cxl_memdev *cxlmd, 62 struct cxl_mem_query_commands __user *q); 63 int cxl_send_cmd(struct cxl_memdev *cxlmd, struct cxl_send_command __user *s); 64 void __iomem *devm_cxl_iomap_block(struct device *dev, resource_size_t addr, 65 resource_size_t length); 66 67 struct dentry *cxl_debugfs_create_dir(const char *dir); 68 int cxl_dpa_set_mode(struct cxl_endpoint_decoder *cxled, 69 enum cxl_decoder_mode mode); 70 int cxl_dpa_alloc(struct cxl_endpoint_decoder *cxled, unsigned long long size); 71 int cxl_dpa_free(struct cxl_endpoint_decoder *cxled); 72 resource_size_t cxl_dpa_size(struct cxl_endpoint_decoder *cxled); 73 resource_size_t cxl_dpa_resource_start(struct cxl_endpoint_decoder *cxled); 74 75 enum cxl_rcrb { 76 CXL_RCRB_DOWNSTREAM, 77 CXL_RCRB_UPSTREAM, 78 }; 79 struct cxl_rcrb_info; 80 resource_size_t __rcrb_to_component(struct device *dev, 81 struct cxl_rcrb_info *ri, 82 enum cxl_rcrb which); 83 84 extern struct rw_semaphore cxl_dpa_rwsem; 85 extern struct rw_semaphore cxl_region_rwsem; 86 87 int cxl_memdev_init(void); 88 void cxl_memdev_exit(void); 89 void cxl_mbox_init(void); 90 91 enum cxl_poison_trace_type { 92 CXL_POISON_TRACE_LIST, 93 CXL_POISON_TRACE_INJECT, 94 CXL_POISON_TRACE_CLEAR, 95 }; 96 97 #endif /* __CXL_CORE_H__ */ 98