1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * K3 SA2UL crypto accelerator driver 4 * 5 * Copyright (C) 2018-2020 Texas Instruments Incorporated - http://www.ti.com 6 * 7 * Authors: Keerthy 8 * Vitaly Andrianov 9 * Tero Kristo 10 */ 11 12 #ifndef _K3_SA2UL_ 13 #define _K3_SA2UL_ 14 15 #include <linux/interrupt.h> 16 #include <linux/skbuff.h> 17 #include <linux/hw_random.h> 18 #include <crypto/aes.h> 19 20 #define SA_ENGINE_ENABLE_CONTROL 0x1000 21 22 struct sa_tfm_ctx; 23 /* 24 * SA_ENGINE_ENABLE_CONTROL register bits 25 */ 26 #define SA_EEC_ENCSS_EN 0x00000001 27 #define SA_EEC_AUTHSS_EN 0x00000002 28 #define SA_EEC_TRNG_EN 0x00000008 29 #define SA_EEC_PKA_EN 0x00000010 30 #define SA_EEC_CTXCACH_EN 0x00000080 31 #define SA_EEC_CPPI_PORT_IN_EN 0x00000200 32 #define SA_EEC_CPPI_PORT_OUT_EN 0x00000800 33 34 /* 35 * Encoding used to identify the typo of crypto operation 36 * performed on the packet when the packet is returned 37 * by SA 38 */ 39 #define SA_REQ_SUBTYPE_ENC 0x0001 40 #define SA_REQ_SUBTYPE_DEC 0x0002 41 #define SA_REQ_SUBTYPE_SHIFT 16 42 #define SA_REQ_SUBTYPE_MASK 0xffff 43 44 /* Number of 32 bit words in EPIB */ 45 #define SA_DMA_NUM_EPIB_WORDS 4 46 47 /* Number of 32 bit words in PS data */ 48 #define SA_DMA_NUM_PS_WORDS 16 49 #define NKEY_SZ 3 50 #define MCI_SZ 27 51 52 /* 53 * Maximum number of simultaeneous security contexts 54 * supported by the driver 55 */ 56 #define SA_MAX_NUM_CTX 512 57 58 /* 59 * Assumption: CTX size is multiple of 32 60 */ 61 #define SA_CTX_SIZE_TO_DMA_SIZE(ctx_sz) \ 62 ((ctx_sz) ? ((ctx_sz) / 32 - 1) : 0) 63 64 #define SA_CTX_ENC_KEY_OFFSET 32 65 #define SA_CTX_ENC_AUX1_OFFSET 64 66 #define SA_CTX_ENC_AUX2_OFFSET 96 67 #define SA_CTX_ENC_AUX3_OFFSET 112 68 #define SA_CTX_ENC_AUX4_OFFSET 128 69 70 /* Next Engine Select code in CP_ACE */ 71 #define SA_ENG_ID_EM1 2 /* Enc/Dec engine with AES/DEC core */ 72 #define SA_ENG_ID_EM2 3 /* Encryption/Decryption enginefor pass 2 */ 73 #define SA_ENG_ID_AM1 4 /* Auth. engine with SHA1/MD5/SHA2 core */ 74 #define SA_ENG_ID_AM2 5 /* Authentication engine for pass 2 */ 75 #define SA_ENG_ID_OUTPORT2 20 /* Egress module 2 */ 76 #define SA_ENG_ID_NONE 0xff 77 78 /* 79 * Command Label Definitions 80 */ 81 #define SA_CMDL_OFFSET_NESC 0 /* Next Engine Select Code */ 82 #define SA_CMDL_OFFSET_LABEL_LEN 1 /* Engine Command Label Length */ 83 /* 16-bit Length of Data to be processed */ 84 #define SA_CMDL_OFFSET_DATA_LEN 2 85 #define SA_CMDL_OFFSET_DATA_OFFSET 4 /* Stat Data Offset */ 86 #define SA_CMDL_OFFSET_OPTION_CTRL1 5 /* Option Control Byte 1 */ 87 #define SA_CMDL_OFFSET_OPTION_CTRL2 6 /* Option Control Byte 2 */ 88 #define SA_CMDL_OFFSET_OPTION_CTRL3 7 /* Option Control Byte 3 */ 89 #define SA_CMDL_OFFSET_OPTION_BYTE 8 90 91 #define SA_CMDL_HEADER_SIZE_BYTES 8 92 93 #define SA_CMDL_OPTION_BYTES_MAX_SIZE 72 94 #define SA_CMDL_MAX_SIZE_BYTES (SA_CMDL_HEADER_SIZE_BYTES + \ 95 SA_CMDL_OPTION_BYTES_MAX_SIZE) 96 97 /* SWINFO word-0 flags */ 98 #define SA_SW_INFO_FLAG_EVICT 0x0001 99 #define SA_SW_INFO_FLAG_TEAR 0x0002 100 #define SA_SW_INFO_FLAG_NOPD 0x0004 101 102 /* 103 * This type represents the various packet types to be processed 104 * by the PHP engine in SA. 105 * It is used to identify the corresponding PHP processing function. 106 */ 107 #define SA_CTX_PE_PKT_TYPE_3GPP_AIR 0 /* 3GPP Air Cipher */ 108 #define SA_CTX_PE_PKT_TYPE_SRTP 1 /* SRTP */ 109 #define SA_CTX_PE_PKT_TYPE_IPSEC_AH 2 /* IPSec Authentication Header */ 110 /* IPSec Encapsulating Security Payload */ 111 #define SA_CTX_PE_PKT_TYPE_IPSEC_ESP 3 112 /* Indicates that it is in data mode, It may not be used by PHP */ 113 #define SA_CTX_PE_PKT_TYPE_NONE 4 114 #define SA_CTX_ENC_TYPE1_SZ 64 /* Encryption SC with Key only */ 115 #define SA_CTX_ENC_TYPE2_SZ 96 /* Encryption SC with Key and Aux1 */ 116 117 #define SA_CTX_AUTH_TYPE1_SZ 64 /* Auth SC with Key only */ 118 #define SA_CTX_AUTH_TYPE2_SZ 96 /* Auth SC with Key and Aux1 */ 119 /* Size of security context for PHP engine */ 120 #define SA_CTX_PHP_PE_CTX_SZ 64 121 122 #define SA_CTX_MAX_SZ (64 + SA_CTX_ENC_TYPE2_SZ + SA_CTX_AUTH_TYPE2_SZ) 123 124 /* 125 * Encoding of F/E control in SCCTL 126 * Bit 0-1: Fetch PHP Bytes 127 * Bit 2-3: Fetch Encryption/Air Ciphering Bytes 128 * Bit 4-5: Fetch Authentication Bytes or Encr pass 2 129 * Bit 6-7: Evict PHP Bytes 130 * 131 * where 00 = 0 bytes 132 * 01 = 64 bytes 133 * 10 = 96 bytes 134 * 11 = 128 bytes 135 */ 136 #define SA_CTX_DMA_SIZE_0 0 137 #define SA_CTX_DMA_SIZE_64 1 138 #define SA_CTX_DMA_SIZE_96 2 139 #define SA_CTX_DMA_SIZE_128 3 140 141 /* 142 * Byte offset of the owner word in SCCTL 143 * in the security context 144 */ 145 #define SA_CTX_SCCTL_OWNER_OFFSET 0 146 147 #define SA_CTX_ENC_KEY_OFFSET 32 148 #define SA_CTX_ENC_AUX1_OFFSET 64 149 #define SA_CTX_ENC_AUX2_OFFSET 96 150 #define SA_CTX_ENC_AUX3_OFFSET 112 151 #define SA_CTX_ENC_AUX4_OFFSET 128 152 153 #define SA_SCCTL_FE_AUTH_ENC 0x65 154 #define SA_SCCTL_FE_ENC 0x8D 155 156 #define SA_ALIGN_MASK (sizeof(u32) - 1) 157 #define SA_ALIGNED __aligned(32) 158 159 /* SA2UL can only handle maximum data size of 64KB */ 160 #define SA_MAX_DATA_SZ U16_MAX 161 162 /* 163 * SA2UL can provide unpredictable results with packet sizes that fall 164 * the following range, so avoid using it. 165 */ 166 #define SA_UNSAFE_DATA_SZ_MIN 240 167 #define SA_UNSAFE_DATA_SZ_MAX 256 168 169 /** 170 * struct sa_crypto_data - Crypto driver instance data 171 * @base: Base address of the register space 172 * @pdev: Platform device pointer 173 * @sc_pool: security context pool 174 * @dev: Device pointer 175 * @scid_lock: secure context ID lock 176 * @sc_id_start: starting index for SC ID 177 * @sc_id_end: Ending index for SC ID 178 * @sc_id: Security Context ID 179 * @ctx_bm: Bitmap to keep track of Security context ID's 180 * @ctx: SA tfm context pointer 181 * @dma_rx1: Pointer to DMA rx channel for sizes < 256 Bytes 182 * @dma_rx2: Pointer to DMA rx channel for sizes > 256 Bytes 183 * @dma_tx: Pointer to DMA TX channel 184 */ 185 struct sa_crypto_data { 186 void __iomem *base; 187 struct platform_device *pdev; 188 struct dma_pool *sc_pool; 189 struct device *dev; 190 spinlock_t scid_lock; /* lock for SC-ID allocation */ 191 /* Security context data */ 192 u16 sc_id_start; 193 u16 sc_id_end; 194 u16 sc_id; 195 unsigned long ctx_bm[DIV_ROUND_UP(SA_MAX_NUM_CTX, 196 BITS_PER_LONG)]; 197 struct sa_tfm_ctx *ctx; 198 struct dma_chan *dma_rx1; 199 struct dma_chan *dma_rx2; 200 struct dma_chan *dma_tx; 201 }; 202 203 /** 204 * struct sa_cmdl_param_info: Command label parameters info 205 * @index: Index of the parameter in the command label format 206 * @offset: the offset of the parameter 207 * @size: Size of the parameter 208 */ 209 struct sa_cmdl_param_info { 210 u16 index; 211 u16 offset; 212 u16 size; 213 }; 214 215 /* Maximum length of Auxiliary data in 32bit words */ 216 #define SA_MAX_AUX_DATA_WORDS 8 217 218 /** 219 * struct sa_cmdl_upd_info: Command label updation info 220 * @flags: flags in command label 221 * @submode: Encryption submodes 222 * @enc_size: Size of first pass encryption size 223 * @enc_size2: Size of second pass encryption size 224 * @enc_offset: Encryption payload offset in the packet 225 * @enc_iv: Encryption initialization vector for pass2 226 * @enc_iv2: Encryption initialization vector for pass2 227 * @aad: Associated data 228 * @payload: Payload info 229 * @auth_size: Authentication size for pass 1 230 * @auth_size2: Authentication size for pass 2 231 * @auth_offset: Authentication payload offset 232 * @auth_iv: Authentication initialization vector 233 * @aux_key_info: Authentication aux key information 234 * @aux_key: Aux key for authentication 235 */ 236 struct sa_cmdl_upd_info { 237 u16 flags; 238 u16 submode; 239 struct sa_cmdl_param_info enc_size; 240 struct sa_cmdl_param_info enc_size2; 241 struct sa_cmdl_param_info enc_offset; 242 struct sa_cmdl_param_info enc_iv; 243 struct sa_cmdl_param_info enc_iv2; 244 struct sa_cmdl_param_info aad; 245 struct sa_cmdl_param_info payload; 246 struct sa_cmdl_param_info auth_size; 247 struct sa_cmdl_param_info auth_size2; 248 struct sa_cmdl_param_info auth_offset; 249 struct sa_cmdl_param_info auth_iv; 250 struct sa_cmdl_param_info aux_key_info; 251 u32 aux_key[SA_MAX_AUX_DATA_WORDS]; 252 }; 253 254 /* 255 * Number of 32bit words appended after the command label 256 * in PSDATA to identify the crypto request context. 257 * word-0: Request type 258 * word-1: pointer to request 259 */ 260 #define SA_PSDATA_CTX_WORDS 4 261 262 /* Maximum size of Command label in 32 words */ 263 #define SA_MAX_CMDL_WORDS (SA_DMA_NUM_PS_WORDS - SA_PSDATA_CTX_WORDS) 264 265 /** 266 * struct sa_ctx_info: SA context information 267 * @sc: Pointer to security context 268 * @sc_phys: Security context physical address that is passed on to SA2UL 269 * @sc_id: Security context ID 270 * @cmdl_size: Command label size 271 * @cmdl: Command label for a particular iteration 272 * @cmdl_upd_info: structure holding command label updation info 273 * @epib: Extended protocol information block words 274 */ 275 struct sa_ctx_info { 276 u8 *sc; 277 dma_addr_t sc_phys; 278 u16 sc_id; 279 u16 cmdl_size; 280 u32 cmdl[SA_MAX_CMDL_WORDS]; 281 struct sa_cmdl_upd_info cmdl_upd_info; 282 /* Store Auxiliary data such as K2/K3 subkeys in AES-XCBC */ 283 u32 epib[SA_DMA_NUM_EPIB_WORDS]; 284 }; 285 286 /** 287 * struct sa_tfm_ctx: TFM context structure 288 * @dev_data: struct sa_crypto_data pointer 289 * @enc: struct sa_ctx_info for encryption 290 * @dec: struct sa_ctx_info for decryption 291 * @keylen: encrption/decryption keylength 292 * @iv_idx: Initialization vector index 293 * @key: encryption key 294 * @fallback: SW fallback algorithm 295 */ 296 struct sa_tfm_ctx { 297 struct sa_crypto_data *dev_data; 298 struct sa_ctx_info enc; 299 struct sa_ctx_info dec; 300 int keylen; 301 int iv_idx; 302 u32 key[AES_KEYSIZE_256 / sizeof(u32)]; 303 /* for fallback */ 304 union { 305 struct crypto_sync_skcipher *skcipher; 306 } fallback; 307 }; 308 309 enum sa_submode { 310 SA_MODE_GEN = 0, 311 SA_MODE_CCM, 312 SA_MODE_GCM, 313 SA_MODE_GMAC 314 }; 315 316 /* Encryption algorithms */ 317 enum sa_ealg_id { 318 SA_EALG_ID_NONE = 0, /* No encryption */ 319 SA_EALG_ID_NULL, /* NULL encryption */ 320 SA_EALG_ID_AES_CTR, /* AES Counter mode */ 321 SA_EALG_ID_AES_F8, /* AES F8 mode */ 322 SA_EALG_ID_AES_CBC, /* AES CBC mode */ 323 SA_EALG_ID_DES_CBC, /* DES CBC mode */ 324 SA_EALG_ID_3DES_CBC, /* 3DES CBC mode */ 325 SA_EALG_ID_CCM, /* Counter with CBC-MAC mode */ 326 SA_EALG_ID_GCM, /* Galois Counter mode */ 327 SA_EALG_ID_AES_ECB, 328 SA_EALG_ID_LAST 329 }; 330 331 /* Authentication algorithms */ 332 enum sa_aalg_id { 333 SA_AALG_ID_NONE = 0, /* No Authentication */ 334 SA_AALG_ID_NULL = SA_EALG_ID_LAST, /* NULL Authentication */ 335 SA_AALG_ID_MD5, /* MD5 mode */ 336 SA_AALG_ID_SHA1, /* SHA1 mode */ 337 SA_AALG_ID_SHA2_224, /* 224-bit SHA2 mode */ 338 SA_AALG_ID_SHA2_256, /* 256-bit SHA2 mode */ 339 SA_AALG_ID_SHA2_512, /* 512-bit SHA2 mode */ 340 SA_AALG_ID_HMAC_MD5, /* HMAC with MD5 mode */ 341 SA_AALG_ID_HMAC_SHA1, /* HMAC with SHA1 mode */ 342 SA_AALG_ID_HMAC_SHA2_224, /* HMAC with 224-bit SHA2 mode */ 343 SA_AALG_ID_HMAC_SHA2_256, /* HMAC with 256-bit SHA2 mode */ 344 SA_AALG_ID_GMAC, /* Galois Message Auth. Code mode */ 345 SA_AALG_ID_CMAC, /* Cipher-based Mes. Auth. Code mode */ 346 SA_AALG_ID_CBC_MAC, /* Cipher Block Chaining */ 347 SA_AALG_ID_AES_XCBC /* AES Extended Cipher Block Chaining */ 348 }; 349 350 /* 351 * Mode control engine algorithms used to index the 352 * mode control instruction tables 353 */ 354 enum sa_eng_algo_id { 355 SA_ENG_ALGO_ECB = 0, 356 SA_ENG_ALGO_CBC, 357 SA_ENG_ALGO_CFB, 358 SA_ENG_ALGO_OFB, 359 SA_ENG_ALGO_CTR, 360 SA_ENG_ALGO_F8, 361 SA_ENG_ALGO_F8F9, 362 SA_ENG_ALGO_GCM, 363 SA_ENG_ALGO_GMAC, 364 SA_ENG_ALGO_CCM, 365 SA_ENG_ALGO_CMAC, 366 SA_ENG_ALGO_CBCMAC, 367 SA_NUM_ENG_ALGOS 368 }; 369 370 /** 371 * struct sa_eng_info: Security accelerator engine info 372 * @eng_id: Engine ID 373 * @sc_size: security context size 374 */ 375 struct sa_eng_info { 376 u8 eng_id; 377 u16 sc_size; 378 }; 379 380 #endif /* _K3_SA2UL_ */ 381