1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (c) 2017-18 Linaro Limited 3 // 4 // Based on msm-rng.c and downstream driver 5 6 #include <crypto/internal/rng.h> 7 #include <linux/acpi.h> 8 #include <linux/clk.h> 9 #include <linux/crypto.h> 10 #include <linux/io.h> 11 #include <linux/iopoll.h> 12 #include <linux/module.h> 13 #include <linux/of.h> 14 #include <linux/platform_device.h> 15 16 /* Device specific register offsets */ 17 #define PRNG_DATA_OUT 0x0000 18 #define PRNG_STATUS 0x0004 19 #define PRNG_LFSR_CFG 0x0100 20 #define PRNG_CONFIG 0x0104 21 22 /* Device specific register masks and config values */ 23 #define PRNG_LFSR_CFG_MASK 0x0000ffff 24 #define PRNG_LFSR_CFG_CLOCKS 0x0000dddd 25 #define PRNG_CONFIG_HW_ENABLE BIT(1) 26 #define PRNG_STATUS_DATA_AVAIL BIT(0) 27 28 #define WORD_SZ 4 29 30 struct qcom_rng { 31 struct mutex lock; 32 void __iomem *base; 33 struct clk *clk; 34 unsigned int skip_init; 35 }; 36 37 struct qcom_rng_ctx { 38 struct qcom_rng *rng; 39 }; 40 41 static struct qcom_rng *qcom_rng_dev; 42 43 static int qcom_rng_read(struct qcom_rng *rng, u8 *data, unsigned int max) 44 { 45 unsigned int currsize = 0; 46 u32 val; 47 int ret; 48 49 /* read random data from hardware */ 50 do { 51 ret = readl_poll_timeout(rng->base + PRNG_STATUS, val, 52 val & PRNG_STATUS_DATA_AVAIL, 53 200, 10000); 54 if (ret) 55 return ret; 56 57 val = readl_relaxed(rng->base + PRNG_DATA_OUT); 58 if (!val) 59 return -EINVAL; 60 61 if ((max - currsize) >= WORD_SZ) { 62 memcpy(data, &val, WORD_SZ); 63 data += WORD_SZ; 64 currsize += WORD_SZ; 65 } else { 66 /* copy only remaining bytes */ 67 memcpy(data, &val, max - currsize); 68 } 69 } while (currsize < max); 70 71 return 0; 72 } 73 74 static int qcom_rng_generate(struct crypto_rng *tfm, 75 const u8 *src, unsigned int slen, 76 u8 *dstn, unsigned int dlen) 77 { 78 struct qcom_rng_ctx *ctx = crypto_rng_ctx(tfm); 79 struct qcom_rng *rng = ctx->rng; 80 int ret; 81 82 ret = clk_prepare_enable(rng->clk); 83 if (ret) 84 return ret; 85 86 mutex_lock(&rng->lock); 87 88 ret = qcom_rng_read(rng, dstn, dlen); 89 90 mutex_unlock(&rng->lock); 91 clk_disable_unprepare(rng->clk); 92 93 return ret; 94 } 95 96 static int qcom_rng_seed(struct crypto_rng *tfm, const u8 *seed, 97 unsigned int slen) 98 { 99 return 0; 100 } 101 102 static int qcom_rng_enable(struct qcom_rng *rng) 103 { 104 u32 val; 105 int ret; 106 107 ret = clk_prepare_enable(rng->clk); 108 if (ret) 109 return ret; 110 111 /* Enable PRNG only if it is not already enabled */ 112 val = readl_relaxed(rng->base + PRNG_CONFIG); 113 if (val & PRNG_CONFIG_HW_ENABLE) 114 goto already_enabled; 115 116 val = readl_relaxed(rng->base + PRNG_LFSR_CFG); 117 val &= ~PRNG_LFSR_CFG_MASK; 118 val |= PRNG_LFSR_CFG_CLOCKS; 119 writel(val, rng->base + PRNG_LFSR_CFG); 120 121 val = readl_relaxed(rng->base + PRNG_CONFIG); 122 val |= PRNG_CONFIG_HW_ENABLE; 123 writel(val, rng->base + PRNG_CONFIG); 124 125 already_enabled: 126 clk_disable_unprepare(rng->clk); 127 128 return 0; 129 } 130 131 static int qcom_rng_init(struct crypto_tfm *tfm) 132 { 133 struct qcom_rng_ctx *ctx = crypto_tfm_ctx(tfm); 134 135 ctx->rng = qcom_rng_dev; 136 137 if (!ctx->rng->skip_init) 138 return qcom_rng_enable(ctx->rng); 139 140 return 0; 141 } 142 143 static struct rng_alg qcom_rng_alg = { 144 .generate = qcom_rng_generate, 145 .seed = qcom_rng_seed, 146 .seedsize = 0, 147 .base = { 148 .cra_name = "stdrng", 149 .cra_driver_name = "qcom-rng", 150 .cra_flags = CRYPTO_ALG_TYPE_RNG, 151 .cra_priority = 300, 152 .cra_ctxsize = sizeof(struct qcom_rng_ctx), 153 .cra_module = THIS_MODULE, 154 .cra_init = qcom_rng_init, 155 } 156 }; 157 158 static int qcom_rng_probe(struct platform_device *pdev) 159 { 160 struct qcom_rng *rng; 161 int ret; 162 163 rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL); 164 if (!rng) 165 return -ENOMEM; 166 167 platform_set_drvdata(pdev, rng); 168 mutex_init(&rng->lock); 169 170 rng->base = devm_platform_ioremap_resource(pdev, 0); 171 if (IS_ERR(rng->base)) 172 return PTR_ERR(rng->base); 173 174 /* ACPI systems have clk already on, so skip clk_get */ 175 if (!has_acpi_companion(&pdev->dev)) { 176 rng->clk = devm_clk_get(&pdev->dev, "core"); 177 if (IS_ERR(rng->clk)) 178 return PTR_ERR(rng->clk); 179 } 180 181 182 rng->skip_init = (unsigned long)device_get_match_data(&pdev->dev); 183 184 qcom_rng_dev = rng; 185 ret = crypto_register_rng(&qcom_rng_alg); 186 if (ret) { 187 dev_err(&pdev->dev, "Register crypto rng failed: %d\n", ret); 188 qcom_rng_dev = NULL; 189 } 190 191 return ret; 192 } 193 194 static int qcom_rng_remove(struct platform_device *pdev) 195 { 196 crypto_unregister_rng(&qcom_rng_alg); 197 198 qcom_rng_dev = NULL; 199 200 return 0; 201 } 202 203 #if IS_ENABLED(CONFIG_ACPI) 204 static const struct acpi_device_id qcom_rng_acpi_match[] = { 205 { .id = "QCOM8160", .driver_data = 1 }, 206 {} 207 }; 208 MODULE_DEVICE_TABLE(acpi, qcom_rng_acpi_match); 209 #endif 210 211 static const struct of_device_id qcom_rng_of_match[] = { 212 { .compatible = "qcom,prng", .data = (void *)0}, 213 { .compatible = "qcom,prng-ee", .data = (void *)1}, 214 {} 215 }; 216 MODULE_DEVICE_TABLE(of, qcom_rng_of_match); 217 218 static struct platform_driver qcom_rng_driver = { 219 .probe = qcom_rng_probe, 220 .remove = qcom_rng_remove, 221 .driver = { 222 .name = KBUILD_MODNAME, 223 .of_match_table = of_match_ptr(qcom_rng_of_match), 224 .acpi_match_table = ACPI_PTR(qcom_rng_acpi_match), 225 } 226 }; 227 module_platform_driver(qcom_rng_driver); 228 229 MODULE_ALIAS("platform:" KBUILD_MODNAME); 230 MODULE_DESCRIPTION("Qualcomm random number generator driver"); 231 MODULE_LICENSE("GPL v2"); 232