xref: /openbmc/linux/drivers/crypto/qce/common.h (revision e15a5365)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
4  */
5 
6 #ifndef _COMMON_H_
7 #define _COMMON_H_
8 
9 #include <linux/crypto.h>
10 #include <linux/types.h>
11 #include <crypto/aes.h>
12 #include <crypto/hash.h>
13 #include <crypto/internal/skcipher.h>
14 
15 /* xts du size */
16 #define QCE_SECTOR_SIZE			512
17 
18 /* key size in bytes */
19 #define QCE_SHA_HMAC_KEY_SIZE		64
20 #define QCE_MAX_CIPHER_KEY_SIZE		AES_KEYSIZE_256
21 
22 /* IV length in bytes */
23 #define QCE_AES_IV_LENGTH		AES_BLOCK_SIZE
24 /* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
25 #define QCE_MAX_IV_SIZE			AES_BLOCK_SIZE
26 
27 /* maximum nonce bytes  */
28 #define QCE_MAX_NONCE			16
29 #define QCE_MAX_NONCE_WORDS		(QCE_MAX_NONCE / sizeof(u32))
30 
31 /* burst size alignment requirement */
32 #define QCE_MAX_ALIGN_SIZE		64
33 
34 /* cipher algorithms */
35 #define QCE_ALG_DES			BIT(0)
36 #define QCE_ALG_3DES			BIT(1)
37 #define QCE_ALG_AES			BIT(2)
38 
39 /* hash and hmac algorithms */
40 #define QCE_HASH_SHA1			BIT(3)
41 #define QCE_HASH_SHA256			BIT(4)
42 #define QCE_HASH_SHA1_HMAC		BIT(5)
43 #define QCE_HASH_SHA256_HMAC		BIT(6)
44 #define QCE_HASH_AES_CMAC		BIT(7)
45 
46 /* cipher modes */
47 #define QCE_MODE_CBC			BIT(8)
48 #define QCE_MODE_ECB			BIT(9)
49 #define QCE_MODE_CTR			BIT(10)
50 #define QCE_MODE_XTS			BIT(11)
51 #define QCE_MODE_CCM			BIT(12)
52 #define QCE_MODE_MASK			GENMASK(12, 8)
53 
54 /* cipher encryption/decryption operations */
55 #define QCE_ENCRYPT			BIT(13)
56 #define QCE_DECRYPT			BIT(14)
57 
58 #define IS_DES(flags)			(flags & QCE_ALG_DES)
59 #define IS_3DES(flags)			(flags & QCE_ALG_3DES)
60 #define IS_AES(flags)			(flags & QCE_ALG_AES)
61 
62 #define IS_SHA1(flags)			(flags & QCE_HASH_SHA1)
63 #define IS_SHA256(flags)		(flags & QCE_HASH_SHA256)
64 #define IS_SHA1_HMAC(flags)		(flags & QCE_HASH_SHA1_HMAC)
65 #define IS_SHA256_HMAC(flags)		(flags & QCE_HASH_SHA256_HMAC)
66 #define IS_CMAC(flags)			(flags & QCE_HASH_AES_CMAC)
67 #define IS_SHA(flags)			(IS_SHA1(flags) || IS_SHA256(flags))
68 #define IS_SHA_HMAC(flags)		\
69 		(IS_SHA1_HMAC(flags) || IS_SHA256_HMAC(flags))
70 
71 #define IS_CBC(mode)			(mode & QCE_MODE_CBC)
72 #define IS_ECB(mode)			(mode & QCE_MODE_ECB)
73 #define IS_CTR(mode)			(mode & QCE_MODE_CTR)
74 #define IS_XTS(mode)			(mode & QCE_MODE_XTS)
75 #define IS_CCM(mode)			(mode & QCE_MODE_CCM)
76 
77 #define IS_ENCRYPT(dir)			(dir & QCE_ENCRYPT)
78 #define IS_DECRYPT(dir)			(dir & QCE_DECRYPT)
79 
80 struct qce_alg_template {
81 	struct list_head entry;
82 	u32 crypto_alg_type;
83 	unsigned long alg_flags;
84 	const u32 *std_iv;
85 	union {
86 		struct skcipher_alg skcipher;
87 		struct ahash_alg ahash;
88 	} alg;
89 	struct qce_device *qce;
90 	const u8 *hash_zero;
91 	const u32 digest_size;
92 };
93 
94 void qce_cpu_to_be32p_array(__be32 *dst, const u8 *src, unsigned int len);
95 int qce_check_status(struct qce_device *qce, u32 *status);
96 void qce_get_version(struct qce_device *qce, u32 *major, u32 *minor, u32 *step);
97 int qce_start(struct crypto_async_request *async_req, u32 type, u32 totallen,
98 	      u32 offset);
99 
100 #endif /* _COMMON_H_ */
101