xref: /openbmc/linux/drivers/crypto/nx/nx_csbcpb.h (revision d9fd5a71)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 
3 #ifndef __NX_CSBCPB_H__
4 #define __NX_CSBCPB_H__
5 
6 struct cop_symcpb_aes_ecb {
7 	u8 key[32];
8 	u8 __rsvd[80];
9 } __packed;
10 
11 struct cop_symcpb_aes_cbc {
12 	u8 iv[16];
13 	u8 key[32];
14 	u8 cv[16];
15 	u32 spbc;
16 	u8 __rsvd[44];
17 } __packed;
18 
19 struct cop_symcpb_aes_gca {
20 	u8 in_pat[16];
21 	u8 key[32];
22 	u8 out_pat[16];
23 	u32 spbc;
24 	u8 __rsvd[44];
25 } __packed;
26 
27 struct cop_symcpb_aes_gcm {
28 	u8 in_pat_or_aad[16];
29 	u8 iv_or_cnt[16];
30 	u64 bit_length_aad;
31 	u64 bit_length_data;
32 	u8 in_s0[16];
33 	u8 key[32];
34 	u8 __rsvd1[16];
35 	u8 out_pat_or_mac[16];
36 	u8 out_s0[16];
37 	u8 out_cnt[16];
38 	u32 spbc;
39 	u8 __rsvd2[12];
40 } __packed;
41 
42 struct cop_symcpb_aes_ctr {
43 	u8 iv[16];
44 	u8 key[32];
45 	u8 cv[16];
46 	u32 spbc;
47 	u8 __rsvd2[44];
48 } __packed;
49 
50 struct cop_symcpb_aes_cca {
51 	u8 b0[16];
52 	u8 b1[16];
53 	u8 key[16];
54 	u8 out_pat_or_b0[16];
55 	u32 spbc;
56 	u8 __rsvd[44];
57 } __packed;
58 
59 struct cop_symcpb_aes_ccm {
60 	u8 in_pat_or_b0[16];
61 	u8 iv_or_ctr[16];
62 	u8 in_s0[16];
63 	u8 key[16];
64 	u8 __rsvd1[48];
65 	u8 out_pat_or_mac[16];
66 	u8 out_s0[16];
67 	u8 out_ctr[16];
68 	u32 spbc;
69 	u8 __rsvd2[12];
70 } __packed;
71 
72 struct cop_symcpb_aes_xcbc {
73 	u8 cv[16];
74 	u8 key[16];
75 	u8 __rsvd1[16];
76 	u8 out_cv_mac[16];
77 	u32 spbc;
78 	u8 __rsvd2[44];
79 } __packed;
80 
81 struct cop_symcpb_sha256 {
82 	u64 message_bit_length;
83 	u64 __rsvd1;
84 	u8 input_partial_digest[32];
85 	u8 message_digest[32];
86 	u32 spbc;
87 	u8 __rsvd2[44];
88 } __packed;
89 
90 struct cop_symcpb_sha512 {
91 	u64 message_bit_length_hi;
92 	u64 message_bit_length_lo;
93 	u8 input_partial_digest[64];
94 	u8 __rsvd1[32];
95 	u8 message_digest[64];
96 	u32 spbc;
97 	u8 __rsvd2[76];
98 } __packed;
99 
100 #define NX_FDM_INTERMEDIATE		0x01
101 #define NX_FDM_CONTINUATION		0x02
102 #define NX_FDM_ENDE_ENCRYPT		0x80
103 
104 #define NX_CPB_FDM(c)			((c)->cpb.hdr.fdm)
105 #define NX_CPB_KS_DS(c)			((c)->cpb.hdr.ks_ds)
106 
107 #define NX_CPB_KEY_SIZE(c)		(NX_CPB_KS_DS(c) >> 4)
108 #define NX_CPB_SET_KEY_SIZE(c, x)	NX_CPB_KS_DS(c) |= ((x) << 4)
109 #define NX_CPB_SET_DIGEST_SIZE(c, x)	NX_CPB_KS_DS(c) |= (x)
110 
111 struct cop_symcpb_header {
112 	u8 mode;
113 	u8 fdm;
114 	u8 ks_ds;
115 	u8 pad_byte;
116 	u8 __rsvd[12];
117 } __packed;
118 
119 struct cop_parameter_block {
120 	struct cop_symcpb_header hdr;
121 	union {
122 		struct cop_symcpb_aes_ecb  aes_ecb;
123 		struct cop_symcpb_aes_cbc  aes_cbc;
124 		struct cop_symcpb_aes_gca  aes_gca;
125 		struct cop_symcpb_aes_gcm  aes_gcm;
126 		struct cop_symcpb_aes_cca  aes_cca;
127 		struct cop_symcpb_aes_ccm  aes_ccm;
128 		struct cop_symcpb_aes_ctr  aes_ctr;
129 		struct cop_symcpb_aes_xcbc aes_xcbc;
130 		struct cop_symcpb_sha256   sha256;
131 		struct cop_symcpb_sha512   sha512;
132 	};
133 } __packed;
134 
135 #define NX_CSB_VALID_BIT	0x80
136 
137 /* co-processor status block */
138 struct cop_status_block {
139 	u8 valid;
140 	u8 crb_seq_number;
141 	u8 completion_code;
142 	u8 completion_extension;
143 	u32 processed_byte_count;
144 	u64 address;
145 } __packed;
146 
147 /* Nest accelerator workbook section 4.4 */
148 struct nx_csbcpb {
149 	unsigned char __rsvd[112];
150 	struct cop_status_block csb;
151 	struct cop_parameter_block cpb;
152 } __packed;
153 
154 /* nx_csbcpb related definitions */
155 #define NX_MODE_AES_ECB			0
156 #define NX_MODE_AES_CBC			1
157 #define NX_MODE_AES_GMAC		2
158 #define NX_MODE_AES_GCA			3
159 #define NX_MODE_AES_GCM			4
160 #define NX_MODE_AES_CCA			5
161 #define NX_MODE_AES_CCM			6
162 #define NX_MODE_AES_CTR			7
163 #define NX_MODE_AES_XCBC_MAC		20
164 #define NX_MODE_SHA			0
165 #define NX_MODE_SHA_HMAC		1
166 #define NX_MODE_AES_CBC_HMAC_ETA	8
167 #define NX_MODE_AES_CBC_HMAC_ATE	9
168 #define NX_MODE_AES_CBC_HMAC_EAA	10
169 #define NX_MODE_AES_CTR_HMAC_ETA	12
170 #define NX_MODE_AES_CTR_HMAC_ATE	13
171 #define NX_MODE_AES_CTR_HMAC_EAA	14
172 
173 #define NX_FDM_CI_FULL		0
174 #define NX_FDM_CI_FIRST		1
175 #define NX_FDM_CI_LAST		2
176 #define NX_FDM_CI_MIDDLE	3
177 
178 #define NX_FDM_PR_NONE		0
179 #define NX_FDM_PR_PAD		1
180 
181 #define NX_KS_AES_128		1
182 #define NX_KS_AES_192		2
183 #define NX_KS_AES_256		3
184 
185 #define NX_DS_SHA256		2
186 #define NX_DS_SHA512		3
187 
188 #define NX_FC_AES		0
189 #define NX_FC_SHA		2
190 #define NX_FC_AES_HMAC		6
191 
192 #define NX_MAX_FC		(NX_FC_AES_HMAC + 1)
193 #define NX_MAX_MODE		(NX_MODE_AES_XCBC_MAC + 1)
194 
195 #define HCOP_FC_AES          NX_FC_AES
196 #define HCOP_FC_SHA          NX_FC_SHA
197 #define HCOP_FC_AES_HMAC     NX_FC_AES_HMAC
198 
199 /* indices into the array of algorithm properties */
200 #define NX_PROPS_AES_128		0
201 #define NX_PROPS_AES_192		1
202 #define NX_PROPS_AES_256		2
203 #define NX_PROPS_SHA256			1
204 #define NX_PROPS_SHA512			2
205 
206 #endif
207