xref: /openbmc/linux/drivers/crypto/nx/nx-aes-gcm.c (revision 79980434)
1 /**
2  * AES GCM routines supporting the Power 7+ Nest Accelerators driver
3  *
4  * Copyright (C) 2012 International Business Machines Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; version 2 only.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18  *
19  * Author: Kent Yoder <yoder1@us.ibm.com>
20  */
21 
22 #include <crypto/internal/aead.h>
23 #include <crypto/aes.h>
24 #include <crypto/algapi.h>
25 #include <crypto/scatterwalk.h>
26 #include <linux/module.h>
27 #include <linux/types.h>
28 #include <linux/crypto.h>
29 #include <asm/vio.h>
30 
31 #include "nx_csbcpb.h"
32 #include "nx.h"
33 
34 
35 static int gcm_aes_nx_set_key(struct crypto_aead *tfm,
36 			      const u8           *in_key,
37 			      unsigned int        key_len)
38 {
39 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&tfm->base);
40 	struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
41 	struct nx_csbcpb *csbcpb_aead = nx_ctx->csbcpb_aead;
42 
43 	nx_ctx_init(nx_ctx, HCOP_FC_AES);
44 
45 	switch (key_len) {
46 	case AES_KEYSIZE_128:
47 		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_128);
48 		NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_128);
49 		nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_128];
50 		break;
51 	case AES_KEYSIZE_192:
52 		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_192);
53 		NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_192);
54 		nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_192];
55 		break;
56 	case AES_KEYSIZE_256:
57 		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_256);
58 		NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_256);
59 		nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_256];
60 		break;
61 	default:
62 		return -EINVAL;
63 	}
64 
65 	csbcpb->cpb.hdr.mode = NX_MODE_AES_GCM;
66 	memcpy(csbcpb->cpb.aes_gcm.key, in_key, key_len);
67 
68 	csbcpb_aead->cpb.hdr.mode = NX_MODE_AES_GCA;
69 	memcpy(csbcpb_aead->cpb.aes_gca.key, in_key, key_len);
70 
71 	return 0;
72 }
73 
74 static int gcm4106_aes_nx_set_key(struct crypto_aead *tfm,
75 				  const u8           *in_key,
76 				  unsigned int        key_len)
77 {
78 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&tfm->base);
79 	char *nonce = nx_ctx->priv.gcm.nonce;
80 	int rc;
81 
82 	if (key_len < 4)
83 		return -EINVAL;
84 
85 	key_len -= 4;
86 
87 	rc = gcm_aes_nx_set_key(tfm, in_key, key_len);
88 	if (rc)
89 		goto out;
90 
91 	memcpy(nonce, in_key + key_len, 4);
92 out:
93 	return rc;
94 }
95 
96 static int gcm_aes_nx_setauthsize(struct crypto_aead *tfm,
97 				  unsigned int authsize)
98 {
99 	if (authsize > crypto_aead_alg(tfm)->maxauthsize)
100 		return -EINVAL;
101 
102 	crypto_aead_crt(tfm)->authsize = authsize;
103 
104 	return 0;
105 }
106 
107 static int gcm4106_aes_nx_setauthsize(struct crypto_aead *tfm,
108 				      unsigned int authsize)
109 {
110 	switch (authsize) {
111 	case 8:
112 	case 12:
113 	case 16:
114 		break;
115 	default:
116 		return -EINVAL;
117 	}
118 
119 	crypto_aead_crt(tfm)->authsize = authsize;
120 
121 	return 0;
122 }
123 
124 static int nx_gca(struct nx_crypto_ctx  *nx_ctx,
125 		  struct aead_request   *req,
126 		  u8                    *out)
127 {
128 	int rc;
129 	struct nx_csbcpb *csbcpb_aead = nx_ctx->csbcpb_aead;
130 	struct scatter_walk walk;
131 	struct nx_sg *nx_sg = nx_ctx->in_sg;
132 	unsigned int nbytes = req->assoclen;
133 	unsigned int processed = 0, to_process;
134 	u32 max_sg_len;
135 
136 	if (nbytes <= AES_BLOCK_SIZE) {
137 		scatterwalk_start(&walk, req->assoc);
138 		scatterwalk_copychunks(out, &walk, nbytes, SCATTERWALK_FROM_SG);
139 		scatterwalk_done(&walk, SCATTERWALK_FROM_SG, 0);
140 		return 0;
141 	}
142 
143 	NX_CPB_FDM(csbcpb_aead) &= ~NX_FDM_CONTINUATION;
144 
145 	/* page_limit: number of sg entries that fit on one page */
146 	max_sg_len = min_t(u32, nx_driver.of.max_sg_len/sizeof(struct nx_sg),
147 			   nx_ctx->ap->sglen);
148 
149 	do {
150 		/*
151 		 * to_process: the data chunk to process in this update.
152 		 * This value is bound by sg list limits.
153 		 */
154 		to_process = min_t(u64, nbytes - processed,
155 				   nx_ctx->ap->databytelen);
156 		to_process = min_t(u64, to_process,
157 				   NX_PAGE_SIZE * (max_sg_len - 1));
158 
159 		if ((to_process + processed) < nbytes)
160 			NX_CPB_FDM(csbcpb_aead) |= NX_FDM_INTERMEDIATE;
161 		else
162 			NX_CPB_FDM(csbcpb_aead) &= ~NX_FDM_INTERMEDIATE;
163 
164 		nx_sg = nx_walk_and_build(nx_ctx->in_sg, nx_ctx->ap->sglen,
165 					  req->assoc, processed, to_process);
166 		nx_ctx->op_aead.inlen = (nx_ctx->in_sg - nx_sg)
167 					* sizeof(struct nx_sg);
168 
169 		rc = nx_hcall_sync(nx_ctx, &nx_ctx->op_aead,
170 				req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
171 		if (rc)
172 			return rc;
173 
174 		memcpy(csbcpb_aead->cpb.aes_gca.in_pat,
175 				csbcpb_aead->cpb.aes_gca.out_pat,
176 				AES_BLOCK_SIZE);
177 		NX_CPB_FDM(csbcpb_aead) |= NX_FDM_CONTINUATION;
178 
179 		atomic_inc(&(nx_ctx->stats->aes_ops));
180 		atomic64_add(req->assoclen, &(nx_ctx->stats->aes_bytes));
181 
182 		processed += to_process;
183 	} while (processed < nbytes);
184 
185 	memcpy(out, csbcpb_aead->cpb.aes_gca.out_pat, AES_BLOCK_SIZE);
186 
187 	return rc;
188 }
189 
190 static int gcm_empty(struct aead_request *req, struct blkcipher_desc *desc,
191 		     int enc)
192 {
193 	int rc;
194 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
195 	struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
196 
197 	/* For scenarios where the input message is zero length, AES CTR mode
198 	 * may be used. Set the source data to be a single block (16B) of all
199 	 * zeros, and set the input IV value to be the same as the GMAC IV
200 	 * value. - nx_wb 4.8.1.3 */
201 	char src[AES_BLOCK_SIZE] = {};
202 	struct scatterlist sg;
203 
204 	desc->tfm = crypto_alloc_blkcipher("ctr(aes)", 0, 0);
205 	if (IS_ERR(desc->tfm)) {
206 		rc = -ENOMEM;
207 		goto out;
208 	}
209 
210 	crypto_blkcipher_setkey(desc->tfm, csbcpb->cpb.aes_gcm.key,
211 		NX_CPB_KEY_SIZE(csbcpb) == NX_KS_AES_128 ? 16 :
212 		NX_CPB_KEY_SIZE(csbcpb) == NX_KS_AES_192 ? 24 : 32);
213 
214 	sg_init_one(&sg, src, AES_BLOCK_SIZE);
215 	if (enc)
216 		rc = crypto_blkcipher_encrypt_iv(desc, req->dst, &sg,
217 						 AES_BLOCK_SIZE);
218 	else
219 		rc = crypto_blkcipher_decrypt_iv(desc, req->dst, &sg,
220 						 AES_BLOCK_SIZE);
221 	crypto_free_blkcipher(desc->tfm);
222 
223 out:
224 	return rc;
225 }
226 
227 static int gcm_aes_nx_crypt(struct aead_request *req, int enc)
228 {
229 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
230 	struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
231 	struct blkcipher_desc desc;
232 	unsigned int nbytes = req->cryptlen;
233 	unsigned int processed = 0, to_process;
234 	unsigned long irq_flags;
235 	u32 max_sg_len;
236 	int rc = -EINVAL;
237 
238 	spin_lock_irqsave(&nx_ctx->lock, irq_flags);
239 
240 	desc.info = nx_ctx->priv.gcm.iv;
241 	/* initialize the counter */
242 	*(u32 *)(desc.info + NX_GCM_CTR_OFFSET) = 1;
243 
244 	if (nbytes == 0) {
245 		rc = gcm_empty(req, &desc, enc);
246 		goto out;
247 	}
248 
249 	/* Process associated data */
250 	csbcpb->cpb.aes_gcm.bit_length_aad = req->assoclen * 8;
251 	if (req->assoclen) {
252 		rc = nx_gca(nx_ctx, req, csbcpb->cpb.aes_gcm.in_pat_or_aad);
253 		if (rc)
254 			goto out;
255 	}
256 
257 	/* Set flags for encryption */
258 	NX_CPB_FDM(csbcpb) &= ~NX_FDM_CONTINUATION;
259 	if (enc) {
260 		NX_CPB_FDM(csbcpb) |= NX_FDM_ENDE_ENCRYPT;
261 	} else {
262 		NX_CPB_FDM(csbcpb) &= ~NX_FDM_ENDE_ENCRYPT;
263 		nbytes -= crypto_aead_authsize(crypto_aead_reqtfm(req));
264 	}
265 
266 	/* page_limit: number of sg entries that fit on one page */
267 	max_sg_len = min_t(u32, nx_driver.of.max_sg_len/sizeof(struct nx_sg),
268 			   nx_ctx->ap->sglen);
269 
270 	do {
271 		/*
272 		 * to_process: the data chunk to process in this update.
273 		 * This value is bound by sg list limits.
274 		 */
275 		to_process = min_t(u64, nbytes - processed,
276 				   nx_ctx->ap->databytelen);
277 		to_process = min_t(u64, to_process,
278 				   NX_PAGE_SIZE * (max_sg_len - 1));
279 
280 		if ((to_process + processed) < nbytes)
281 			NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;
282 		else
283 			NX_CPB_FDM(csbcpb) &= ~NX_FDM_INTERMEDIATE;
284 
285 		csbcpb->cpb.aes_gcm.bit_length_data = nbytes * 8;
286 		desc.tfm = (struct crypto_blkcipher *) req->base.tfm;
287 		rc = nx_build_sg_lists(nx_ctx, &desc, req->dst,
288 				       req->src, to_process, processed,
289 				       csbcpb->cpb.aes_gcm.iv_or_cnt);
290 		if (rc)
291 			goto out;
292 
293 		rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
294 				   req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
295 		if (rc)
296 			goto out;
297 
298 		memcpy(desc.info, csbcpb->cpb.aes_gcm.out_cnt, AES_BLOCK_SIZE);
299 		memcpy(csbcpb->cpb.aes_gcm.in_pat_or_aad,
300 			csbcpb->cpb.aes_gcm.out_pat_or_mac, AES_BLOCK_SIZE);
301 		memcpy(csbcpb->cpb.aes_gcm.in_s0,
302 			csbcpb->cpb.aes_gcm.out_s0, AES_BLOCK_SIZE);
303 
304 		NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;
305 
306 		atomic_inc(&(nx_ctx->stats->aes_ops));
307 		atomic64_add(csbcpb->csb.processed_byte_count,
308 			     &(nx_ctx->stats->aes_bytes));
309 
310 		processed += to_process;
311 	} while (processed < nbytes);
312 
313 	if (enc) {
314 		/* copy out the auth tag */
315 		scatterwalk_map_and_copy(csbcpb->cpb.aes_gcm.out_pat_or_mac,
316 				 req->dst, nbytes,
317 				 crypto_aead_authsize(crypto_aead_reqtfm(req)),
318 				 SCATTERWALK_TO_SG);
319 	} else {
320 		u8 *itag = nx_ctx->priv.gcm.iauth_tag;
321 		u8 *otag = csbcpb->cpb.aes_gcm.out_pat_or_mac;
322 
323 		scatterwalk_map_and_copy(itag, req->src, nbytes,
324 				 crypto_aead_authsize(crypto_aead_reqtfm(req)),
325 				 SCATTERWALK_FROM_SG);
326 		rc = memcmp(itag, otag,
327 			    crypto_aead_authsize(crypto_aead_reqtfm(req))) ?
328 		     -EBADMSG : 0;
329 	}
330 out:
331 	spin_unlock_irqrestore(&nx_ctx->lock, irq_flags);
332 	return rc;
333 }
334 
335 static int gcm_aes_nx_encrypt(struct aead_request *req)
336 {
337 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
338 	char *iv = nx_ctx->priv.gcm.iv;
339 
340 	memcpy(iv, req->iv, 12);
341 
342 	return gcm_aes_nx_crypt(req, 1);
343 }
344 
345 static int gcm_aes_nx_decrypt(struct aead_request *req)
346 {
347 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
348 	char *iv = nx_ctx->priv.gcm.iv;
349 
350 	memcpy(iv, req->iv, 12);
351 
352 	return gcm_aes_nx_crypt(req, 0);
353 }
354 
355 static int gcm4106_aes_nx_encrypt(struct aead_request *req)
356 {
357 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
358 	char *iv = nx_ctx->priv.gcm.iv;
359 	char *nonce = nx_ctx->priv.gcm.nonce;
360 
361 	memcpy(iv, nonce, NX_GCM4106_NONCE_LEN);
362 	memcpy(iv + NX_GCM4106_NONCE_LEN, req->iv, 8);
363 
364 	return gcm_aes_nx_crypt(req, 1);
365 }
366 
367 static int gcm4106_aes_nx_decrypt(struct aead_request *req)
368 {
369 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
370 	char *iv = nx_ctx->priv.gcm.iv;
371 	char *nonce = nx_ctx->priv.gcm.nonce;
372 
373 	memcpy(iv, nonce, NX_GCM4106_NONCE_LEN);
374 	memcpy(iv + NX_GCM4106_NONCE_LEN, req->iv, 8);
375 
376 	return gcm_aes_nx_crypt(req, 0);
377 }
378 
379 /* tell the block cipher walk routines that this is a stream cipher by
380  * setting cra_blocksize to 1. Even using blkcipher_walk_virt_block
381  * during encrypt/decrypt doesn't solve this problem, because it calls
382  * blkcipher_walk_done under the covers, which doesn't use walk->blocksize,
383  * but instead uses this tfm->blocksize. */
384 struct crypto_alg nx_gcm_aes_alg = {
385 	.cra_name        = "gcm(aes)",
386 	.cra_driver_name = "gcm-aes-nx",
387 	.cra_priority    = 300,
388 	.cra_flags       = CRYPTO_ALG_TYPE_AEAD,
389 	.cra_blocksize   = 1,
390 	.cra_ctxsize     = sizeof(struct nx_crypto_ctx),
391 	.cra_type        = &crypto_aead_type,
392 	.cra_module      = THIS_MODULE,
393 	.cra_init        = nx_crypto_ctx_aes_gcm_init,
394 	.cra_exit        = nx_crypto_ctx_exit,
395 	.cra_aead = {
396 		.ivsize      = AES_BLOCK_SIZE,
397 		.maxauthsize = AES_BLOCK_SIZE,
398 		.setkey      = gcm_aes_nx_set_key,
399 		.setauthsize = gcm_aes_nx_setauthsize,
400 		.encrypt     = gcm_aes_nx_encrypt,
401 		.decrypt     = gcm_aes_nx_decrypt,
402 	}
403 };
404 
405 struct crypto_alg nx_gcm4106_aes_alg = {
406 	.cra_name        = "rfc4106(gcm(aes))",
407 	.cra_driver_name = "rfc4106-gcm-aes-nx",
408 	.cra_priority    = 300,
409 	.cra_flags       = CRYPTO_ALG_TYPE_AEAD,
410 	.cra_blocksize   = 1,
411 	.cra_ctxsize     = sizeof(struct nx_crypto_ctx),
412 	.cra_type        = &crypto_nivaead_type,
413 	.cra_module      = THIS_MODULE,
414 	.cra_init        = nx_crypto_ctx_aes_gcm_init,
415 	.cra_exit        = nx_crypto_ctx_exit,
416 	.cra_aead = {
417 		.ivsize      = 8,
418 		.maxauthsize = AES_BLOCK_SIZE,
419 		.geniv       = "seqiv",
420 		.setkey      = gcm4106_aes_nx_set_key,
421 		.setauthsize = gcm4106_aes_nx_setauthsize,
422 		.encrypt     = gcm4106_aes_nx_encrypt,
423 		.decrypt     = gcm4106_aes_nx_decrypt,
424 	}
425 };
426