1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (C) 2021 Marvell. */ 3 4 #include "otx2_cpt_devlink.h" 5 6 static int otx2_cpt_dl_egrp_create(struct devlink *dl, u32 id, 7 struct devlink_param_gset_ctx *ctx) 8 { 9 struct otx2_cpt_devlink *cpt_dl = devlink_priv(dl); 10 struct otx2_cptpf_dev *cptpf = cpt_dl->cptpf; 11 12 return otx2_cpt_dl_custom_egrp_create(cptpf, ctx); 13 } 14 15 static int otx2_cpt_dl_egrp_delete(struct devlink *dl, u32 id, 16 struct devlink_param_gset_ctx *ctx) 17 { 18 struct otx2_cpt_devlink *cpt_dl = devlink_priv(dl); 19 struct otx2_cptpf_dev *cptpf = cpt_dl->cptpf; 20 21 return otx2_cpt_dl_custom_egrp_delete(cptpf, ctx); 22 } 23 24 static int otx2_cpt_dl_uc_info(struct devlink *dl, u32 id, 25 struct devlink_param_gset_ctx *ctx) 26 { 27 struct otx2_cpt_devlink *cpt_dl = devlink_priv(dl); 28 struct otx2_cptpf_dev *cptpf = cpt_dl->cptpf; 29 30 otx2_cpt_print_uc_dbg_info(cptpf); 31 32 return 0; 33 } 34 35 enum otx2_cpt_dl_param_id { 36 OTX2_CPT_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX, 37 OTX2_CPT_DEVLINK_PARAM_ID_EGRP_CREATE, 38 OTX2_CPT_DEVLINK_PARAM_ID_EGRP_DELETE, 39 }; 40 41 static const struct devlink_param otx2_cpt_dl_params[] = { 42 DEVLINK_PARAM_DRIVER(OTX2_CPT_DEVLINK_PARAM_ID_EGRP_CREATE, 43 "egrp_create", DEVLINK_PARAM_TYPE_STRING, 44 BIT(DEVLINK_PARAM_CMODE_RUNTIME), 45 otx2_cpt_dl_uc_info, otx2_cpt_dl_egrp_create, 46 NULL), 47 DEVLINK_PARAM_DRIVER(OTX2_CPT_DEVLINK_PARAM_ID_EGRP_DELETE, 48 "egrp_delete", DEVLINK_PARAM_TYPE_STRING, 49 BIT(DEVLINK_PARAM_CMODE_RUNTIME), 50 otx2_cpt_dl_uc_info, otx2_cpt_dl_egrp_delete, 51 NULL), 52 }; 53 54 static int otx2_cpt_dl_info_firmware_version_put(struct devlink_info_req *req, 55 struct otx2_cpt_eng_grp_info grp[], 56 const char *ver_name, int eng_type) 57 { 58 struct otx2_cpt_engs_rsvd *eng; 59 int i; 60 61 for (i = 0; i < OTX2_CPT_MAX_ENGINE_GROUPS; i++) { 62 eng = find_engines_by_type(&grp[i], eng_type); 63 if (eng) 64 return devlink_info_version_running_put(req, ver_name, 65 eng->ucode->ver_str); 66 } 67 68 return 0; 69 } 70 71 static int otx2_cpt_devlink_info_get(struct devlink *dl, 72 struct devlink_info_req *req, 73 struct netlink_ext_ack *extack) 74 { 75 struct otx2_cpt_devlink *cpt_dl = devlink_priv(dl); 76 struct otx2_cptpf_dev *cptpf = cpt_dl->cptpf; 77 int err; 78 79 err = otx2_cpt_dl_info_firmware_version_put(req, cptpf->eng_grps.grp, 80 "fw.ae", OTX2_CPT_AE_TYPES); 81 if (err) 82 return err; 83 84 err = otx2_cpt_dl_info_firmware_version_put(req, cptpf->eng_grps.grp, 85 "fw.se", OTX2_CPT_SE_TYPES); 86 if (err) 87 return err; 88 89 return otx2_cpt_dl_info_firmware_version_put(req, cptpf->eng_grps.grp, 90 "fw.ie", OTX2_CPT_IE_TYPES); 91 } 92 93 static const struct devlink_ops otx2_cpt_devlink_ops = { 94 .info_get = otx2_cpt_devlink_info_get, 95 }; 96 97 int otx2_cpt_register_dl(struct otx2_cptpf_dev *cptpf) 98 { 99 struct device *dev = &cptpf->pdev->dev; 100 struct otx2_cpt_devlink *cpt_dl; 101 struct devlink *dl; 102 int ret; 103 104 dl = devlink_alloc(&otx2_cpt_devlink_ops, 105 sizeof(struct otx2_cpt_devlink), dev); 106 if (!dl) { 107 dev_warn(dev, "devlink_alloc failed\n"); 108 return -ENOMEM; 109 } 110 111 cpt_dl = devlink_priv(dl); 112 cpt_dl->dl = dl; 113 cpt_dl->cptpf = cptpf; 114 cptpf->dl = dl; 115 ret = devlink_params_register(dl, otx2_cpt_dl_params, 116 ARRAY_SIZE(otx2_cpt_dl_params)); 117 if (ret) { 118 dev_err(dev, "devlink params register failed with error %d", 119 ret); 120 devlink_free(dl); 121 return ret; 122 } 123 124 devlink_register(dl); 125 126 return 0; 127 } 128 129 void otx2_cpt_unregister_dl(struct otx2_cptpf_dev *cptpf) 130 { 131 struct devlink *dl = cptpf->dl; 132 133 if (!dl) 134 return; 135 136 devlink_unregister(dl); 137 devlink_params_unregister(dl, otx2_cpt_dl_params, 138 ARRAY_SIZE(otx2_cpt_dl_params)); 139 devlink_free(dl); 140 } 141